Lines Matching refs:pdev
81 static bool dpc_completed(struct pci_dev *pdev) in dpc_completed() argument
85 pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_STATUS, &status); in dpc_completed()
89 if (test_bit(PCI_DPC_RECOVERING, &pdev->priv_flags)) in dpc_completed()
103 bool pci_dpc_recovered(struct pci_dev *pdev) in pci_dpc_recovered() argument
107 if (!pdev->dpc_cap) in pci_dpc_recovered()
114 host = pci_find_host_bridge(pdev->bus); in pci_dpc_recovered()
123 wait_event_timeout(dpc_completed_waitqueue, dpc_completed(pdev), in pci_dpc_recovered()
126 return test_and_clear_bit(PCI_DPC_RECOVERED, &pdev->priv_flags); in pci_dpc_recovered()
130 static int dpc_wait_rp_inactive(struct pci_dev *pdev) in dpc_wait_rp_inactive() argument
133 u16 cap = pdev->dpc_cap, status; in dpc_wait_rp_inactive()
135 pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status); in dpc_wait_rp_inactive()
139 pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status); in dpc_wait_rp_inactive()
142 pci_warn(pdev, "root port still busy\n"); in dpc_wait_rp_inactive()
148 pci_ers_result_t dpc_reset_link(struct pci_dev *pdev) in dpc_reset_link() argument
153 set_bit(PCI_DPC_RECOVERING, &pdev->priv_flags); in dpc_reset_link()
159 cap = pdev->dpc_cap; in dpc_reset_link()
165 if (!pcie_wait_for_link(pdev, false)) in dpc_reset_link()
166 pci_info(pdev, "Data Link Layer Link Active not cleared in 1000 msec\n"); in dpc_reset_link()
168 if (pdev->dpc_rp_extensions && dpc_wait_rp_inactive(pdev)) { in dpc_reset_link()
169 clear_bit(PCI_DPC_RECOVERED, &pdev->priv_flags); in dpc_reset_link()
174 pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS, in dpc_reset_link()
177 if (pci_bridge_wait_for_secondary_bus(pdev, "DPC")) { in dpc_reset_link()
178 clear_bit(PCI_DPC_RECOVERED, &pdev->priv_flags); in dpc_reset_link()
181 set_bit(PCI_DPC_RECOVERED, &pdev->priv_flags); in dpc_reset_link()
185 clear_bit(PCI_DPC_RECOVERING, &pdev->priv_flags); in dpc_reset_link()
190 static void dpc_process_rp_pio_error(struct pci_dev *pdev) in dpc_process_rp_pio_error() argument
192 u16 cap = pdev->dpc_cap, dpc_status, first_error; in dpc_process_rp_pio_error()
197 pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_STATUS, &status); in dpc_process_rp_pio_error()
198 pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_MASK, &mask); in dpc_process_rp_pio_error()
199 pci_err(pdev, "rp_pio_status: %#010x, rp_pio_mask: %#010x\n", in dpc_process_rp_pio_error()
202 pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_SEVERITY, &sev); in dpc_process_rp_pio_error()
203 pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_SYSERROR, &syserr); in dpc_process_rp_pio_error()
204 pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_EXCEPTION, &exc); in dpc_process_rp_pio_error()
205 pci_err(pdev, "RP PIO severity=%#010x, syserror=%#010x, exception=%#010x\n", in dpc_process_rp_pio_error()
209 pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &dpc_status); in dpc_process_rp_pio_error()
214 pci_err(pdev, "[%2d] %s%s\n", i, rp_pio_error_string[i], in dpc_process_rp_pio_error()
218 if (pdev->dpc_rp_log_size < PCIE_STD_NUM_TLP_HEADERLOG) in dpc_process_rp_pio_error()
220 pcie_read_tlp_log(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG, in dpc_process_rp_pio_error()
222 dpc_tlp_log_len(pdev), in dpc_process_rp_pio_error()
223 pdev->subordinate->flit_mode, in dpc_process_rp_pio_error()
225 pcie_print_tlp_log(pdev, &tlp_log, KERN_ERR, dev_fmt("")); in dpc_process_rp_pio_error()
227 if (pdev->dpc_rp_log_size < PCIE_STD_NUM_TLP_HEADERLOG + 1) in dpc_process_rp_pio_error()
229 pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_IMPSPEC_LOG, &log); in dpc_process_rp_pio_error()
230 pci_err(pdev, "RP PIO ImpSpec Log %#010x\n", log); in dpc_process_rp_pio_error()
233 pci_write_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_STATUS, status); in dpc_process_rp_pio_error()
263 void dpc_process_error(struct pci_dev *pdev) in dpc_process_error() argument
265 u16 cap = pdev->dpc_cap, status, source, reason, ext_reason; in dpc_process_error()
268 pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status); in dpc_process_error()
274 pci_warn(pdev, "containment event, status:%#06x: unmasked uncorrectable error detected\n", in dpc_process_error()
276 if (dpc_get_aer_uncorrect_severity(pdev, &info) && in dpc_process_error()
279 pci_aer_clear_nonfatal_status(pdev); in dpc_process_error()
280 pci_aer_clear_fatal_status(pdev); in dpc_process_error()
285 pci_read_config_word(pdev, cap + PCI_EXP_DPC_SOURCE_ID, in dpc_process_error()
287 pci_warn(pdev, "containment event, status:%#06x, %s received from %04x:%02x:%02x.%d\n", in dpc_process_error()
291 pci_domain_nr(pdev->bus), PCI_BUS_NUM(source), in dpc_process_error()
296 pci_warn(pdev, "containment event, status:%#06x: %s detected\n", in dpc_process_error()
305 pdev->dpc_rp_extensions) in dpc_process_error()
306 dpc_process_rp_pio_error(pdev); in dpc_process_error()
311 static void pci_clear_surpdn_errors(struct pci_dev *pdev) in pci_clear_surpdn_errors() argument
313 if (pdev->dpc_rp_extensions) in pci_clear_surpdn_errors()
314 pci_write_config_dword(pdev, pdev->dpc_cap + in pci_clear_surpdn_errors()
322 pci_write_config_word(pdev, PCI_STATUS, 0xffff); in pci_clear_surpdn_errors()
324 pcie_capability_write_word(pdev, PCI_EXP_DEVSTA, PCI_EXP_DEVSTA_FED); in pci_clear_surpdn_errors()
327 static void dpc_handle_surprise_removal(struct pci_dev *pdev) in dpc_handle_surprise_removal() argument
329 if (!pcie_wait_for_link(pdev, false)) { in dpc_handle_surprise_removal()
330 pci_info(pdev, "Data Link Layer Link Active not cleared in 1000 msec\n"); in dpc_handle_surprise_removal()
334 if (pdev->dpc_rp_extensions && dpc_wait_rp_inactive(pdev)) in dpc_handle_surprise_removal()
337 pci_aer_raw_clear_status(pdev); in dpc_handle_surprise_removal()
338 pci_clear_surpdn_errors(pdev); in dpc_handle_surprise_removal()
340 pci_write_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_STATUS, in dpc_handle_surprise_removal()
344 clear_bit(PCI_DPC_RECOVERED, &pdev->priv_flags); in dpc_handle_surprise_removal()
348 static bool dpc_is_surprise_removal(struct pci_dev *pdev) in dpc_is_surprise_removal() argument
352 if (!pdev->is_hotplug_bridge) in dpc_is_surprise_removal()
355 if (pci_read_config_word(pdev, pdev->aer_cap + PCI_ERR_UNCOR_STATUS, in dpc_is_surprise_removal()
364 struct pci_dev *pdev = context; in dpc_handler() local
370 if (dpc_is_surprise_removal(pdev)) { in dpc_handler()
371 dpc_handle_surprise_removal(pdev); in dpc_handler()
375 dpc_process_error(pdev); in dpc_handler()
378 pcie_do_recovery(pdev, pci_channel_io_frozen, dpc_reset_link); in dpc_handler()
385 struct pci_dev *pdev = context; in dpc_irq() local
386 u16 cap = pdev->dpc_cap, status; in dpc_irq()
388 pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status); in dpc_irq()
393 pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS, in dpc_irq()
400 void pci_dpc_init(struct pci_dev *pdev) in pci_dpc_init() argument
404 pdev->dpc_cap = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DPC); in pci_dpc_init()
405 if (!pdev->dpc_cap) in pci_dpc_init()
408 pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CAP, &cap); in pci_dpc_init()
412 pdev->dpc_rp_extensions = true; in pci_dpc_init()
415 if (!pdev->dpc_rp_log_size) { in pci_dpc_init()
419 ret = pcie_capability_read_word(pdev, PCI_EXP_FLAGS, &flags); in pci_dpc_init()
423 pdev->dpc_rp_log_size = in pci_dpc_init()
426 pdev->dpc_rp_log_size += FIELD_GET(PCI_EXP_DPC_RP_PIO_LOG_SIZE4, in pci_dpc_init()
429 if (pdev->dpc_rp_log_size < PCIE_STD_NUM_TLP_HEADERLOG || in pci_dpc_init()
430 pdev->dpc_rp_log_size > PCIE_STD_MAX_TLP_HEADERLOG + 1) { in pci_dpc_init()
431 pci_err(pdev, "RP PIO log size %u is invalid\n", in pci_dpc_init()
432 pdev->dpc_rp_log_size); in pci_dpc_init()
433 pdev->dpc_rp_log_size = 0; in pci_dpc_init()
440 struct pci_dev *pdev = dev->port; in dpc_enable() local
441 int dpc = pdev->dpc_cap; in dpc_enable()
448 pci_write_config_word(pdev, dpc + PCI_EXP_DPC_STATUS, in dpc_enable()
451 pci_read_config_word(pdev, dpc + PCI_EXP_DPC_CTL, &ctl); in dpc_enable()
454 pci_write_config_word(pdev, dpc + PCI_EXP_DPC_CTL, ctl); in dpc_enable()
459 struct pci_dev *pdev = dev->port; in dpc_disable() local
460 int dpc = pdev->dpc_cap; in dpc_disable()
464 pci_read_config_word(pdev, dpc + PCI_EXP_DPC_CTL, &ctl); in dpc_disable()
466 pci_write_config_word(pdev, dpc + PCI_EXP_DPC_CTL, ctl); in dpc_disable()
472 struct pci_dev *pdev = dev->port; in dpc_probe() local
477 if (!pcie_aer_is_native(pdev) && !pcie_ports_dpc_native) in dpc_probe()
482 "pcie-dpc", pdev); in dpc_probe()
484 pci_warn(pdev, "request IRQ%d failed: %d\n", dev->irq, in dpc_probe()
489 pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CAP, &cap); in dpc_probe()
492 pci_info(pdev, "enabled with IRQ %d\n", dev->irq); in dpc_probe()
493 …pci_info(pdev, "error containment capabilities: Int Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP … in dpc_probe()
496 FLAG(cap, PCI_EXP_DPC_CAP_SW_TRIGGER), pdev->dpc_rp_log_size, in dpc_probe()
499 pci_add_ext_cap_save_buffer(pdev, PCI_EXT_CAP_ID_DPC, sizeof(u16)); in dpc_probe()