Lines Matching +full:cap +full:- +full:get
1 // SPDX-License-Identifier: GPL-2.0
49 u16 *cap; in pci_save_dpc_state() local
58 cap = (u16 *)&save_state->cap.data[0]; in pci_save_dpc_state()
59 pci_read_config_word(dev, dev->dpc_cap + PCI_EXP_DPC_CTL, cap); in pci_save_dpc_state()
65 u16 *cap; in pci_restore_dpc_state() local
74 cap = (u16 *)&save_state->cap.data[0]; in pci_restore_dpc_state()
75 pci_write_config_word(dev, dev->dpc_cap + PCI_EXP_DPC_CTL, *cap); in pci_restore_dpc_state()
85 pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_STATUS, &status); in dpc_completed()
89 if (test_bit(PCI_DPC_RECOVERING, &pdev->priv_flags)) in dpc_completed()
96 * pci_dpc_recovered - whether DPC triggered and has recovered successfully
107 if (!pdev->dpc_cap) in pci_dpc_recovered()
114 host = pci_find_host_bridge(pdev->bus); in pci_dpc_recovered()
115 if (!host->native_dpc && !IS_ENABLED(CONFIG_PCIE_EDR)) in pci_dpc_recovered()
126 return test_and_clear_bit(PCI_DPC_RECOVERED, &pdev->priv_flags); in pci_dpc_recovered()
133 u16 cap = pdev->dpc_cap, status; in dpc_wait_rp_inactive() local
135 pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status); in dpc_wait_rp_inactive()
139 pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status); in dpc_wait_rp_inactive()
143 return -EBUSY; in dpc_wait_rp_inactive()
151 u16 cap; in dpc_reset_link() local
153 set_bit(PCI_DPC_RECOVERING, &pdev->priv_flags); in dpc_reset_link()
157 * already been reset by the time we get here. in dpc_reset_link()
159 cap = pdev->dpc_cap; in dpc_reset_link()
168 if (pdev->dpc_rp_extensions && dpc_wait_rp_inactive(pdev)) { in dpc_reset_link()
169 clear_bit(PCI_DPC_RECOVERED, &pdev->priv_flags); in dpc_reset_link()
174 pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS, in dpc_reset_link()
178 clear_bit(PCI_DPC_RECOVERED, &pdev->priv_flags); in dpc_reset_link()
181 set_bit(PCI_DPC_RECOVERED, &pdev->priv_flags); in dpc_reset_link()
185 clear_bit(PCI_DPC_RECOVERING, &pdev->priv_flags); in dpc_reset_link()
192 u16 cap = pdev->dpc_cap, dpc_status, first_error; in dpc_process_rp_pio_error() local
197 pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_STATUS, &status); in dpc_process_rp_pio_error()
198 pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_MASK, &mask); in dpc_process_rp_pio_error()
202 pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_SEVERITY, &sev); in dpc_process_rp_pio_error()
203 pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_SYSERROR, &syserr); in dpc_process_rp_pio_error()
204 pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_EXCEPTION, &exc); in dpc_process_rp_pio_error()
208 /* Get First Error Pointer */ in dpc_process_rp_pio_error()
209 pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &dpc_status); in dpc_process_rp_pio_error()
218 if (pdev->dpc_rp_log_size < 4) in dpc_process_rp_pio_error()
220 pcie_read_tlp_log(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG, &tlp_log); in dpc_process_rp_pio_error()
224 if (pdev->dpc_rp_log_size < 5) in dpc_process_rp_pio_error()
226 pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_IMPSPEC_LOG, &log); in dpc_process_rp_pio_error()
229 for (i = 0; i < pdev->dpc_rp_log_size - 5; i++) { in dpc_process_rp_pio_error()
231 cap + PCI_EXP_DPC_RP_PIO_TLPPREFIX_LOG + i * 4, &prefix); in dpc_process_rp_pio_error()
235 pci_write_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_STATUS, status); in dpc_process_rp_pio_error()
241 int pos = dev->aer_cap; in dpc_get_aer_uncorrect_severity()
253 info->severity = AER_FATAL; in dpc_get_aer_uncorrect_severity()
255 info->severity = AER_NONFATAL; in dpc_get_aer_uncorrect_severity()
262 u16 cap = pdev->dpc_cap, status, source, reason, ext_reason; in dpc_process_error() local
265 pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status); in dpc_process_error()
266 pci_read_config_word(pdev, cap + PCI_EXP_DPC_SOURCE_ID, &source); in dpc_process_error()
287 if (pdev->dpc_rp_extensions && in dpc_process_error()
302 if (pdev->dpc_rp_extensions) in pci_clear_surpdn_errors()
303 pci_write_config_dword(pdev, pdev->dpc_cap + in pci_clear_surpdn_errors()
323 if (pdev->dpc_rp_extensions && dpc_wait_rp_inactive(pdev)) in dpc_handle_surprise_removal()
329 pci_write_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_STATUS, in dpc_handle_surprise_removal()
333 clear_bit(PCI_DPC_RECOVERED, &pdev->priv_flags); in dpc_handle_surprise_removal()
341 if (!pdev->is_hotplug_bridge) in dpc_is_surprise_removal()
344 if (pci_read_config_word(pdev, pdev->aer_cap + PCI_ERR_UNCOR_STATUS, in dpc_is_surprise_removal()
375 u16 cap = pdev->dpc_cap, status; in dpc_irq() local
377 pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status); in dpc_irq()
382 pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS, in dpc_irq()
391 u16 cap; in pci_dpc_init() local
393 pdev->dpc_cap = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DPC); in pci_dpc_init()
394 if (!pdev->dpc_cap) in pci_dpc_init()
397 pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CAP, &cap); in pci_dpc_init()
398 if (!(cap & PCI_EXP_DPC_CAP_RP_EXT)) in pci_dpc_init()
401 pdev->dpc_rp_extensions = true; in pci_dpc_init()
404 if (!pdev->dpc_rp_log_size) { in pci_dpc_init()
405 pdev->dpc_rp_log_size = in pci_dpc_init()
406 FIELD_GET(PCI_EXP_DPC_RP_PIO_LOG_SIZE, cap); in pci_dpc_init()
407 if (pdev->dpc_rp_log_size < 4 || pdev->dpc_rp_log_size > 9) { in pci_dpc_init()
409 pdev->dpc_rp_log_size); in pci_dpc_init()
410 pdev->dpc_rp_log_size = 0; in pci_dpc_init()
417 struct pci_dev *pdev = dev->port; in dpc_enable()
418 int dpc = pdev->dpc_cap; in dpc_enable()
422 * Clear DPC Interrupt Status so we don't get an interrupt for an in dpc_enable()
436 struct pci_dev *pdev = dev->port; in dpc_disable()
437 int dpc = pdev->dpc_cap; in dpc_disable()
446 #define FLAG(x, y) (((x) & (y)) ? '+' : '-')
449 struct pci_dev *pdev = dev->port; in dpc_probe()
450 struct device *device = &dev->device; in dpc_probe()
452 u16 cap; in dpc_probe() local
455 return -ENOTSUPP; in dpc_probe()
457 status = devm_request_threaded_irq(device, dev->irq, dpc_irq, in dpc_probe()
459 "pcie-dpc", pdev); in dpc_probe()
461 pci_warn(pdev, "request IRQ%d failed: %d\n", dev->irq, in dpc_probe()
466 pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CAP, &cap); in dpc_probe()
469 pci_info(pdev, "enabled with IRQ %d\n", dev->irq); in dpc_probe()
471 cap & PCI_EXP_DPC_IRQ, FLAG(cap, PCI_EXP_DPC_CAP_RP_EXT), in dpc_probe()
472 FLAG(cap, PCI_EXP_DPC_CAP_POISONED_TLP), in dpc_probe()
473 FLAG(cap, PCI_EXP_DPC_CAP_SW_TRIGGER), pdev->dpc_rp_log_size, in dpc_probe()
474 FLAG(cap, PCI_EXP_DPC_CAP_DL_ACTIVE)); in dpc_probe()