89 	 * If this is a Downstream Port, we never restore the L1SS state  in pci_save_aspm_l1ss_state()
134 	 * on the downstream component before the upstream. So, don't attempt to  in pci_restore_aspm_l1ss_state()
135 	 * restore either until we are at the downstream component.  in pci_restore_aspm_l1ss_state()
167 	 * Disable L1.2 on this downstream endpoint device first, followed  in pci_restore_aspm_l1ss_state()
216 #define PCIE_LINK_STATE_L0S_DW	BIT(1)	/* Downstream direction L0s state */
229 	struct pci_dev *downstream;	/* Downstream component, function 0 */  member
420 	/* Check downstream component if bit Slot Clock Configuration is 1 */  in pcie_aspm_configure_common_clock()
450 	/* Configure downstream component, all functions */  in pcie_aspm_configure_common_clock()
607 		/* Check downstream direction L0s latency */  in pcie_aspm_check_latency()
638 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in aspm_calc_l12_info()
670 	 * downstream devices report (via LTR) that they can tolerate at  in aspm_calc_l12_info()
736 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in aspm_l1ss_init()
793 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in pcie_aspm_cap_init()
818 	 * Re-read upstream/downstream components' register state after  in pcie_aspm_cap_init()
888 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in pcie_config_aspm_l1ss()
930 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in pcie_config_aspm_link()
949 	/* Convert ASPM state to upstream/downstream ASPM register state */  in pcie_config_aspm_link()
966 	 * it in the Downstream component prior to disabling it in the  in pcie_config_aspm_link()
968 	 * component prior to enabling it in the Downstream component.  in pcie_config_aspm_link()
987 	pci_save_aspm_l1ss_state(link->downstream);  in pcie_config_aspm_link()
988 	pci_update_aspm_saved_state(link->downstream);  in pcie_config_aspm_link()
1052 	link->downstream = pci_function_0(pdev->subordinate);  in alloc_pcie_link_state()
1057 	 * the root ports entirely, in which case a downstream port on  in alloc_pcie_link_state()
1094  * @pdev: the root port or switch downstream port
1110 	 * downstream port.  in pcie_aspm_init_link_state()
1273 	 * link->downstream is a pointer to the pci_dev of function 0.  If  in pcie_aspm_exit_link_state()
1275 	 * so we can't use link->downstream again.  Free the link state to  in pcie_aspm_exit_link_state()
1298  * @pdev: the root port or switch downstream port