Lines Matching full:aer

3  * Implement the AER root port service driver. The driver registers an IRQ
4 * handler. When a root port triggers an AER interrupt, the IRQ handler
15 #define pr_fmt(fmt) "AER: " fmt
58 /* AER info for the device */
62 * Fields for all AER capable devices. They indicate the errors
64 * Endpoint is causing problems, the AER counters may increment
164 int aer = dev->aer_cap; in enable_ecrc_checking() local
167 if (!aer) in enable_ecrc_checking()
170 pci_read_config_dword(dev, aer + PCI_ERR_CAP, &reg32); in enable_ecrc_checking()
175 pci_write_config_dword(dev, aer + PCI_ERR_CAP, reg32); in enable_ecrc_checking()
188 int aer = dev->aer_cap; in disable_ecrc_checking() local
191 if (!aer) in disable_ecrc_checking()
194 pci_read_config_dword(dev, aer + PCI_ERR_CAP, &reg32); in disable_ecrc_checking()
196 pci_write_config_dword(dev, aer + PCI_ERR_CAP, reg32); in disable_ecrc_checking()
268 int aer = dev->aer_cap; in pci_aer_clear_nonfatal_status() local
275 pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status); in pci_aer_clear_nonfatal_status()
276 pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_SEVER, &sev); in pci_aer_clear_nonfatal_status()
279 pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, status); in pci_aer_clear_nonfatal_status()
287 int aer = dev->aer_cap; in pci_aer_clear_fatal_status() local
294 pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status); in pci_aer_clear_fatal_status()
295 pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_SEVER, &sev); in pci_aer_clear_fatal_status()
298 pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, status); in pci_aer_clear_fatal_status()
302 * pci_aer_raw_clear_status - Clear AER error registers.
305 * Clear AER error status registers unconditionally, regardless of
312 int aer = dev->aer_cap; in pci_aer_raw_clear_status() local
316 if (!aer) in pci_aer_raw_clear_status()
322 pci_read_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, &status); in pci_aer_raw_clear_status()
323 pci_write_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, status); in pci_aer_raw_clear_status()
326 pci_read_config_dword(dev, aer + PCI_ERR_COR_STATUS, &status); in pci_aer_raw_clear_status()
327 pci_write_config_dword(dev, aer + PCI_ERR_COR_STATUS, status); in pci_aer_raw_clear_status()
329 pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status); in pci_aer_raw_clear_status()
330 pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, status); in pci_aer_raw_clear_status()
345 int aer = dev->aer_cap; in pci_save_aer_state() local
349 if (!aer) in pci_save_aer_state()
357 pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, cap++); in pci_save_aer_state()
358 pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_SEVER, cap++); in pci_save_aer_state()
359 pci_read_config_dword(dev, aer + PCI_ERR_COR_MASK, cap++); in pci_save_aer_state()
360 pci_read_config_dword(dev, aer + PCI_ERR_CAP, cap++); in pci_save_aer_state()
362 pci_read_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, cap++); in pci_save_aer_state()
367 int aer = dev->aer_cap; in pci_restore_aer_state() local
371 if (!aer) in pci_restore_aer_state()
379 pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, *cap++); in pci_restore_aer_state()
380 pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_SEVER, *cap++); in pci_restore_aer_state()
381 pci_write_config_dword(dev, aer + PCI_ERR_COR_MASK, *cap++); in pci_restore_aer_state()
382 pci_write_config_dword(dev, aer + PCI_ERR_CAP, *cap++); in pci_restore_aer_state()
384 pci_write_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, *cap++); in pci_restore_aer_state()
465 * AER error strings
744 .name = "aer",
927 struct aer_capability_regs *aer) in pci_print_aer() argument
933 .first_error = PCI_ERR_CAP_FEP(aer->cap_control), in pci_print_aer()
937 status = aer->cor_status; in pci_print_aer()
938 mask = aer->cor_mask; in pci_print_aer()
941 status = aer->uncor_status; in pci_print_aer()
942 mask = aer->uncor_mask; in pci_print_aer()
944 tlp_header_valid = tlp_header_logged(status, aer->cap_control); in pci_print_aer()
952 aer_severity, tlp_header_valid, &aer->header_log); in pci_print_aer()
968 aer->uncor_severity); in pci_print_aer()
971 pcie_print_tlp_log(dev, &aer->header_log, info.level, in pci_print_aer()
992 * Ratelimit AER log messages. "dev" is either the source in add_error_device()
994 * error logged in its own AER Capability. Messages are emitted in add_error_device()
1013 int aer = dev->aer_cap; in is_error_source() local
1038 * We check AER status registers to find possible reporter. in is_error_source()
1043 /* Check if AER is enabled */ in is_error_source()
1048 if (!aer) in is_error_source()
1053 pci_read_config_dword(dev, aer + PCI_ERR_COR_STATUS, &status); in is_error_source()
1054 pci_read_config_dword(dev, aer + PCI_ERR_COR_MASK, &mask); in is_error_source()
1056 pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status); in is_error_source()
1057 pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, &mask); in is_error_source()
1130 * Note: AER must be enabled and supported by the device which must be
1135 int aer = dev->aer_cap; in pci_aer_unmask_internal_errors() local
1138 pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, &mask); in pci_aer_unmask_internal_errors()
1140 pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, mask); in pci_aer_unmask_internal_errors()
1142 pci_read_config_dword(dev, aer + PCI_ERR_COR_MASK, &mask); in pci_aer_unmask_internal_errors()
1144 pci_write_config_dword(dev, aer + PCI_ERR_COR_MASK, mask); in pci_aer_unmask_internal_errors()
1214 * Internal errors of an RCEC indicate an AER error in an in cxl_rch_handle_error()
1269 int aer = dev->aer_cap; in pci_aer_handle_error() local
1276 if (aer) in pci_aer_handle_error()
1277 pci_write_config_dword(dev, aer + PCI_ERR_COR_STATUS, in pci_aer_handle_error()
1393 int type, aer; in aer_get_device_error_info() local
1400 aer = dev->aer_cap; in aer_get_device_error_info()
1407 /* The device might not support AER */ in aer_get_device_error_info()
1408 if (!aer) in aer_get_device_error_info()
1412 pci_read_config_dword(dev, aer + PCI_ERR_COR_STATUS, in aer_get_device_error_info()
1414 pci_read_config_dword(dev, aer + PCI_ERR_COR_MASK, in aer_get_device_error_info()
1424 pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, in aer_get_device_error_info()
1426 pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, in aer_get_device_error_info()
1432 pci_read_config_dword(dev, aer + PCI_ERR_CAP, &aercc); in aer_get_device_error_info()
1437 pcie_read_tlp_log(dev, aer + PCI_ERR_HEADER_LOG, in aer_get_device_error_info()
1438 aer + PCI_ERR_PREFIX_LOG, in aer_get_device_error_info()
1466 * @root: pointer to Root Port or RCEC that signaled AER interrupt
1467 * @info: pointer to AER error info
1480 * ERR_FATAL or we found a device with an error logged in its AER in aer_isr_one_error_type()
1496 * aer_isr_one_error - consume error(s) signaled by an AER interrupt from
1498 * @root: pointer to Root Port or RCEC that signaled AER interrupt
1564 * Invoked when Root Port detects AER messages.
1571 int aer = rp->aer_cap; in aer_irq() local
1574 pci_read_config_dword(rp, aer + PCI_ERR_ROOT_STATUS, &e_src.status); in aer_irq()
1578 pci_read_config_dword(rp, aer + PCI_ERR_ROOT_ERR_SRC, &e_src.id); in aer_irq()
1579 pci_write_config_dword(rp, aer + PCI_ERR_ROOT_STATUS, e_src.status); in aer_irq()
1589 int aer = pdev->aer_cap; in aer_enable_irq() local
1593 pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, &reg32); in aer_enable_irq()
1595 pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, reg32); in aer_enable_irq()
1600 int aer = pdev->aer_cap; in aer_disable_irq() local
1604 pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, &reg32); in aer_disable_irq()
1606 pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, reg32); in aer_disable_irq()
1613 * Invoked when PCIe bus loads AER service driver.
1618 int aer = pdev->aer_cap; in aer_enable_rootport() local
1631 pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_STATUS, &reg32); in aer_enable_rootport()
1632 pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_STATUS, reg32); in aer_enable_rootport()
1633 pci_read_config_dword(pdev, aer + PCI_ERR_COR_STATUS, &reg32); in aer_enable_rootport()
1634 pci_write_config_dword(pdev, aer + PCI_ERR_COR_STATUS, reg32); in aer_enable_rootport()
1635 pci_read_config_dword(pdev, aer + PCI_ERR_UNCOR_STATUS, &reg32); in aer_enable_rootport()
1636 pci_write_config_dword(pdev, aer + PCI_ERR_UNCOR_STATUS, reg32); in aer_enable_rootport()
1645 * Invoked when PCIe bus unloads AER service driver.
1650 int aer = pdev->aer_cap; in aer_disable_rootport() local
1656 pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_STATUS, &reg32); in aer_disable_rootport()
1657 pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_STATUS, reg32); in aer_disable_rootport()
1664 * Invoked when PCI Express bus unloads or AER probe fails.
1677 * Invoked when PCI Express bus loads AER service driver.
1707 pci_err(port, "request AER IRQ %d failed\n", dev->irq); in aer_probe()
1743 int aer; in aer_root_reset() local
1749 * Only Root Ports and RCECs have AER Root Command and Root Status in aer_root_reset()
1759 * If the platform retained control of AER, an RCiEP may not have in aer_root_reset()
1763 aer = root ? root->aer_cap : 0; in aer_root_reset()
1765 if ((host->native_aer || pcie_ports_native) && aer) in aer_root_reset()
1780 if ((host->native_aer || pcie_ports_native) && aer) { in aer_root_reset()
1782 pci_read_config_dword(root, aer + PCI_ERR_ROOT_STATUS, &reg32); in aer_root_reset()
1783 pci_write_config_dword(root, aer + PCI_ERR_ROOT_STATUS, reg32); in aer_root_reset()
1792 .name = "aer",
1803 * pcie_aer_init - register AER service driver
1805 * Invoked when AER service driver is loaded.