Lines Matching +full:integer +full:- +full:n
1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/pci-acpi.h>
18 #include <linux/pci-ecam.h>
26 * here to PCI-SIG members:
27 * https://members.pcisig.com/wg/PCI-SIG/document/15350
36 struct device *dev = &adev->dev; in acpi_get_rc_addr()
48 dev_err(dev, "failed to parse _CRS method, error code %d\n", in acpi_get_rc_addr()
54 dev_err(dev, "no IO and memory resources present in _CRS\n"); in acpi_get_rc_addr()
55 return -EINVAL; in acpi_get_rc_addr()
59 *res = *entry->res; in acpi_get_rc_addr()
89 dev_err(dev, "can't find _HID %s device to locate resources\n", in acpi_get_rc_resources()
91 return -ENODEV; in acpi_get_rc_resources()
96 return -ENODEV; in acpi_get_rc_resources()
100 dev_err(dev, "can't get resource from %s\n", in acpi_get_rc_resources()
101 dev_name(&adev->dev)); in acpi_get_rc_resources()
125 if (ACPI_HANDLE(&host_bridge->dev)) { in pci_acpi_preserve_config()
133 obj = acpi_evaluate_dsm_typed(ACPI_HANDLE(&host_bridge->dev), in pci_acpi_preserve_config()
137 if (obj && obj->integer.value == 0) in pci_acpi_preserve_config()
169 if (hpx->revision > 1) { in program_hpx_type0()
170 pci_warn(dev, "PCI settings rev %d not supported; using defaults\n", in program_hpx_type0()
171 hpx->revision); in program_hpx_type0()
175 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpx->cache_line_size); in program_hpx_type0()
176 pci_write_config_byte(dev, PCI_LATENCY_TIMER, hpx->latency_timer); in program_hpx_type0()
178 if (hpx->enable_serr) in program_hpx_type0()
180 if (hpx->enable_perr) in program_hpx_type0()
185 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { in program_hpx_type0()
187 hpx->latency_timer); in program_hpx_type0()
189 if (hpx->enable_perr) in program_hpx_type0()
199 union acpi_object *fields = record->package.elements; in decode_type0_hpx_record()
200 u32 revision = fields[1].integer.value; in decode_type0_hpx_record()
204 if (record->package.count != 6) in decode_type0_hpx_record()
209 hpx0->revision = revision; in decode_type0_hpx_record()
210 hpx0->cache_line_size = fields[2].integer.value; in decode_type0_hpx_record()
211 hpx0->latency_timer = fields[3].integer.value; in decode_type0_hpx_record()
212 hpx0->enable_serr = fields[4].integer.value; in decode_type0_hpx_record()
213 hpx0->enable_perr = fields[5].integer.value; in decode_type0_hpx_record()
216 pr_warn("%s: Type 0 Revision %d record not supported\n", in decode_type0_hpx_record()
223 /* _HPX PCI-X Setting Record (Type 1) */
242 pci_warn(dev, "PCI-X settings not supported\n"); in program_hpx_type1()
249 union acpi_object *fields = record->package.elements; in decode_type1_hpx_record()
250 u32 revision = fields[1].integer.value; in decode_type1_hpx_record()
254 if (record->package.count != 5) in decode_type1_hpx_record()
259 hpx1->revision = revision; in decode_type1_hpx_record()
260 hpx1->max_mem_read = fields[2].integer.value; in decode_type1_hpx_record()
261 hpx1->avg_max_split = fields[3].integer.value; in decode_type1_hpx_record()
262 hpx1->tot_max_split = fields[4].integer.value; in decode_type1_hpx_record()
265 pr_warn("%s: Type 1 Revision %d record not supported\n", in decode_type1_hpx_record()
319 if (hpx->revision > 1) { in program_hpx_type2()
320 pci_warn(dev, "PCIe settings rev %d not supported\n", in program_hpx_type2()
321 hpx->revision); in program_hpx_type2()
330 hpx->pci_exp_devctl_and |= PCI_EXP_DEVCTL_PAYLOAD | in program_hpx_type2()
332 hpx->pci_exp_devctl_or &= ~(PCI_EXP_DEVCTL_PAYLOAD | in program_hpx_type2()
337 ~hpx->pci_exp_devctl_and, hpx->pci_exp_devctl_or); in program_hpx_type2()
346 hpx->pci_exp_lnkctl_and |= PCI_EXP_LNKCTL_RCB; in program_hpx_type2()
347 hpx->pci_exp_lnkctl_or &= ~PCI_EXP_LNKCTL_RCB; in program_hpx_type2()
349 hpx->pci_exp_lnkctl_or |= PCI_EXP_LNKCTL_RCB; in program_hpx_type2()
352 ~hpx->pci_exp_lnkctl_and, hpx->pci_exp_lnkctl_or); in program_hpx_type2()
362 reg32 = (reg32 & hpx->unc_err_mask_and) | hpx->unc_err_mask_or; in program_hpx_type2()
367 reg32 = (reg32 & hpx->unc_err_sever_and) | hpx->unc_err_sever_or; in program_hpx_type2()
372 reg32 = (reg32 & hpx->cor_err_mask_and) | hpx->cor_err_mask_or; in program_hpx_type2()
377 reg32 = (reg32 & hpx->adv_err_cap_and) | hpx->adv_err_cap_or; in program_hpx_type2()
398 union acpi_object *fields = record->package.elements; in decode_type2_hpx_record()
399 u32 revision = fields[1].integer.value; in decode_type2_hpx_record()
403 if (record->package.count != 18) in decode_type2_hpx_record()
408 hpx2->revision = revision; in decode_type2_hpx_record()
409 hpx2->unc_err_mask_and = fields[2].integer.value; in decode_type2_hpx_record()
410 hpx2->unc_err_mask_or = fields[3].integer.value; in decode_type2_hpx_record()
411 hpx2->unc_err_sever_and = fields[4].integer.value; in decode_type2_hpx_record()
412 hpx2->unc_err_sever_or = fields[5].integer.value; in decode_type2_hpx_record()
413 hpx2->cor_err_mask_and = fields[6].integer.value; in decode_type2_hpx_record()
414 hpx2->cor_err_mask_or = fields[7].integer.value; in decode_type2_hpx_record()
415 hpx2->adv_err_cap_and = fields[8].integer.value; in decode_type2_hpx_record()
416 hpx2->adv_err_cap_or = fields[9].integer.value; in decode_type2_hpx_record()
417 hpx2->pci_exp_devctl_and = fields[10].integer.value; in decode_type2_hpx_record()
418 hpx2->pci_exp_devctl_or = fields[11].integer.value; in decode_type2_hpx_record()
419 hpx2->pci_exp_lnkctl_and = fields[12].integer.value; in decode_type2_hpx_record()
420 hpx2->pci_exp_lnkctl_or = fields[13].integer.value; in decode_type2_hpx_record()
421 hpx2->sec_unc_err_sever_and = fields[14].integer.value; in decode_type2_hpx_record()
422 hpx2->sec_unc_err_sever_or = fields[15].integer.value; in decode_type2_hpx_record()
423 hpx2->sec_unc_err_mask_and = fields[16].integer.value; in decode_type2_hpx_record()
424 hpx2->sec_unc_err_mask_or = fields[17].integer.value; in decode_type2_hpx_record()
427 pr_warn("%s: Type 2 Revision %d record not supported\n", in decode_type2_hpx_record()
493 if (dev->is_virtfn) in hpx3_function_type()
528 if (!(hpx3_device_type(dev) & reg->device_type)) in program_hpx_type3_register()
531 if (!(hpx3_function_type(dev) & reg->function_type)) in program_hpx_type3_register()
534 switch (reg->config_space_location) { in program_hpx_type3_register()
539 pos = pci_find_capability(dev, reg->pci_exp_cap_id); in program_hpx_type3_register()
545 pos = pci_find_ext_capability(dev, reg->pci_exp_cap_id); in program_hpx_type3_register()
551 reg->pci_exp_cap_ver)) in program_hpx_type3_register()
562 pci_read_config_dword(dev, pos + reg->match_offset, &match_reg); in program_hpx_type3_register()
564 if ((match_reg & reg->match_mask_and) != reg->match_value) in program_hpx_type3_register()
567 pci_read_config_dword(dev, pos + reg->reg_offset, &write_reg); in program_hpx_type3_register()
569 write_reg &= reg->reg_mask_and; in program_hpx_type3_register()
570 write_reg |= reg->reg_mask_or; in program_hpx_type3_register()
575 pci_write_config_dword(dev, pos + reg->reg_offset, write_reg); in program_hpx_type3_register()
577 pci_dbg(dev, "Applied _HPX3 at [0x%x]: 0x%08x -> 0x%08x", in program_hpx_type3_register()
595 hpx3_reg->device_type = reg_fields[0].integer.value; in parse_hpx3_register()
596 hpx3_reg->function_type = reg_fields[1].integer.value; in parse_hpx3_register()
597 hpx3_reg->config_space_location = reg_fields[2].integer.value; in parse_hpx3_register()
598 hpx3_reg->pci_exp_cap_id = reg_fields[3].integer.value; in parse_hpx3_register()
599 hpx3_reg->pci_exp_cap_ver = reg_fields[4].integer.value; in parse_hpx3_register()
600 hpx3_reg->pci_exp_vendor_id = reg_fields[5].integer.value; in parse_hpx3_register()
601 hpx3_reg->dvsec_id = reg_fields[6].integer.value; in parse_hpx3_register()
602 hpx3_reg->dvsec_rev = reg_fields[7].integer.value; in parse_hpx3_register()
603 hpx3_reg->match_offset = reg_fields[8].integer.value; in parse_hpx3_register()
604 hpx3_reg->match_mask_and = reg_fields[9].integer.value; in parse_hpx3_register()
605 hpx3_reg->match_value = reg_fields[10].integer.value; in parse_hpx3_register()
606 hpx3_reg->reg_offset = reg_fields[11].integer.value; in parse_hpx3_register()
607 hpx3_reg->reg_mask_and = reg_fields[12].integer.value; in parse_hpx3_register()
608 hpx3_reg->reg_mask_or = reg_fields[13].integer.value; in parse_hpx3_register()
614 union acpi_object *fields = record->package.elements; in program_type3_hpx_record()
620 revision = fields[1].integer.value; in program_type3_hpx_record()
623 desc_count = fields[2].integer.value; in program_type3_hpx_record()
626 if (record->package.count != expected_length) in program_type3_hpx_record()
642 "%s: Type 3 Revision %d record not supported\n", in program_type3_hpx_record()
665 if (package->type != ACPI_TYPE_PACKAGE) { in acpi_run_hpx()
670 for (i = 0; i < package->package.count; i++) { in acpi_run_hpx()
671 record = &package->package.elements[i]; in acpi_run_hpx()
672 if (record->type != ACPI_TYPE_PACKAGE) { in acpi_run_hpx()
677 fields = record->package.elements; in acpi_run_hpx()
684 type = fields[0].integer.value; in acpi_run_hpx()
713 pr_err("%s: Type %d record not supported\n", in acpi_run_hpx()
739 if (package->type != ACPI_TYPE_PACKAGE || in acpi_run_hpp()
740 package->package.count != 4) { in acpi_run_hpp()
745 fields = package->package.elements; in acpi_run_hpp()
754 hpx0.cache_line_size = fields[0].integer.value; in acpi_run_hpp()
755 hpx0.latency_timer = fields[1].integer.value; in acpi_run_hpp()
756 hpx0.enable_serr = fields[2].integer.value; in acpi_run_hpp()
757 hpx0.enable_perr = fields[3].integer.value; in acpi_run_hpp()
768 * @dev - the pci_dev for which we want parameters
777 return -ENODEV; in pci_acpi_program_hp_params()
780 for (pbus = dev->bus; pbus; pbus = pbus->parent) { in pci_acpi_program_hp_params()
806 return -ENODEV; in pci_acpi_program_hp_params()
810 * pciehp_is_native - Check whether a hotplug port is handled by the OS
831 host = pci_find_host_bridge(bridge->bus); in pciehp_is_native()
832 return host->native_pcie_hotplug; in pciehp_is_native()
836 * shpchp_is_native - Check whether a hotplug port is handled by the OS
844 return bridge->shpc_managed; in shpchp_is_native()
848 * pci_acpi_wake_bus - Root bus wakeup notification fork function.
858 pci_pme_wakeup_bus(root->bus); in pci_acpi_wake_bus()
862 * pci_acpi_wake_dev - PCI device wakeup notification work function.
869 pci_dev = to_pci_dev(context->dev); in pci_acpi_wake_dev()
871 if (pci_dev->pme_poll) in pci_acpi_wake_dev()
872 pci_dev->pme_poll = false; in pci_acpi_wake_dev()
874 if (pci_dev->current_state == PCI_D3cold) { in pci_acpi_wake_dev()
876 pm_request_resume(&pci_dev->dev); in pci_acpi_wake_dev()
881 if (pci_dev->pme_support) in pci_acpi_wake_dev()
885 pm_request_resume(&pci_dev->dev); in pci_acpi_wake_dev()
887 pci_pme_wakeup_bus(pci_dev->subordinate); in pci_acpi_wake_dev()
891 * pci_acpi_add_bus_pm_notifier - Register PM notifier for root PCI bus.
900 * pci_acpi_add_pm_notifier - Register PM notifier for given PCI device.
907 return acpi_add_pm_notifier(dev, &pci_dev->dev, pci_acpi_wake_dev); in pci_acpi_add_pm_notifier()
911 * _SxD returns the D-state with the highest power
912 * (lowest D-state number) supported in the S-state "x".
917 * D-state) than the return value from _SxD.
919 * But if _PRW is enabled at S-state "x", the OS
920 * must not choose a power lower than _SxD --
922 * the lowest power (highest D-state number) the device
927 * if (_PRW at S-state x)
929 * else // no _PRW at S-state x
937 if (pdev->no_d3cold || !pdev->d3cold_allowed) in acpi_pci_choose_state()
941 acpi_state = acpi_pm_device_sleep_state(&pdev->dev, NULL, d_max); in acpi_pci_choose_state()
964 if (!dev_fwnode(&dev->dev) && !pci_dev_is_added(dev)) in pci_set_acpi_fwnode()
965 ACPI_COMPANION_SET(&dev->dev, in pci_set_acpi_fwnode()
966 acpi_pci_find_companion(&dev->dev)); in pci_set_acpi_fwnode()
970 * pci_dev_acpi_reset - do a function level reset using _RST method
976 acpi_handle handle = ACPI_HANDLE(&dev->dev); in pci_dev_acpi_reset()
979 return -ENOTTY; in pci_dev_acpi_reset()
985 pci_warn(dev, "ACPI _RST failed\n"); in pci_dev_acpi_reset()
986 return -ENOTTY; in pci_dev_acpi_reset()
994 struct acpi_device *adev = ACPI_COMPANION(&dev->dev); in acpi_pci_power_manageable()
1005 if (acpi_pci_disabled || !dev->is_hotplug_bridge) in acpi_pci_bridge_d3()
1008 adev = ACPI_COMPANION(&dev->dev); in acpi_pci_bridge_d3()
1021 * is power-manageable via ACPI. in acpi_pci_bridge_d3()
1034 rpadev = ACPI_COMPANION(&rpdev->dev); in acpi_pci_bridge_d3()
1042 * events from low-power states including D3hot and D3cold. in acpi_pci_bridge_d3()
1044 if (!rpadev->wakeup.flags.valid) in acpi_pci_bridge_d3()
1048 * In the bridge-below-a-Root-Port case, evaluate _S0W for the Root Port in acpi_pci_bridge_d3()
1063 obj->integer.value == 1) in acpi_pci_bridge_d3()
1072 int ret = acpi_evaluate_reg(ACPI_HANDLE(&dev->dev), in acpi_pci_config_space_access()
1075 pci_dbg(dev, "ACPI _REG %s evaluation failed (%d)\n", in acpi_pci_config_space_access()
1081 struct acpi_device *adev = ACPI_COMPANION(&dev->dev); in acpi_pci_set_power_state()
1092 if (!adev || acpi_has_method(adev->handle, "_EJ0")) in acpi_pci_set_power_state()
1093 return -ENODEV; in acpi_pci_set_power_state()
1103 return -EINVAL; in acpi_pci_set_power_state()
1107 if (dev_pm_qos_flags(&dev->dev, PM_QOS_FLAG_NO_POWER_OFF) == in acpi_pci_set_power_state()
1109 return -EBUSY; in acpi_pci_set_power_state()
1119 pci_dbg(dev, "power state changed by ACPI to %s\n", in acpi_pci_set_power_state()
1120 acpi_power_state_string(adev->power.state)); in acpi_pci_set_power_state()
1136 struct acpi_device *adev = ACPI_COMPANION(&dev->dev); in acpi_pci_get_power_state()
1149 state = adev->power.state; in acpi_pci_get_power_state()
1158 struct acpi_device *adev = ACPI_COMPANION(&dev->dev); in acpi_pci_refresh_power_state()
1166 while (bus->parent) { in acpi_pci_propagate_wakeup()
1167 if (acpi_pm_device_can_wakeup(&bus->self->dev)) in acpi_pci_propagate_wakeup()
1168 return acpi_pm_set_device_wakeup(&bus->self->dev, enable); in acpi_pci_propagate_wakeup()
1170 bus = bus->parent; in acpi_pci_propagate_wakeup()
1174 if (bus->bridge) { in acpi_pci_propagate_wakeup()
1175 if (acpi_pm_device_can_wakeup(bus->bridge)) in acpi_pci_propagate_wakeup()
1176 return acpi_pm_set_device_wakeup(bus->bridge, enable); in acpi_pci_propagate_wakeup()
1186 if (acpi_pm_device_can_wakeup(&dev->dev)) in acpi_pci_wakeup()
1187 return acpi_pm_set_device_wakeup(&dev->dev, enable); in acpi_pci_wakeup()
1189 return acpi_pci_propagate_wakeup(dev->bus, enable); in acpi_pci_wakeup()
1201 * system-wide suspend/resume confuses the platform firmware, so avoid in acpi_pci_need_resume()
1209 adev = ACPI_COMPANION(&dev->dev); in acpi_pci_need_resume()
1213 if (adev->wakeup.flags.valid && in acpi_pci_need_resume()
1214 device_may_wakeup(&dev->dev) != !!adev->wakeup.prepare_count) in acpi_pci_need_resume()
1220 return !!adev->power.flags.dsw_present; in acpi_pci_need_resume()
1228 if (acpi_pci_disabled || !bus->bridge || !ACPI_HANDLE(bus->bridge)) in acpi_pci_add_bus()
1241 obj = acpi_evaluate_dsm_typed(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 3, in acpi_pci_add_bus()
1246 if (obj->integer.value == 1) { in acpi_pci_add_bus()
1248 bridge->ignore_reset_delay = 1; in acpi_pci_add_bus()
1255 if (acpi_pci_disabled || !bus->bridge) in acpi_pci_remove_bus()
1269 * pci_acpi_set_companion_lookup_hook - Set ACPI companion lookup callback.
1273 * objects in the ACPI namespace have _ADR with non-standard bus-device-function
1288 return -EINVAL; in pci_acpi_set_companion_lookup_hook()
1293 ret = -EBUSY; in pci_acpi_set_companion_lookup_hook()
1306 * pci_acpi_clear_companion_lookup_hook - Clear ACPI companion lookup callback.
1333 if (!dev->parent) in acpi_pci_find_companion()
1348 addr = (PCI_SLOT(pci_dev->devfn) << 16) | PCI_FUNC(pci_dev->devfn); in acpi_pci_find_companion()
1349 adev = acpi_find_child_device(ACPI_COMPANION(dev->parent), addr, in acpi_pci_find_companion()
1365 if (adev && adev->pnp.type.platform_id && !addr && in acpi_pci_find_companion()
1366 pci_is_root_bus(pci_dev->bus)) in acpi_pci_find_companion()
1373 * pci_acpi_optimize_delay - optimize PCI D3 and D3cold delay from ACPI
1382 * the hierarchy have already completed power-on reset delays.
1395 struct pci_host_bridge *bridge = pci_find_host_bridge(pdev->bus); in pci_acpi_optimize_delay()
1399 if (bridge->ignore_reset_delay) in pci_acpi_optimize_delay()
1400 pdev->d3cold_delay = 0; in pci_acpi_optimize_delay()
1408 if (obj->package.count == 5) { in pci_acpi_optimize_delay()
1409 elements = obj->package.elements; in pci_acpi_optimize_delay()
1411 value = (int)elements[0].integer.value / 1000; in pci_acpi_optimize_delay()
1413 pdev->d3cold_delay = value; in pci_acpi_optimize_delay()
1416 value = (int)elements[3].integer.value / 1000; in pci_acpi_optimize_delay()
1418 pdev->d3hot_delay = value; in pci_acpi_optimize_delay()
1430 if (device_property_read_u8(&dev->dev, "ExternalFacingPort", &val)) in pci_acpi_set_external_facing()
1438 dev->external_facing = 1; in pci_acpi_set_external_facing()
1445 pci_acpi_optimize_delay(pci_dev, adev->handle); in pci_acpi_setup()
1450 if (!adev->wakeup.flags.valid) in pci_acpi_setup()
1460 if (pci_dev->bridge_d3) in pci_acpi_setup()
1476 if (adev->wakeup.flags.valid) { in pci_acpi_cleanup()
1478 if (pci_dev->bridge_d3) in pci_acpi_cleanup()
1488 * pci_msi_register_fwnode_provider - Register callback to retrieve fwnode
1502 * pci_host_bridge_acpi_msi_domain - Retrieve MSI domain of a PCI host bridge
1517 fwnode = pci_msi_get_fwnode_cb(&bus->dev); in pci_host_bridge_acpi_msi_domain()
1527 pr_info("ACPI FADT declares the system doesn't support MSI, so disable it\n"); in acpi_pci_init()
1532 pr_info("ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n"); in acpi_pci_init()
1566 struct pci_config_window *cfg = bus->sysdata; in acpi_pci_bus_find_domain_nr()
1567 struct acpi_device *adev = to_acpi_device(cfg->parent); in acpi_pci_bus_find_domain_nr()
1570 return root->segment; in acpi_pci_bus_find_domain_nr()
1582 cfg = bridge->bus->sysdata; in pcibios_root_bridge_prepare()
1585 * On Hyper-V there is no corresponding ACPI device for a root bridge, in pcibios_root_bridge_prepare()
1586 * therefore ->parent is set as NULL by the driver. And set 'adev' as in pcibios_root_bridge_prepare()
1589 if (!cfg->parent) in pcibios_root_bridge_prepare()
1592 adev = to_acpi_device(cfg->parent); in pcibios_root_bridge_prepare()
1594 bus_dev = &bridge->bus->dev; in pcibios_root_bridge_prepare()
1596 ACPI_COMPANION_SET(&bridge->dev, adev); in pcibios_root_bridge_prepare()
1608 resource_list_for_each_entry_safe(entry, tmp, &ci->resources) { in pci_acpi_root_prepare_resources()
1609 if (!(entry->res->flags & IORESOURCE_WINDOW)) in pci_acpi_root_prepare_resources()
1622 struct device *dev = &root->device->dev; in pci_acpi_setup_ecam_mapping()
1623 struct resource *bus_res = &root->secondary; in pci_acpi_setup_ecam_mapping()
1624 u16 seg = root->segment; in pci_acpi_setup_ecam_mapping()
1633 dev_err(dev, "%04x:%pR ECAM region not found\n", seg, bus_res); in pci_acpi_setup_ecam_mapping()
1639 dev_info(dev, "ECAM area %pR reserved by %s\n", &cfgres, in pci_acpi_setup_ecam_mapping()
1640 dev_name(&adev->dev)); in pci_acpi_setup_ecam_mapping()
1642 dev_warn(dev, FW_BUG "ECAM area %pR not reserved in ACPI namespace\n", in pci_acpi_setup_ecam_mapping()
1647 dev_err(dev, "%04x:%pR error %ld mapping ECAM\n", seg, bus_res, in pci_acpi_setup_ecam_mapping()
1661 pci_ecam_free(ri->cfg); in pci_acpi_generic_release_info()
1662 kfree(ci->ops); in pci_acpi_generic_release_info()
1684 ri->cfg = pci_acpi_setup_ecam_mapping(root); in pci_acpi_scan_root()
1685 if (!ri->cfg) { in pci_acpi_scan_root()
1691 root_ops->release_info = pci_acpi_generic_release_info; in pci_acpi_scan_root()
1692 root_ops->prepare_resources = pci_acpi_root_prepare_resources; in pci_acpi_scan_root()
1693 root_ops->pci_ops = (struct pci_ops *)&ri->cfg->ops->pci_ops; in pci_acpi_scan_root()
1694 bus = acpi_pci_root_create(root, root_ops, &ri->common, ri->cfg); in pci_acpi_scan_root()
1700 if (host->preserve_config) in pci_acpi_scan_root()
1709 list_for_each_entry(child, &bus->children, node) in pci_acpi_scan_root()