1 // SPDX-License-Identifier: GPL-2.0+
6  * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
8  * Copyright (C) 2003-2004 Intel Corporation
37 	 * assert presence detect--and those will still work, they will
51 	return ctrl->pcie->port;  in ctrl_dev()
60 	int retval, irq = ctrl->pcie->irq;  in pciehp_request_irq()
63 		ctrl->poll_thread = kthread_run(&pciehp_poll, ctrl,  in pciehp_request_irq()
64 						"pciehp_poll-%s",  in pciehp_request_irq()
66 		return PTR_ERR_OR_ZERO(ctrl->poll_thread);  in pciehp_request_irq()
81 		kthread_stop(ctrl->poll_thread);  in pciehp_free_irq()
83 		free_irq(ctrl->pcie->irq, ctrl);  in pciehp_free_irq()
86 static int pcie_poll_cmd(struct controller *ctrl, int timeout)  in pcie_poll_cmd()  argument
102 			ctrl->cmd_busy = 0;  in pcie_poll_cmd()
107 		timeout -= 10;  in pcie_poll_cmd()
108 	} while (timeout >= 0);  in pcie_poll_cmd()
109 	return 0;	/* timeout */  in pcie_poll_cmd()
116 	unsigned long cmd_timeout = ctrl->cmd_started + duration;  in pcie_wait_cmd()
117 	unsigned long now, timeout;  in pcie_wait_cmd()  local
127 	if (!ctrl->cmd_busy)  in pcie_wait_cmd()
136 		timeout = 1;  in pcie_wait_cmd()
138 		timeout = cmd_timeout - now;  in pcie_wait_cmd()
140 	if (ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE &&  in pcie_wait_cmd()
141 	    ctrl->slot_ctrl & PCI_EXP_SLTCTL_CCIE)  in pcie_wait_cmd()
142 		rc = wait_event_timeout(ctrl->queue, !ctrl->cmd_busy, timeout);  in pcie_wait_cmd()
144 		rc = pcie_poll_cmd(ctrl, jiffies_to_msecs(timeout));  in pcie_wait_cmd()
147 		ctrl_info(ctrl, "Timeout on hotplug command %#06x (issued %u msec ago)\n",  in pcie_wait_cmd()
148 			  ctrl->slot_ctrl,  in pcie_wait_cmd()
149 			  jiffies_to_msecs(jiffies - ctrl->cmd_started));  in pcie_wait_cmd()
163 	mutex_lock(&ctrl->ctrl_lock);  in pcie_do_write_cmd()
179 	ctrl->cmd_busy = 1;  in pcie_do_write_cmd()
181 	ctrl->slot_ctrl = slot_ctrl;  in pcie_do_write_cmd()
183 	ctrl->cmd_started = jiffies;  in pcie_do_write_cmd()
192 	if (pdev->broken_cmd_compl &&  in pcie_do_write_cmd()
194 		ctrl->cmd_busy = 0;  in pcie_do_write_cmd()
204 	mutex_unlock(&ctrl->ctrl_lock);  in pcie_do_write_cmd()
208  * pcie_write_cmd - Issue controller command
225  * pciehp_check_link_active() - Is the link active
233  * %-ENODEV.
243 		return -ENODEV;  in pciehp_check_link_active()
266 		delay -= step;  in pci_bus_check_dev()
270 		pr_debug("pci %04x:%02x:%02x.%d id reading try %d times with interval %d ms to get %08x\n",  in pci_bus_check_dev()
271 			pci_domain_nr(bus), bus->number, PCI_SLOT(devfn),  in pci_bus_check_dev()
279 	int timeout = 1250;  in pcie_wait_for_presence()  local
287 		timeout -= 10;  in pcie_wait_for_presence()
288 	} while (timeout > 0);  in pcie_wait_for_presence()
299 		return -1;  in pciehp_check_link_status()
302 	if (ctrl->inband_presence_disabled)  in pciehp_check_link_status()
305 	found = pci_bus_check_dev(ctrl->pcie->port->subordinate,  in pciehp_check_link_status()
311 			   &ctrl->pending_events);  in pciehp_check_link_status()
319 		return -1;  in pciehp_check_link_status()
323 	__pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status, linksta2);  in pciehp_check_link_status()
328 		return -1;  in pciehp_check_link_status()
374 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl);  in pciehp_get_attention_status()
401 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl);  in pciehp_get_power_status()
426  * pciehp_card_present() - Is the card present
435  * %-ENODEV.
445 		return -ENODEV;  in pciehp_card_present()
451  * pciehp_card_present_or_link_active() - whether given slot is occupied
460  *	    port is not present anymore returns %-ENODEV.
498  * pciehp_set_indicators() - set attention indicator, power indicator, or both
500  * @pwr: one of:
509  * Either @pwr or @attn can also be INDICATOR_NOOP to leave that indicator
512 void pciehp_set_indicators(struct controller *ctrl, int pwr, int attn)  in pciehp_set_indicators()  argument
516 	if (PWR_LED(ctrl) && pwr != INDICATOR_NOOP) {  in pciehp_set_indicators()
517 		cmd |= (pwr & PCI_EXP_SLTCTL_PIC);  in pciehp_set_indicators()
529 			 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd);  in pciehp_set_indicators()
539 	/* Clear power-fault bit from previous power failures */  in pciehp_power_on_slot()
544 	ctrl->power_fault_detected = 0;  in pciehp_power_on_slot()
548 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,  in pciehp_power_on_slot()
562 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,  in pciehp_power_off_slot()
571 	if (pci_dev_is_disconnected(ctrl->pcie->port))  in pciehp_device_replaced()
574 	pdev = pci_get_slot(ctrl->pcie->port->subordinate, PCI_DEVFN(0, 0));  in pciehp_device_replaced()
579 	    reg != (pdev->vendor | (pdev->device << 16)) ||  in pciehp_device_replaced()
581 	    reg != (pdev->revision | (pdev->class << 8)))  in pciehp_device_replaced()
584 	if (pdev->hdr_type == PCI_HEADER_TYPE_NORMAL &&  in pciehp_device_replaced()
586 	     reg != (pdev->subsystem_vendor | (pdev->subsystem_device << 16))))  in pciehp_device_replaced()
589 	if (pci_get_dsn(pdev) != ctrl->dsn)  in pciehp_device_replaced()
605 	atomic_and(~ignored_events, &ctrl->pending_events);  in pciehp_ignore_link_change()
616 	down_read_nested(&ctrl->reset_lock, ctrl->depth);  in pciehp_ignore_link_change()
619 	up_read(&ctrl->reset_lock);  in pciehp_ignore_link_change()
626 	struct device *parent = pdev->dev.parent;  in pciehp_isr()
633 	if (pdev->current_state == PCI_D3cold ||  in pciehp_isr()
634 	    (!(ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE) && !pciehp_poll_mode))  in pciehp_isr()
647 			atomic_or(RERUN_ISR, &ctrl->pending_events);  in pciehp_isr()
673 	if (ctrl->power_fault_detected)  in pciehp_isr()
676 		ctrl->power_fault_detected = true;  in pciehp_isr()
691 		 * So re-read the Slot Status register in case a bit was set  in pciehp_isr()
707 		ctrl->cmd_busy = 0;  in pciehp_isr()
709 		wake_up(&ctrl->queue);  in pciehp_isr()
717 	if (pdev->ignore_hotplug) {  in pciehp_isr()
723 	atomic_or(events, &ctrl->pending_events);  in pciehp_isr()
734 	ctrl->ist_running = true;  in pciehp_ist()
738 	if (atomic_fetch_and(~RERUN_ISR, &ctrl->pending_events) & RERUN_ISR) {  in pciehp_ist()
746 	events = atomic_xchg(&ctrl->pending_events, 0);  in pciehp_ist()
770 	    ctrl->state == ON_STATE) {  in pciehp_ist()
773 		if (!ctrl->inband_presence_disabled)  in pciehp_ist()
784 	down_read_nested(&ctrl->reset_lock, ctrl->depth);  in pciehp_ist()
789 	up_read(&ctrl->reset_lock);  in pciehp_ist()
794 	ctrl->ist_running = false;  in pciehp_ist()
795 	wake_up(&ctrl->requester);  in pciehp_ist()
808 		       atomic_read(&ctrl->pending_events))  in pciehp_poll()
836 	 * Always enable link events: thus link-up and link-down shall  in pcie_enable_notification()
857 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd);  in pcie_enable_notification()
870 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0);  in pcie_disable_notification()
894 	 * Mask hot-plug interrupt to prevent it triggering immediately  in pcie_disable_interrupt()
905  * pciehp_slot_reset() - ignore link event caused by error-induced hot reset
918 	if (ctrl->state != ON_STATE)  in pciehp_slot_reset()
921 	pcie_capability_write_word(dev->port, PCI_EXP_SLTSTA,  in pciehp_slot_reset()
933  * not seen as a hot-unplug, followed by the hot-plug of the device. Thus,
947 	down_write_nested(&ctrl->reset_lock, ctrl->depth);  in pciehp_reset_slot()
951 	rc = pci_bridge_secondary_bus_reset(ctrl->pcie->port);  in pciehp_reset_slot()
955 	up_write(&ctrl->reset_lock);  in pciehp_reset_slot()
962 		return -1;  in pcie_init_notification()
964 	ctrl->notification_enabled = 1;  in pcie_init_notification()
970 	if (ctrl->notification_enabled) {  in pcie_shutdown_notification()
973 		ctrl->notification_enabled = 0;  in pcie_shutdown_notification()
979 	struct pci_dev *pdev = ctrl->pcie->port;  in dbg_ctrl()
982 	ctrl_dbg(ctrl, "Slot Capabilities      : 0x%08x\n", ctrl->slot_cap);  in dbg_ctrl()
989 #define FLAG(x, y)	(((x) & (y)) ? '+' : '-')
993 	struct pci_bus *bus = dev->bus;  in pcie_hotplug_depth()
996 	while (bus->parent) {  in pcie_hotplug_depth()
997 		bus = bus->parent;  in pcie_hotplug_depth()
998 		if (bus->self && bus->self->is_pciehp)  in pcie_hotplug_depth()
1010 	struct pci_dev *pdev = dev->port;  in pcie_init()
1011 	struct pci_bus *subordinate = pdev->subordinate;  in pcie_init()
1017 	ctrl->pcie = dev;  in pcie_init()
1018 	ctrl->depth = pcie_hotplug_depth(dev->port);  in pcie_init()
1021 	if (pdev->hotplug_user_indicators)  in pcie_init()
1028 	if (pdev->is_thunderbolt)  in pcie_init()
1031 	ctrl->slot_cap = slot_cap;  in pcie_init()
1032 	mutex_init(&ctrl->ctrl_lock);  in pcie_init()
1033 	mutex_init(&ctrl->state_lock);  in pcie_init()
1034 	init_rwsem(&ctrl->reset_lock);  in pcie_init()
1035 	init_waitqueue_head(&ctrl->requester);  in pcie_init()
1036 	init_waitqueue_head(&ctrl->queue);  in pcie_init()
1037 	INIT_DELAYED_WORK(&ctrl->button_work, pciehp_queue_pushbutton_work);  in pcie_init()
1041 	ctrl->state = list_empty(&subordinate->devices) ? OFF_STATE : ON_STATE;  in pcie_init()
1048 		ctrl->inband_presence_disabled = 1;  in pcie_init()
1052 		ctrl->inband_presence_disabled = 1;  in pcie_init()
1072 		FLAG(pdev->link_active_reporting, true),  in pcie_init()
1073 		pdev->broken_cmd_compl ? " (with Cmd Compl erratum)" : "");  in pcie_init()
1089 		ctrl->dsn = pci_get_dsn(pdev);  in pcie_init()
1097 	cancel_delayed_work_sync(&ctrl->button_work);  in pciehp_release_ctrl()
1109 			pdev->broken_cmd_compl = 1;  in quirk_cmd_compl()