Lines Matching +full:pcie +full:- +full:is +full:- +full:gen1
1 // SPDX-License-Identifier: GPL-2.0+
3 * Rockchip AXI PCIe host controller driver
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Wenrui Li <wenrui.li@rock-chips.com>
29 #include "pcie-rockchip.h"
68 if (pci_is_root_bus(bus) || pci_is_root_bus(bus->parent)) in rockchip_pcie_valid_device()
79 if (rockchip->legacy_phy) in rockchip_pcie_lane_map()
80 return GENMASK(MAX_LANE_NUM - 1, 0); in rockchip_pcie_lane_map()
85 /* The link may be using a reverse-indexed mapping. */ in rockchip_pcie_lane_map()
97 addr = rockchip->apb_base + PCIE_RC_CONFIG_NORMAL_BASE + where; in rockchip_pcie_rd_own_conf()
124 addr = rockchip->apb_base + PCIE_RC_CONFIG_NORMAL_BASE + offset; in rockchip_pcie_wr_own_conf()
131 mask = ~(((1 << (size * 8)) - 1) << ((where & 0x3) * 8)); in rockchip_pcie_wr_own_conf()
151 addr = rockchip->reg_base + PCIE_ECAM_OFFSET(bus->number, devfn, where); in rockchip_pcie_rd_other_conf()
158 if (pci_is_root_bus(bus->parent)) in rockchip_pcie_rd_other_conf()
184 addr = rockchip->reg_base + PCIE_ECAM_OFFSET(bus->number, devfn, where); in rockchip_pcie_wr_other_conf()
189 if (pci_is_root_bus(bus->parent)) in rockchip_pcie_wr_other_conf()
211 struct rockchip_pcie *rockchip = bus->sysdata; in rockchip_pcie_rd_conf()
226 struct rockchip_pcie *rockchip = bus->sysdata; in rockchip_pcie_wr_conf()
248 if (IS_ERR(rockchip->vpcie3v3)) in rockchip_pcie_set_power_limit()
257 curr = regulator_get_current_limit(rockchip->vpcie3v3); in rockchip_pcie_set_power_limit()
266 dev_warn(rockchip->dev, "invalid power supply\n"); in rockchip_pcie_set_power_limit()
269 scale--; in rockchip_pcie_set_power_limit()
280 * rockchip_pcie_host_init_port - Initialize hardware
281 * @rockchip: PCIe port information
285 struct device *dev = rockchip->dev; in rockchip_pcie_host_init_port()
289 gpiod_set_value_cansleep(rockchip->perst_gpio, 0); in rockchip_pcie_host_init_port()
313 /* Enable Gen1 training */ in rockchip_pcie_host_init_port()
318 gpiod_set_value_cansleep(rockchip->perst_gpio, 1); in rockchip_pcie_host_init_port()
322 /* 500ms timeout value should be enough for Gen1/2 training */ in rockchip_pcie_host_init_port()
323 err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1, in rockchip_pcie_host_init_port()
327 dev_err(dev, "PCIe link training gen1 timeout!\n"); in rockchip_pcie_host_init_port()
331 if (rockchip->link_gen == 2) { in rockchip_pcie_host_init_port()
334 * gen1 finished. in rockchip_pcie_host_init_port()
344 err = readl_poll_timeout(rockchip->apb_base + PCIE_CORE_CTRL, in rockchip_pcie_host_init_port()
348 dev_dbg(dev, "PCIe link training gen2 timeout, fall back to gen1!\n"); in rockchip_pcie_host_init_port()
355 dev_dbg(dev, "current link width is x%d\n", status); in rockchip_pcie_host_init_port()
358 rockchip->lanes_map = rockchip_pcie_lane_map(rockchip); in rockchip_pcie_host_init_port()
360 if (!(rockchip->lanes_map & BIT(i))) { in rockchip_pcie_host_init_port()
362 phy_power_off(rockchip->phys[i]); in rockchip_pcie_host_init_port()
378 if (of_property_read_bool(dev->of_node, "aspm-no-l0s")) { in rockchip_pcie_host_init_port()
391 while (i--) in rockchip_pcie_host_init_port()
392 phy_power_off(rockchip->phys[i]); in rockchip_pcie_host_init_port()
394 while (i--) in rockchip_pcie_host_init_port()
395 phy_exit(rockchip->phys[i]); in rockchip_pcie_host_init_port()
402 struct device *dev = rockchip->dev; in rockchip_pcie_subsys_irq_handler()
468 struct device *dev = rockchip->dev; in rockchip_pcie_client_irq_handler()
511 struct device *dev = rockchip->dev; in rockchip_pcie_intx_handler()
522 hwirq = ffs(reg) - 1; in rockchip_pcie_intx_handler()
525 ret = generic_handle_domain_irq(rockchip->irq_domain, hwirq); in rockchip_pcie_intx_handler()
536 struct device *dev = rockchip->dev; in rockchip_pcie_setup_irq()
544 IRQF_SHARED, "pcie-sys", rockchip); in rockchip_pcie_setup_irq()
546 dev_err(dev, "failed to request PCIe subsystem IRQ\n"); in rockchip_pcie_setup_irq()
563 IRQF_SHARED, "pcie-client", rockchip); in rockchip_pcie_setup_irq()
565 dev_err(dev, "failed to request PCIe client IRQ\n"); in rockchip_pcie_setup_irq()
573 * rockchip_pcie_parse_host_dt - Parse Device Tree
574 * @rockchip: PCIe port information
580 struct device *dev = rockchip->dev; in rockchip_pcie_parse_host_dt()
587 rockchip->vpcie12v = devm_regulator_get_optional(dev, "vpcie12v"); in rockchip_pcie_parse_host_dt()
588 if (IS_ERR(rockchip->vpcie12v)) { in rockchip_pcie_parse_host_dt()
589 if (PTR_ERR(rockchip->vpcie12v) != -ENODEV) in rockchip_pcie_parse_host_dt()
590 return PTR_ERR(rockchip->vpcie12v); in rockchip_pcie_parse_host_dt()
594 rockchip->vpcie3v3 = devm_regulator_get_optional(dev, "vpcie3v3"); in rockchip_pcie_parse_host_dt()
595 if (IS_ERR(rockchip->vpcie3v3)) { in rockchip_pcie_parse_host_dt()
596 if (PTR_ERR(rockchip->vpcie3v3) != -ENODEV) in rockchip_pcie_parse_host_dt()
597 return PTR_ERR(rockchip->vpcie3v3); in rockchip_pcie_parse_host_dt()
601 rockchip->vpcie1v8 = devm_regulator_get(dev, "vpcie1v8"); in rockchip_pcie_parse_host_dt()
602 if (IS_ERR(rockchip->vpcie1v8)) in rockchip_pcie_parse_host_dt()
603 return PTR_ERR(rockchip->vpcie1v8); in rockchip_pcie_parse_host_dt()
605 rockchip->vpcie0v9 = devm_regulator_get(dev, "vpcie0v9"); in rockchip_pcie_parse_host_dt()
606 if (IS_ERR(rockchip->vpcie0v9)) in rockchip_pcie_parse_host_dt()
607 return PTR_ERR(rockchip->vpcie0v9); in rockchip_pcie_parse_host_dt()
614 struct device *dev = rockchip->dev; in rockchip_pcie_set_vpcie()
617 if (!IS_ERR(rockchip->vpcie12v)) { in rockchip_pcie_set_vpcie()
618 err = regulator_enable(rockchip->vpcie12v); in rockchip_pcie_set_vpcie()
625 if (!IS_ERR(rockchip->vpcie3v3)) { in rockchip_pcie_set_vpcie()
626 err = regulator_enable(rockchip->vpcie3v3); in rockchip_pcie_set_vpcie()
633 err = regulator_enable(rockchip->vpcie1v8); in rockchip_pcie_set_vpcie()
639 err = regulator_enable(rockchip->vpcie0v9); in rockchip_pcie_set_vpcie()
648 regulator_disable(rockchip->vpcie1v8); in rockchip_pcie_set_vpcie()
650 if (!IS_ERR(rockchip->vpcie3v3)) in rockchip_pcie_set_vpcie()
651 regulator_disable(rockchip->vpcie3v3); in rockchip_pcie_set_vpcie()
653 if (!IS_ERR(rockchip->vpcie12v)) in rockchip_pcie_set_vpcie()
654 regulator_disable(rockchip->vpcie12v); in rockchip_pcie_set_vpcie()
673 irq_set_chip_data(irq, domain->host_data); in rockchip_pcie_intx_map()
684 struct device *dev = rockchip->dev; in rockchip_pcie_init_irq_domain()
685 struct device_node *intc = of_get_next_child(dev->of_node, NULL); in rockchip_pcie_init_irq_domain()
688 dev_err(dev, "missing child interrupt-controller node\n"); in rockchip_pcie_init_irq_domain()
689 return -EINVAL; in rockchip_pcie_init_irq_domain()
692 rockchip->irq_domain = irq_domain_create_linear(of_fwnode_handle(intc), PCI_NUM_INTX, in rockchip_pcie_init_irq_domain()
695 if (!rockchip->irq_domain) { in rockchip_pcie_init_irq_domain()
697 return -EINVAL; in rockchip_pcie_init_irq_domain()
713 return -EINVAL; in rockchip_pcie_prog_ob_atu()
715 return -EINVAL; in rockchip_pcie_prog_ob_atu()
717 return -EINVAL; in rockchip_pcie_prog_ob_atu()
720 return -EINVAL; in rockchip_pcie_prog_ob_atu()
724 return -EINVAL; in rockchip_pcie_prog_ob_atu()
755 return -EINVAL; in rockchip_pcie_prog_ib_atu()
757 return -EINVAL; in rockchip_pcie_prog_ib_atu()
759 return -EINVAL; in rockchip_pcie_prog_ib_atu()
775 struct device *dev = rockchip->dev; in rockchip_pcie_cfg_atu()
785 entry = resource_list_first_type(&bridge->windows, IORESOURCE_MEM); in rockchip_pcie_cfg_atu()
787 return -ENODEV; in rockchip_pcie_cfg_atu()
789 size = resource_size(entry->res); in rockchip_pcie_cfg_atu()
790 pci_addr = entry->res->start - entry->offset; in rockchip_pcie_cfg_atu()
791 rockchip->msg_bus_addr = pci_addr; in rockchip_pcie_cfg_atu()
796 20 - 1, in rockchip_pcie_cfg_atu()
805 err = rockchip_pcie_prog_ib_atu(rockchip, 2, 32 - 1, 0x0, 0); in rockchip_pcie_cfg_atu()
811 entry = resource_list_first_type(&bridge->windows, IORESOURCE_IO); in rockchip_pcie_cfg_atu()
813 return -ENODEV; in rockchip_pcie_cfg_atu()
818 size = resource_size(entry->res); in rockchip_pcie_cfg_atu()
819 pci_addr = entry->res->start - entry->offset; in rockchip_pcie_cfg_atu()
825 20 - 1, in rockchip_pcie_cfg_atu()
837 20 - 1, 0, 0); in rockchip_pcie_cfg_atu()
839 rockchip->msg_bus_addr += ((reg_no + offset) << 20); in rockchip_pcie_cfg_atu()
849 writel(0x0, rockchip->msg_region + PCIE_RC_SEND_PME_OFF); in rockchip_pcie_wait_l2()
852 err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_DEBUG_OUT_0, in rockchip_pcie_wait_l2()
856 dev_err(rockchip->dev, "PCIe link enter L2 timeout!\n"); in rockchip_pcie_wait_l2()
883 regulator_disable(rockchip->vpcie0v9); in rockchip_pcie_suspend_noirq()
893 err = regulator_enable(rockchip->vpcie0v9); in rockchip_pcie_resume_noirq()
922 regulator_disable(rockchip->vpcie0v9); in rockchip_pcie_resume_noirq()
929 struct device *dev = &pdev->dev; in rockchip_pcie_probe()
933 if (!dev->of_node) in rockchip_pcie_probe()
934 return -ENODEV; in rockchip_pcie_probe()
938 return -ENOMEM; in rockchip_pcie_probe()
943 rockchip->dev = dev; in rockchip_pcie_probe()
944 rockchip->is_rc = true; in rockchip_pcie_probe()
972 rockchip->msg_region = devm_ioremap(dev, rockchip->msg_bus_addr, SZ_1M); in rockchip_pcie_probe()
973 if (!rockchip->msg_region) { in rockchip_pcie_probe()
974 err = -ENOMEM; in rockchip_pcie_probe()
978 bridge->sysdata = rockchip; in rockchip_pcie_probe()
979 bridge->ops = &rockchip_pcie_ops; in rockchip_pcie_probe()
994 irq_domain_remove(rockchip->irq_domain); in rockchip_pcie_probe()
998 if (!IS_ERR(rockchip->vpcie12v)) in rockchip_pcie_probe()
999 regulator_disable(rockchip->vpcie12v); in rockchip_pcie_probe()
1000 if (!IS_ERR(rockchip->vpcie3v3)) in rockchip_pcie_probe()
1001 regulator_disable(rockchip->vpcie3v3); in rockchip_pcie_probe()
1002 regulator_disable(rockchip->vpcie1v8); in rockchip_pcie_probe()
1003 regulator_disable(rockchip->vpcie0v9); in rockchip_pcie_probe()
1011 struct device *dev = &pdev->dev; in rockchip_pcie_remove()
1015 pci_stop_root_bus(bridge->bus); in rockchip_pcie_remove()
1016 pci_remove_root_bus(bridge->bus); in rockchip_pcie_remove()
1017 irq_domain_remove(rockchip->irq_domain); in rockchip_pcie_remove()
1023 if (!IS_ERR(rockchip->vpcie12v)) in rockchip_pcie_remove()
1024 regulator_disable(rockchip->vpcie12v); in rockchip_pcie_remove()
1025 if (!IS_ERR(rockchip->vpcie3v3)) in rockchip_pcie_remove()
1026 regulator_disable(rockchip->vpcie3v3); in rockchip_pcie_remove()
1027 regulator_disable(rockchip->vpcie1v8); in rockchip_pcie_remove()
1028 regulator_disable(rockchip->vpcie0v9); in rockchip_pcie_remove()
1037 { .compatible = "rockchip,rk3399-pcie", },
1044 .name = "rockchip-pcie",
1054 MODULE_DESCRIPTION("Rockchip AXI PCIe driver");