Lines Matching +full:pcie +full:- +full:host +full:- +full:1

1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe driver for Renesas R-Car SoCs
4 * Copyright (C) 2014-2020 Renesas Electronics Europe Ltd
7 * arch/sh/drivers/pci/pcie-sh7786.c
8 * arch/sh/drivers/pci/ops-sh7786.c
9 * Copyright (C) 2009 - 2011 Paul Mundt
17 #include <linux/clk-provider.h>
21 #include <linux/irqchip/irq-msi-lib.h>
36 #include "pcie-rcar.h"
47 /* Structure representing the PCIe interface */
49 struct rcar_pcie pcie; member
53 int (*phy_init_fn)(struct rcar_pcie_host *host);
62 return -EINVAL; in rcar_pcie_wakeup()
67 * Test if the PCIe controller received PM_ENTER_L1 DLLP and in rcar_pcie_wakeup()
68 * the PCIe controller is not in L1 link state. If true, apply in rcar_pcie_wakeup()
92 static u32 rcar_read_conf(struct rcar_pcie *pcie, int where) in rcar_read_conf() argument
95 u32 val = rcar_pci_read_reg(pcie, where & ~3); in rcar_read_conf()
102 " .arch armv7-a\n" \
103 "1: " instr " %1, [%2]\n" \
112 " .long 1b, 4b\n" \
117 static int rcar_pci_write_reg_workaround(struct rcar_pcie *pcie, u32 val, in rcar_pci_write_reg_workaround() argument
124 : "+r"(error):"r"(val), "r"(pcie->base + reg) : "memory"); in rcar_pci_write_reg_workaround()
126 rcar_pci_write_reg(pcie, val, reg); in rcar_pci_write_reg_workaround()
131 static int rcar_pci_read_reg_workaround(struct rcar_pcie *pcie, u32 *val, in rcar_pci_read_reg_workaround() argument
138 : "+r"(error), "=r"(*val) : "r"(pcie->base + reg) : "memory"); in rcar_pci_read_reg_workaround()
143 *val = rcar_pci_read_reg(pcie, reg); in rcar_pci_read_reg_workaround()
149 static int rcar_pcie_config_access(struct rcar_pcie_host *host, in rcar_pcie_config_access() argument
153 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_config_access() local
158 ret = rcar_pcie_wakeup(pcie->dev, pcie->base); in rcar_pcie_config_access()
170 * While each channel has its own memory-mapped extended config in rcar_pcie_config_access()
173 * itself with either type 0 or type 1 accesses, and indeed, any in rcar_pcie_config_access()
174 * controller-initiated target transfer to its own config space in rcar_pcie_config_access()
178 * the same channel <-> device access works for any PCI_SLOT() in rcar_pcie_config_access()
180 * space to devfn 0 in order to enable self-enumeration. In this in rcar_pcie_config_access()
189 *data = rcar_pci_read_reg(pcie, PCICONF(index)); in rcar_pcie_config_access()
191 rcar_pci_write_reg(pcie, *data, PCICONF(index)); in rcar_pcie_config_access()
197 rcar_pci_write_reg(pcie, rcar_pci_read_reg(pcie, PCIEERRFR), PCIEERRFR); in rcar_pcie_config_access()
200 rcar_pci_write_reg(pcie, PCIE_CONF_BUS(bus->number) | in rcar_pcie_config_access()
204 if (pci_is_root_bus(bus->parent)) in rcar_pcie_config_access()
205 rcar_pci_write_reg(pcie, PCIECCTLR_CCIE | TYPE0, PCIECCTLR); in rcar_pcie_config_access()
207 rcar_pci_write_reg(pcie, PCIECCTLR_CCIE | TYPE1, PCIECCTLR); in rcar_pcie_config_access()
210 if (rcar_pci_read_reg(pcie, PCIEERRFR) & UNSUPPORTED_REQUEST) in rcar_pcie_config_access()
214 if (rcar_read_conf(pcie, RCONF(PCI_STATUS)) & in rcar_pcie_config_access()
219 ret = rcar_pci_read_reg_workaround(pcie, data, PCIECDR); in rcar_pcie_config_access()
221 ret = rcar_pci_write_reg_workaround(pcie, *data, PCIECDR); in rcar_pcie_config_access()
224 rcar_pci_write_reg(pcie, 0, PCIECCTLR); in rcar_pcie_config_access()
232 struct rcar_pcie_host *host = bus->sysdata; in rcar_pcie_read_conf() local
235 ret = rcar_pcie_config_access(host, RCAR_PCI_ACCESS_READ, in rcar_pcie_read_conf()
240 if (size == 1) in rcar_pcie_read_conf()
245 dev_dbg(&bus->dev, "pcie-config-read: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08x\n", in rcar_pcie_read_conf()
246 bus->number, devfn, where, size, *val); in rcar_pcie_read_conf()
255 struct rcar_pcie_host *host = bus->sysdata; in rcar_pcie_write_conf() local
260 ret = rcar_pcie_config_access(host, RCAR_PCI_ACCESS_READ, in rcar_pcie_write_conf()
265 dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08x\n", in rcar_pcie_write_conf()
266 bus->number, devfn, where, size, val); in rcar_pcie_write_conf()
268 if (size == 1) { in rcar_pcie_write_conf()
279 ret = rcar_pcie_config_access(host, RCAR_PCI_ACCESS_WRITE, in rcar_pcie_write_conf()
290 static void rcar_pcie_force_speedup(struct rcar_pcie *pcie) in rcar_pcie_force_speedup() argument
292 struct device *dev = pcie->dev; in rcar_pcie_force_speedup()
296 if ((rcar_pci_read_reg(pcie, MACS2R) & LINK_SPEED) != LINK_SPEED_5_0GTS) in rcar_pcie_force_speedup()
299 if (rcar_pci_read_reg(pcie, MACCTLR) & SPEED_CHANGE) { in rcar_pcie_force_speedup()
304 macsr = rcar_pci_read_reg(pcie, MACSR); in rcar_pcie_force_speedup()
309 rcar_rmw32(pcie, EXPCAP(12), PCI_EXP_LNKSTA_CLS, in rcar_pcie_force_speedup()
313 rcar_rmw32(pcie, MACCGSPSETR, SPCNGRSN, 0); in rcar_pcie_force_speedup()
317 rcar_pci_write_reg(pcie, macsr, MACSR); in rcar_pcie_force_speedup()
320 rcar_rmw32(pcie, MACCTLR, SPEED_CHANGE, SPEED_CHANGE); in rcar_pcie_force_speedup()
322 while (timeout--) { in rcar_pcie_force_speedup()
323 macsr = rcar_pci_read_reg(pcie, MACSR); in rcar_pcie_force_speedup()
326 rcar_pci_write_reg(pcie, macsr, MACSR); in rcar_pcie_force_speedup()
334 msleep(1); in rcar_pcie_force_speedup()
344 static void rcar_pcie_hw_enable(struct rcar_pcie_host *host) in rcar_pcie_hw_enable() argument
346 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_hw_enable() local
347 struct pci_host_bridge *bridge = pci_host_bridge_from_priv(host); in rcar_pcie_hw_enable()
353 rcar_pcie_force_speedup(pcie); in rcar_pcie_hw_enable()
356 resource_list_for_each_entry(win, &bridge->windows) { in rcar_pcie_hw_enable()
357 struct resource *res = win->res; in rcar_pcie_hw_enable()
359 if (!res->flags) in rcar_pcie_hw_enable()
365 rcar_pcie_set_outbound(pcie, i, win); in rcar_pcie_hw_enable()
372 static int rcar_pcie_enable(struct rcar_pcie_host *host) in rcar_pcie_enable() argument
374 struct pci_host_bridge *bridge = pci_host_bridge_from_priv(host); in rcar_pcie_enable()
376 rcar_pcie_hw_enable(host); in rcar_pcie_enable()
380 bridge->sysdata = host; in rcar_pcie_enable()
381 bridge->ops = &rcar_pcie_ops; in rcar_pcie_enable()
386 static int phy_wait_for_ack(struct rcar_pcie *pcie) in phy_wait_for_ack() argument
388 struct device *dev = pcie->dev; in phy_wait_for_ack()
391 while (timeout--) { in phy_wait_for_ack()
392 if (rcar_pci_read_reg(pcie, H1_PCIEPHYADRR) & PHY_ACK) in phy_wait_for_ack()
398 dev_err(dev, "Access to PCIe phy timed out\n"); in phy_wait_for_ack()
400 return -ETIMEDOUT; in phy_wait_for_ack()
403 static void phy_write_reg(struct rcar_pcie *pcie, in phy_write_reg() argument
410 ((rate & 1) << RATE_POS) | in phy_write_reg()
415 rcar_pci_write_reg(pcie, data, H1_PCIEPHYDOUTR); in phy_write_reg()
416 rcar_pci_write_reg(pcie, phyaddr, H1_PCIEPHYADRR); in phy_write_reg()
419 phy_wait_for_ack(pcie); in phy_write_reg()
422 rcar_pci_write_reg(pcie, 0, H1_PCIEPHYDOUTR); in phy_write_reg()
423 rcar_pci_write_reg(pcie, 0, H1_PCIEPHYADRR); in phy_write_reg()
426 phy_wait_for_ack(pcie); in phy_write_reg()
429 static int rcar_pcie_hw_init(struct rcar_pcie *pcie) in rcar_pcie_hw_init() argument
434 rcar_pci_write_reg(pcie, 0, PCIETCTLR); in rcar_pcie_hw_init()
437 rcar_pci_write_reg(pcie, 1, PCIEMSR); in rcar_pcie_hw_init()
439 err = rcar_pcie_wait_for_phyrdy(pcie); in rcar_pcie_hw_init()
444 * Initial header for port config space is type 1, set the device in rcar_pcie_hw_init()
448 rcar_pci_write_reg(pcie, PCI_CLASS_BRIDGE_PCI_NORMAL << 8, IDSETR1); in rcar_pcie_hw_init()
454 rcar_rmw32(pcie, RCONF(PCI_SECONDARY_BUS), 0xff, 1); in rcar_pcie_hw_init()
455 rcar_rmw32(pcie, RCONF(PCI_SUBORDINATE_BUS), 0xff, 1); in rcar_pcie_hw_init()
458 rcar_rmw32(pcie, REXPCAP(0), 0xff, PCI_CAP_ID_EXP); in rcar_pcie_hw_init()
459 rcar_rmw32(pcie, REXPCAP(PCI_EXP_FLAGS), in rcar_pcie_hw_init()
461 rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), PCI_HEADER_TYPE_MASK, in rcar_pcie_hw_init()
465 rcar_rmw32(pcie, REXPCAP(PCI_EXP_LNKCAP), PCI_EXP_LNKCAP_DLLLARC, in rcar_pcie_hw_init()
469 rcar_rmw32(pcie, REXPCAP(PCI_EXP_SLTCAP), PCI_EXP_SLTCAP_PSN, 0); in rcar_pcie_hw_init()
472 rcar_rmw32(pcie, TLCTLR + 1, 0x3f, 50); in rcar_pcie_hw_init()
475 rcar_rmw32(pcie, RVCCAP(0), 0xfff00000, 0); in rcar_pcie_hw_init()
479 rcar_pci_write_reg(pcie, 0x801f0000, PCIEMSITXR); in rcar_pcie_hw_init()
481 rcar_pci_write_reg(pcie, MACCTLR_INIT_VAL, MACCTLR); in rcar_pcie_hw_init()
483 /* Finish initialization - establish a PCI Express link */ in rcar_pcie_hw_init()
484 rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR); in rcar_pcie_hw_init()
487 err = rcar_pcie_wait_for_dl(pcie); in rcar_pcie_hw_init()
492 rcar_rmw32(pcie, PCIEINTXR, 0, 0xF << 8); in rcar_pcie_hw_init()
499 static int rcar_pcie_phy_init_h1(struct rcar_pcie_host *host) in rcar_pcie_phy_init_h1() argument
501 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_phy_init_h1() local
504 phy_write_reg(pcie, 0, 0x42, 0x1, 0x0EC34191); in rcar_pcie_phy_init_h1()
505 phy_write_reg(pcie, 1, 0x42, 0x1, 0x0EC34180); in rcar_pcie_phy_init_h1()
506 phy_write_reg(pcie, 0, 0x43, 0x1, 0x00210188); in rcar_pcie_phy_init_h1()
507 phy_write_reg(pcie, 1, 0x43, 0x1, 0x00210188); in rcar_pcie_phy_init_h1()
508 phy_write_reg(pcie, 0, 0x44, 0x1, 0x015C0014); in rcar_pcie_phy_init_h1()
509 phy_write_reg(pcie, 1, 0x44, 0x1, 0x015C0014); in rcar_pcie_phy_init_h1()
510 phy_write_reg(pcie, 1, 0x4C, 0x1, 0x786174A0); in rcar_pcie_phy_init_h1()
511 phy_write_reg(pcie, 1, 0x4D, 0x1, 0x048000BB); in rcar_pcie_phy_init_h1()
512 phy_write_reg(pcie, 0, 0x51, 0x1, 0x079EC062); in rcar_pcie_phy_init_h1()
513 phy_write_reg(pcie, 0, 0x52, 0x1, 0x20000000); in rcar_pcie_phy_init_h1()
514 phy_write_reg(pcie, 1, 0x52, 0x1, 0x20000000); in rcar_pcie_phy_init_h1()
515 phy_write_reg(pcie, 1, 0x56, 0x1, 0x00003806); in rcar_pcie_phy_init_h1()
517 phy_write_reg(pcie, 0, 0x60, 0x1, 0x004B03A5); in rcar_pcie_phy_init_h1()
518 phy_write_reg(pcie, 0, 0x64, 0x1, 0x3F0F1F0F); in rcar_pcie_phy_init_h1()
519 phy_write_reg(pcie, 0, 0x66, 0x1, 0x00008000); in rcar_pcie_phy_init_h1()
524 static int rcar_pcie_phy_init_gen2(struct rcar_pcie_host *host) in rcar_pcie_phy_init_gen2() argument
526 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_phy_init_gen2() local
529 * These settings come from the R-Car Series, 2nd Generation User's in rcar_pcie_phy_init_gen2()
530 * Manual, section 50.3.1 (2) Initialization of the physical layer. in rcar_pcie_phy_init_gen2()
532 rcar_pci_write_reg(pcie, 0x000f0030, GEN2_PCIEPHYADDR); in rcar_pcie_phy_init_gen2()
533 rcar_pci_write_reg(pcie, 0x00381203, GEN2_PCIEPHYDATA); in rcar_pcie_phy_init_gen2()
534 rcar_pci_write_reg(pcie, 0x00000001, GEN2_PCIEPHYCTRL); in rcar_pcie_phy_init_gen2()
535 rcar_pci_write_reg(pcie, 0x00000006, GEN2_PCIEPHYCTRL); in rcar_pcie_phy_init_gen2()
537 rcar_pci_write_reg(pcie, 0x000f0054, GEN2_PCIEPHYADDR); in rcar_pcie_phy_init_gen2()
539 rcar_pci_write_reg(pcie, 0x13802007, GEN2_PCIEPHYDATA); in rcar_pcie_phy_init_gen2()
540 rcar_pci_write_reg(pcie, 0x00000001, GEN2_PCIEPHYCTRL); in rcar_pcie_phy_init_gen2()
541 rcar_pci_write_reg(pcie, 0x00000006, GEN2_PCIEPHYCTRL); in rcar_pcie_phy_init_gen2()
546 static int rcar_pcie_phy_init_gen3(struct rcar_pcie_host *host) in rcar_pcie_phy_init_gen3() argument
550 err = phy_init(host->phy); in rcar_pcie_phy_init_gen3()
554 err = phy_power_on(host->phy); in rcar_pcie_phy_init_gen3()
556 phy_exit(host->phy); in rcar_pcie_phy_init_gen3()
563 struct rcar_pcie_host *host = data; in rcar_pcie_msi_irq() local
564 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_msi_irq() local
565 struct rcar_msi *msi = &host->msi; in rcar_pcie_msi_irq()
566 struct device *dev = pcie->dev; in rcar_pcie_msi_irq()
569 reg = rcar_pci_read_reg(pcie, PCIEMSIFR); in rcar_pcie_msi_irq()
571 /* MSI & INTx share an interrupt - we only handle MSI here */ in rcar_pcie_msi_irq()
579 ret = generic_handle_domain_irq(msi->domain, index); in rcar_pcie_msi_irq()
583 rcar_pci_write_reg(pcie, BIT(index), PCIEMSIFR); in rcar_pcie_msi_irq()
587 reg = rcar_pci_read_reg(pcie, PCIEMSIFR); in rcar_pcie_msi_irq()
596 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_msi_irq_ack() local
599 rcar_pci_write_reg(pcie, BIT(d->hwirq), PCIEMSIFR); in rcar_msi_irq_ack()
605 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_msi_irq_mask() local
608 scoped_guard(raw_spinlock_irqsave, &msi->mask_lock) { in rcar_msi_irq_mask()
609 value = rcar_pci_read_reg(pcie, PCIEMSIIER); in rcar_msi_irq_mask()
610 value &= ~BIT(d->hwirq); in rcar_msi_irq_mask()
611 rcar_pci_write_reg(pcie, value, PCIEMSIIER); in rcar_msi_irq_mask()
618 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_msi_irq_unmask() local
621 scoped_guard(raw_spinlock_irqsave, &msi->mask_lock) { in rcar_msi_irq_unmask()
622 value = rcar_pci_read_reg(pcie, PCIEMSIIER); in rcar_msi_irq_unmask()
623 value |= BIT(d->hwirq); in rcar_msi_irq_unmask()
624 rcar_pci_write_reg(pcie, value, PCIEMSIIER); in rcar_msi_irq_unmask()
631 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_compose_msi_msg() local
633 msg->address_lo = rcar_pci_read_reg(pcie, PCIEMSIALR) & ~MSIFE; in rcar_compose_msi_msg()
634 msg->address_hi = rcar_pci_read_reg(pcie, PCIEMSIAUR); in rcar_compose_msi_msg()
635 msg->data = data->hwirq; in rcar_compose_msi_msg()
639 .name = "R-Car MSI",
649 struct rcar_msi *msi = domain->host_data; in rcar_msi_domain_alloc()
653 mutex_lock(&msi->map_lock); in rcar_msi_domain_alloc()
655 hwirq = bitmap_find_free_region(msi->used, INT_PCI_MSI_NR, order_base_2(nr_irqs)); in rcar_msi_domain_alloc()
657 mutex_unlock(&msi->map_lock); in rcar_msi_domain_alloc()
660 return -ENOSPC; in rcar_msi_domain_alloc()
664 &rcar_msi_bottom_chip, domain->host_data, in rcar_msi_domain_alloc()
674 struct rcar_msi *msi = domain->host_data; in rcar_msi_domain_free()
676 mutex_lock(&msi->map_lock); in rcar_msi_domain_free()
678 bitmap_release_region(msi->used, d->hwirq, order_base_2(nr_irqs)); in rcar_msi_domain_free()
680 mutex_unlock(&msi->map_lock); in rcar_msi_domain_free()
701 .prefix = "RCAR-",
707 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_allocate_domains() local
709 .fwnode = dev_fwnode(pcie->dev), in rcar_allocate_domains()
715 msi->domain = msi_create_parent_irq_domain(&info, &rcar_msi_parent_ops); in rcar_allocate_domains()
716 if (!msi->domain) { in rcar_allocate_domains()
717 dev_err(pcie->dev, "failed to create IRQ domain\n"); in rcar_allocate_domains()
718 return -ENOMEM; in rcar_allocate_domains()
726 irq_domain_remove(msi->domain); in rcar_free_domains()
729 static int rcar_pcie_enable_msi(struct rcar_pcie_host *host) in rcar_pcie_enable_msi() argument
731 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_enable_msi() local
732 struct device *dev = pcie->dev; in rcar_pcie_enable_msi()
733 struct rcar_msi *msi = &host->msi; in rcar_pcie_enable_msi()
737 mutex_init(&msi->map_lock); in rcar_pcie_enable_msi()
738 raw_spin_lock_init(&msi->mask_lock); in rcar_pcie_enable_msi()
740 err = of_address_to_resource(dev->of_node, 0, &res); in rcar_pcie_enable_msi()
748 /* Two IRQs are for MSI, but they are also used for non-MSI IRQs */ in rcar_pcie_enable_msi()
749 err = devm_request_irq(dev, msi->irq1, rcar_pcie_msi_irq, in rcar_pcie_enable_msi()
751 rcar_msi_bottom_chip.name, host); in rcar_pcie_enable_msi()
757 err = devm_request_irq(dev, msi->irq2, rcar_pcie_msi_irq, in rcar_pcie_enable_msi()
759 rcar_msi_bottom_chip.name, host); in rcar_pcie_enable_msi()
766 rcar_pci_write_reg(pcie, 0, PCIEMSIIER); in rcar_pcie_enable_msi()
770 * to be in the low 32bit range on any R-Car HW. in rcar_pcie_enable_msi()
772 rcar_pci_write_reg(pcie, lower_32_bits(res.start) | MSIFE, PCIEMSIALR); in rcar_pcie_enable_msi()
773 rcar_pci_write_reg(pcie, upper_32_bits(res.start), PCIEMSIAUR); in rcar_pcie_enable_msi()
782 static void rcar_pcie_teardown_msi(struct rcar_pcie_host *host) in rcar_pcie_teardown_msi() argument
784 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_teardown_msi() local
787 rcar_pci_write_reg(pcie, 0, PCIEMSIIER); in rcar_pcie_teardown_msi()
790 rcar_pci_write_reg(pcie, 0, PCIEMSIALR); in rcar_pcie_teardown_msi()
792 rcar_free_domains(&host->msi); in rcar_pcie_teardown_msi()
795 static int rcar_pcie_get_resources(struct rcar_pcie_host *host) in rcar_pcie_get_resources() argument
797 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_get_resources() local
798 struct device *dev = pcie->dev; in rcar_pcie_get_resources()
802 host->phy = devm_phy_optional_get(dev, "pcie"); in rcar_pcie_get_resources()
803 if (IS_ERR(host->phy)) in rcar_pcie_get_resources()
804 return PTR_ERR(host->phy); in rcar_pcie_get_resources()
806 err = of_address_to_resource(dev->of_node, 0, &res); in rcar_pcie_get_resources()
810 pcie->base = devm_ioremap_resource(dev, &res); in rcar_pcie_get_resources()
811 if (IS_ERR(pcie->base)) in rcar_pcie_get_resources()
812 return PTR_ERR(pcie->base); in rcar_pcie_get_resources()
814 host->bus_clk = devm_clk_get(dev, "pcie_bus"); in rcar_pcie_get_resources()
815 if (IS_ERR(host->bus_clk)) { in rcar_pcie_get_resources()
816 dev_err(dev, "cannot get pcie bus clock\n"); in rcar_pcie_get_resources()
817 return PTR_ERR(host->bus_clk); in rcar_pcie_get_resources()
820 i = irq_of_parse_and_map(dev->of_node, 0); in rcar_pcie_get_resources()
823 err = -ENOENT; in rcar_pcie_get_resources()
826 host->msi.irq1 = i; in rcar_pcie_get_resources()
828 i = irq_of_parse_and_map(dev->of_node, 1); in rcar_pcie_get_resources()
831 err = -ENOENT; in rcar_pcie_get_resources()
834 host->msi.irq2 = i; in rcar_pcie_get_resources()
839 irq_dispose_mapping(host->msi.irq1); in rcar_pcie_get_resources()
844 static int rcar_pcie_inbound_ranges(struct rcar_pcie *pcie, in rcar_pcie_inbound_ranges() argument
848 u64 restype = entry->res->flags; in rcar_pcie_inbound_ranges()
849 u64 cpu_addr = entry->res->start; in rcar_pcie_inbound_ranges()
850 u64 cpu_end = entry->res->end; in rcar_pcie_inbound_ranges()
851 u64 pci_addr = entry->res->start - entry->offset; in rcar_pcie_inbound_ranges()
854 u64 size = resource_size(entry->res); in rcar_pcie_inbound_ranges()
861 if (idx >= MAX_NR_INBOUND_MAPS - 1) { in rcar_pcie_inbound_ranges()
862 dev_err(pcie->dev, "Failed to map inbound regions!\n"); in rcar_pcie_inbound_ranges()
863 return -EINVAL; in rcar_pcie_inbound_ranges()
873 u64 alignment = 1ULL << nr_zeros; in rcar_pcie_inbound_ranges()
879 size = min(size, 1ULL << 32); in rcar_pcie_inbound_ranges()
881 mask = roundup_pow_of_two(size) - 1; in rcar_pcie_inbound_ranges()
884 rcar_pcie_set_inbound(pcie, cpu_addr, pci_addr, in rcar_pcie_inbound_ranges()
896 static int rcar_pcie_parse_map_dma_ranges(struct rcar_pcie_host *host) in rcar_pcie_parse_map_dma_ranges() argument
898 struct pci_host_bridge *bridge = pci_host_bridge_from_priv(host); in rcar_pcie_parse_map_dma_ranges()
902 resource_list_for_each_entry(entry, &bridge->dma_ranges) { in rcar_pcie_parse_map_dma_ranges()
903 err = rcar_pcie_inbound_ranges(&host->pcie, entry, &index); in rcar_pcie_parse_map_dma_ranges()
912 { .compatible = "renesas,pcie-r8a7779",
914 { .compatible = "renesas,pcie-r8a7790",
916 { .compatible = "renesas,pcie-r8a7791",
918 { .compatible = "renesas,pcie-rcar-gen2",
920 { .compatible = "renesas,pcie-r8a7795",
922 { .compatible = "renesas,pcie-rcar-gen3",
936 struct device *dev = &pdev->dev; in rcar_pcie_probe()
938 struct rcar_pcie_host *host; in rcar_pcie_probe() local
939 struct rcar_pcie *pcie; in rcar_pcie_probe() local
944 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*host)); in rcar_pcie_probe()
946 return -ENOMEM; in rcar_pcie_probe()
948 host = pci_host_bridge_priv(bridge); in rcar_pcie_probe()
949 pcie = &host->pcie; in rcar_pcie_probe()
950 pcie->dev = dev; in rcar_pcie_probe()
951 platform_set_drvdata(pdev, host); in rcar_pcie_probe()
955 if (err < 0 && err != -ENODEV) in rcar_pcie_probe()
960 pm_runtime_enable(pcie->dev); in rcar_pcie_probe()
961 err = pm_runtime_get_sync(pcie->dev); in rcar_pcie_probe()
963 dev_err(pcie->dev, "pm_runtime_get_sync failed\n"); in rcar_pcie_probe()
967 err = rcar_pcie_get_resources(host); in rcar_pcie_probe()
973 err = clk_prepare_enable(host->bus_clk); in rcar_pcie_probe()
979 err = rcar_pcie_parse_map_dma_ranges(host); in rcar_pcie_probe()
983 host->phy_init_fn = of_device_get_match_data(dev); in rcar_pcie_probe()
984 err = host->phy_init_fn(host); in rcar_pcie_probe()
986 dev_err(dev, "failed to init PCIe PHY\n"); in rcar_pcie_probe()
991 if (rcar_pcie_hw_init(pcie)) { in rcar_pcie_probe()
992 dev_info(dev, "PCIe link down\n"); in rcar_pcie_probe()
993 err = -ENODEV; in rcar_pcie_probe()
997 data = rcar_pci_read_reg(pcie, MACSR); in rcar_pcie_probe()
998 dev_info(dev, "PCIe x%d: link up\n", (data >> 20) & 0x3f); in rcar_pcie_probe()
1001 err = rcar_pcie_enable_msi(host); in rcar_pcie_probe()
1010 err = rcar_pcie_enable(host); in rcar_pcie_probe()
1018 rcar_pcie_teardown_msi(host); in rcar_pcie_probe()
1021 if (host->phy) { in rcar_pcie_probe()
1022 phy_power_off(host->phy); in rcar_pcie_probe()
1023 phy_exit(host->phy); in rcar_pcie_probe()
1027 clk_disable_unprepare(host->bus_clk); in rcar_pcie_probe()
1030 irq_dispose_mapping(host->msi.irq2); in rcar_pcie_probe()
1031 irq_dispose_mapping(host->msi.irq1); in rcar_pcie_probe()
1042 struct rcar_pcie_host *host = dev_get_drvdata(dev); in rcar_pcie_resume() local
1043 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_resume() local
1047 err = rcar_pcie_parse_map_dma_ranges(host); in rcar_pcie_resume()
1052 err = host->phy_init_fn(host); in rcar_pcie_resume()
1054 dev_info(dev, "PCIe link down\n"); in rcar_pcie_resume()
1058 data = rcar_pci_read_reg(pcie, MACSR); in rcar_pcie_resume()
1059 dev_info(dev, "PCIe x%d: link up\n", (data >> 20) & 0x3f); in rcar_pcie_resume()
1066 of_address_to_resource(dev->of_node, 0, &res); in rcar_pcie_resume()
1067 rcar_pci_write_reg(pcie, upper_32_bits(res.start), PCIEMSIAUR); in rcar_pcie_resume()
1068 rcar_pci_write_reg(pcie, lower_32_bits(res.start) | MSIFE, PCIEMSIALR); in rcar_pcie_resume()
1070 bitmap_to_arr32(&val, host->msi.used, INT_PCI_MSI_NR); in rcar_pcie_resume()
1071 rcar_pci_write_reg(pcie, val, PCIEMSIIER); in rcar_pcie_resume()
1074 rcar_pcie_hw_enable(host); in rcar_pcie_resume()
1081 struct rcar_pcie_host *host = dev_get_drvdata(dev); in rcar_pcie_resume_noirq() local
1082 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_resume_noirq() local
1084 if (rcar_pci_read_reg(pcie, PMSR) && in rcar_pcie_resume_noirq()
1085 !(rcar_pci_read_reg(pcie, PCIETCTLR) & DL_DOWN)) in rcar_pcie_resume_noirq()
1088 /* Re-establish the PCIe link */ in rcar_pcie_resume_noirq()
1089 rcar_pci_write_reg(pcie, MACCTLR_INIT_VAL, MACCTLR); in rcar_pcie_resume_noirq()
1090 rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR); in rcar_pcie_resume_noirq()
1091 return rcar_pcie_wait_for_dl(pcie); in rcar_pcie_resume_noirq()
1101 .name = "rcar-pcie",
1117 { .compatible = "renesas,pcie-r8a7779" },
1118 { .compatible = "renesas,pcie-r8a7790" },
1119 { .compatible = "renesas,pcie-r8a7791" },
1120 { .compatible = "renesas,pcie-rcar-gen2" },