1 // SPDX-License-Identifier: GPL-2.0
3  *  pci-rcar-gen2: internal PCI bus support
18 #include <linux/pci.h>
24 #include "../pci.h"
26 /* AHB-PCI Bridge PCI communication registers */
104 /* PCI configuration space operations */
108 	struct rcar_pci *priv = bus->sysdata;  in rcar_pci_cfg_base()
114 	/* Only one EHCI/OHCI device built-in */  in rcar_pci_cfg_base()
126 	iowrite32(val, priv->reg + RCAR_AHBPCI_WIN1_CTR_REG);  in rcar_pci_cfg_base()
127 	return priv->reg + (slot >> 1) * 0x100 + where;  in rcar_pci_cfg_base()
136 	struct device *dev = priv->dev;  in rcar_pci_err_irq()
137 	u32 status = ioread32(priv->reg + RCAR_PCI_INT_STATUS_REG);  in rcar_pci_err_irq()
144 			  priv->reg + RCAR_PCI_INT_STATUS_REG);  in rcar_pci_err_irq()
153 	struct device *dev = priv->dev;  in rcar_pci_setup_errirq()
157 	ret = devm_request_irq(dev, priv->irq, rcar_pci_err_irq,  in rcar_pci_setup_errirq()
164 	val = ioread32(priv->reg + RCAR_PCI_INT_ENABLE_REG);  in rcar_pci_setup_errirq()
166 	iowrite32(val, priv->reg + RCAR_PCI_INT_ENABLE_REG);  in rcar_pci_setup_errirq()
172 /* PCI host controller setup */
176 	struct device *dev = priv->dev;  in rcar_pci_setup()
177 	void __iomem *reg = priv->reg;  in rcar_pci_setup()
184 	entry = resource_list_first_type(&bridge->dma_ranges, IORESOURCE_MEM);  in rcar_pci_setup()
190 		window_addr = entry->res->start;  in rcar_pci_setup()
191 		window_pci = entry->res->start - entry->offset;  in rcar_pci_setup()
192 		window_size = resource_size(entry->res);  in rcar_pci_setup()
199 	dev_info(dev, "PCI: revision %x\n", val);  in rcar_pci_setup()
207 	/* De-assert reset and reset PCIAHB window1 size */  in rcar_pci_setup()
223 		pr_warn("unknown window size %ld - defaulting to 256M\n",  in rcar_pci_setup()
236 	/* Configure PCI arbiter */  in rcar_pci_setup()
242 	/* PCI-AHB mapping */  in rcar_pci_setup()
246 	/* AHB-PCI mapping: OHCI/EHCI registers */  in rcar_pci_setup()
247 	val = priv->mem_res.start | RCAR_AHBPCI_WIN_CTR_MEM;  in rcar_pci_setup()
250 	/* Enable AHB-PCI bridge PCI configuration access */  in rcar_pci_setup()
253 	/* Set PCI-AHB Window1 address */  in rcar_pci_setup()
256 	/* Set AHB-PCI bridge PCI communication area address */  in rcar_pci_setup()
257 	val = priv->cfg_res->start + RCAR_AHBPCI_PCICOM_OFFSET;  in rcar_pci_setup()
265 	/* Enable PCI interrupts */  in rcar_pci_setup()
280 	struct device *dev = &pdev->dev;  in rcar_pci_probe()
288 		return -ENOMEM;  in rcar_pci_probe()
291 	bridge->sysdata = priv;  in rcar_pci_probe()
298 	if (!mem_res || !mem_res->start)  in rcar_pci_probe()
299 		return -ENODEV;  in rcar_pci_probe()
301 	if (mem_res->start & 0xFFFF)  in rcar_pci_probe()
302 		return -EINVAL;  in rcar_pci_probe()
304 	priv->mem_res = *mem_res;  in rcar_pci_probe()
305 	priv->cfg_res = cfg_res;  in rcar_pci_probe()
307 	priv->irq = platform_get_irq(pdev, 0);  in rcar_pci_probe()
308 	priv->reg = reg;  in rcar_pci_probe()
309 	priv->dev = dev;  in rcar_pci_probe()
311 	if (priv->irq < 0) {  in rcar_pci_probe()
313 		return priv->irq;  in rcar_pci_probe()
316 	bridge->ops = &rcar_pci_ops;  in rcar_pci_probe()
326 	{ .compatible = "renesas,pci-r8a7790", },
327 	{ .compatible = "renesas,pci-r8a7791", },
328 	{ .compatible = "renesas,pci-r8a7794", },
329 	{ .compatible = "renesas,pci-rcar-gen2", },
330 	{ .compatible = "renesas,pci-rzn1", },
336 		.name = "pci-rcar-gen2",