1 // SPDX-License-Identifier: GPL-2.0
7  * Based on the IXP4xx arch/arm/mach-ixp4xx/common-pci.c driver
9  * Copyright (C) 2003 Greg Ungerer <gerg@linux-m68k.org>
10  * Copyright (C) 2003-2004 MontaVista Software, Inc.
15  * - Test IO-space access
16  * - DMA support
65 /* ISR (Interrupt status) Register bit definitions */
75 /* INTEN (Interrupt Enable) Register bit definitions */
113  * operates in big-endian or little-endian mode. That means that
114  * readl() and writel() that always use little-endian access
116  * when used in big-endian mode. The accesses to the individual
117  * PCI devices on the other hand, are always little-endian and
126 	return __raw_readl(p->base + reg);  in ixp4xx_readl()
131 	__raw_writel(val, p->base + reg);  in ixp4xx_writel()
141 		dev_dbg(p->dev, "master abort detected\n");  in ixp4xx_pci_check_master_abort()
142 		return -EINVAL;  in ixp4xx_pci_check_master_abort()
152 	if (p->errata_hammer) {  in ixp4xx_pci_read_indirect()
156 		 * PCI workaround - only works if NP PCI space reads have  in ixp4xx_pci_read_indirect()
192 			~PCI_CONF1_ENABLE) | BIT(32-PCI_SLOT(devfn));  in ixp4xx_config_addr()
225 	dev_dbg(p->dev, "%s from %d size %d cmd %08x\n",  in ixp4xx_crp_read_config()
235 		dev_dbg(p->dev, "%s read byte %02x\n", __func__, val);  in ixp4xx_crp_read_config()
239 		dev_dbg(p->dev, "%s read word %04x\n", __func__, val);  in ixp4xx_crp_read_config()
243 		dev_dbg(p->dev, "%s read long %08x\n", __func__, val);  in ixp4xx_crp_read_config()
247 		dev_err(p->dev, "%s illegal size\n", __func__);  in ixp4xx_crp_read_config()
269 	dev_dbg(p->dev, "%s to %d size %d cmd %08x val %08x\n",  in ixp4xx_crp_write_config()
296 	struct ixp4xx_pci *p = bus->sysdata;  in ixp4xx_pci_read_config()
298 	u8 bus_num = bus->number;  in ixp4xx_pci_read_config()
309 	dev_dbg(p->dev, "read_config from %d size %d dev %d:%d:%d address: %08x cmd: %08x\n",  in ixp4xx_pci_read_config()
320 		dev_dbg(p->dev, "%s read byte %02x\n", __func__, val);  in ixp4xx_pci_read_config()
324 		dev_dbg(p->dev, "%s read word %04x\n", __func__, val);  in ixp4xx_pci_read_config()
328 		dev_dbg(p->dev, "%s read long %08x\n", __func__, val);  in ixp4xx_pci_read_config()
332 		dev_err(p->dev, "%s illegal size\n", __func__);  in ixp4xx_pci_read_config()
343 	struct ixp4xx_pci *p = bus->sysdata;  in ixp4xx_pci_write_config()
345 	u8 bus_num = bus->number;  in ixp4xx_pci_write_config()
357 	dev_dbg(p->dev, "write_config_byte %#x to %d size %d dev %d:%d:%d addr: %08x cmd %08x\n",  in ixp4xx_pci_write_config()
383 	struct device *dev = p->dev;  in ixp4xx_pci_parse_map_ranges()
389 	win = resource_list_first_type(&bridge->windows, IORESOURCE_MEM);  in ixp4xx_pci_parse_map_ranges()
393 		res = win->res;  in ixp4xx_pci_parse_map_ranges()
394 		addr = res->start - win->offset;  in ixp4xx_pci_parse_map_ranges()
396 		if (res->flags & IORESOURCE_PREFETCH)  in ixp4xx_pci_parse_map_ranges()
397 			res->name = "IXP4xx PCI PRE-MEM";  in ixp4xx_pci_parse_map_ranges()
399 			res->name = "IXP4xx PCI NON-PRE-MEM";  in ixp4xx_pci_parse_map_ranges()
402 			res->name, res, &addr);  in ixp4xx_pci_parse_map_ranges()
405 			return -EINVAL;  in ixp4xx_pci_parse_map_ranges()
415 	win = resource_list_first_type(&bridge->windows, IORESOURCE_IO);  in ixp4xx_pci_parse_map_ranges()
417 		res = win->res;  in ixp4xx_pci_parse_map_ranges()
419 		addr = pci_pio_to_address(res->start);  in ixp4xx_pci_parse_map_ranges()
422 			return -EINVAL;  in ixp4xx_pci_parse_map_ranges()
425 		res->name = "IXP4xx PCI IO MEM";  in ixp4xx_pci_parse_map_ranges()
427 		 * Setup I/O space location for PCI->AHB access, the  in ixp4xx_pci_parse_map_ranges()
441 	struct device *dev = p->dev;  in ixp4xx_pci_parse_map_dma_ranges()
448 	win = resource_list_first_type(&bridge->dma_ranges, IORESOURCE_MEM);  in ixp4xx_pci_parse_map_dma_ranges()
450 		res = win->res;  in ixp4xx_pci_parse_map_dma_ranges()
451 		addr = res->start - win->offset;  in ixp4xx_pci_parse_map_dma_ranges()
455 			return -EINVAL;  in ixp4xx_pci_parse_map_dma_ranges()
460 		 * 4 PCI-to-AHB windows of 16 MB each, write the 8 high bits  in ixp4xx_pci_parse_map_dma_ranges()
486 		dev_err(p->dev, "unable to read abort status\n");  in ixp4xx_pci_abort_handler()
487 		return -EINVAL;  in ixp4xx_pci_abort_handler()
490 	dev_err(p->dev,  in ixp4xx_pci_abort_handler()
499 		dev_err(p->dev, "unable to clear abort status bit\n");  in ixp4xx_pci_abort_handler()
506 		dev_err(p->dev, "imprecise abort\n");  in ixp4xx_pci_abort_handler()
507 		regs->ARM_pc += 4;  in ixp4xx_pci_abort_handler()
515 	struct device *dev = &pdev->dev;  in ixp4xx_pci_probe()
516 	struct device_node *np = dev->of_node;  in ixp4xx_pci_probe()
532 		return -ENOMEM;  in ixp4xx_pci_probe()
534 	host->ops = &ixp4xx_pci_ops;  in ixp4xx_pci_probe()
536 	host->sysdata = p;  in ixp4xx_pci_probe()
537 	p->dev = dev;  in ixp4xx_pci_probe()
544 	if (of_device_is_compatible(np, "intel,ixp42x-pci")) {  in ixp4xx_pci_probe()
545 		p->errata_hammer = true;  in ixp4xx_pci_probe()
549 	p->base = devm_platform_ioremap_resource(pdev, 0);  in ixp4xx_pci_probe()
550 	if (IS_ERR(p->base))  in ixp4xx_pci_probe()
551 		return PTR_ERR(p->base);  in ixp4xx_pci_probe()
554 	p->host_mode = !!(val & IXP4XX_PCI_CSR_HOST);  in ixp4xx_pci_probe()
556 		 p->host_mode ? "host" : "option");  in ixp4xx_pci_probe()
572 	if (p->host_mode) {  in ixp4xx_pci_probe()
630 	 * operating in big-endian mode. Set up byte lane swapping between  in ixp4xx_pci_probe()
631 	 * little-endian PCI and the big-endian AHB bus.  in ixp4xx_pci_probe()
651 		.compatible = "intel,ixp42x-pci",
654 		.compatible = "intel,ixp43x-pci",
662  * handler and this can only be done from __init-tagged code
667 		.name = "ixp4xx-pci",