1 /* SPDX-License-Identifier: GPL-2.0 */
3  * PCIe host controller driver for Mobiveil PCIe Host controller
58 #define  PAB_INTP_INTA			BIT(5)
101 #define PAB_INTX_START			5
147 	int (*interrupt_init)(struct mobiveil_pcie *pcie);
162 	bool (*link_up)(struct mobiveil_pcie *pcie);
169 	phys_addr_t pcie_reg_base;	/* Physical PCIe Controller Base */
178 int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie);
179 int mobiveil_host_init(struct mobiveil_pcie *pcie, bool reinit);
180 bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie);
181 int mobiveil_bringup_link(struct mobiveil_pcie *pcie);
182 void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr,
184 void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr,
186 u32 mobiveil_csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size);
187 void mobiveil_csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off,
190 static inline u32 mobiveil_csr_readl(struct mobiveil_pcie *pcie, u32 off)  in mobiveil_csr_readl()  argument
192 	return mobiveil_csr_read(pcie, off, 0x4);  in mobiveil_csr_readl()
195 static inline u16 mobiveil_csr_readw(struct mobiveil_pcie *pcie, u32 off)  in mobiveil_csr_readw()  argument
197 	return mobiveil_csr_read(pcie, off, 0x2);  in mobiveil_csr_readw()
200 static inline u8 mobiveil_csr_readb(struct mobiveil_pcie *pcie, u32 off)  in mobiveil_csr_readb()  argument
202 	return mobiveil_csr_read(pcie, off, 0x1);  in mobiveil_csr_readb()
206 static inline void mobiveil_csr_writel(struct mobiveil_pcie *pcie, u32 val,  in mobiveil_csr_writel()  argument
209 	mobiveil_csr_write(pcie, val, off, 0x4);  in mobiveil_csr_writel()
212 static inline void mobiveil_csr_writew(struct mobiveil_pcie *pcie, u16 val,  in mobiveil_csr_writew()  argument
215 	mobiveil_csr_write(pcie, val, off, 0x2);  in mobiveil_csr_writew()
218 static inline void mobiveil_csr_writeb(struct mobiveil_pcie *pcie, u8 val,  in mobiveil_csr_writeb()  argument
221 	mobiveil_csr_write(pcie, val, off, 0x1);  in mobiveil_csr_writeb()