Lines Matching +full:pci +full:- +full:phy
1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <linux/phy/phy.h>
30 #include "../../pci.h"
32 #include "pcie-designware.h"
33 #include "pcie-stm32.h"
36 struct dw_pcie pci;
39 struct phy *phy;
47 if (stm32_pcie->perst_gpio) {
49 gpiod_set_value(stm32_pcie->perst_gpio, 0);
57 gpiod_set_value(stm32_pcie->perst_gpio, 1);
60 static int stm32_pcie_start_link(struct dw_pcie *pci)
62 struct stm32_pcie *stm32_pcie = to_stm32_pcie(pci);
64 return regmap_update_bits(stm32_pcie->regmap, SYSCFG_PCIECR,
69 static void stm32_pcie_stop_link(struct dw_pcie *pci)
71 struct stm32_pcie *stm32_pcie = to_stm32_pcie(pci);
73 regmap_update_bits(stm32_pcie->regmap, SYSCFG_PCIECR,
82 ret = dw_pcie_suspend_noirq(&stm32_pcie->pci);
88 clk_disable_unprepare(stm32_pcie->clk);
91 phy_exit(stm32_pcie->phy);
113 ret = phy_init(stm32_pcie->phy);
120 ret = clk_prepare_enable(stm32_pcie->clk);
126 ret = dw_pcie_resume_noirq(&stm32_pcie->pci);
136 clk_disable_unprepare(stm32_pcie->clk);
139 phy_exit(stm32_pcie->phy);
160 struct device *dev = stm32_pcie->pci.dev;
164 ret = phy_set_mode(stm32_pcie->phy, PHY_MODE_PCIE);
168 ret = phy_init(stm32_pcie->phy);
172 ret = regmap_update_bits(stm32_pcie->regmap, SYSCFG_PCIECR,
180 if (stm32_pcie->wake_gpio) {
181 wake_irq = gpiod_to_irq(stm32_pcie->wake_gpio);
196 phy_exit(stm32_pcie->phy);
203 dev_pm_clear_wake_irq(stm32_pcie->pci.dev);
207 phy_exit(stm32_pcie->phy);
212 struct device *dev = stm32_pcie->pci.dev;
215 root_port = of_get_next_available_child(dev->of_node, NULL);
217 stm32_pcie->phy = devm_of_phy_get(dev, root_port, NULL);
218 if (IS_ERR(stm32_pcie->phy)) {
220 return dev_err_probe(dev, PTR_ERR(stm32_pcie->phy),
221 "Failed to get pcie-phy\n");
224 stm32_pcie->perst_gpio = devm_fwnode_gpiod_get(dev, of_fwnode_handle(root_port),
226 if (IS_ERR(stm32_pcie->perst_gpio)) {
227 if (PTR_ERR(stm32_pcie->perst_gpio) != -ENOENT) {
229 return dev_err_probe(dev, PTR_ERR(stm32_pcie->perst_gpio),
232 stm32_pcie->perst_gpio = NULL;
235 stm32_pcie->wake_gpio = devm_fwnode_gpiod_get(dev, of_fwnode_handle(root_port),
238 if (IS_ERR(stm32_pcie->wake_gpio)) {
239 if (PTR_ERR(stm32_pcie->wake_gpio) != -ENOENT) {
241 return dev_err_probe(dev, PTR_ERR(stm32_pcie->wake_gpio),
244 stm32_pcie->wake_gpio = NULL;
255 struct device *dev = &pdev->dev;
260 return -ENOMEM;
262 stm32_pcie->pci.dev = dev;
263 stm32_pcie->pci.ops = &dw_pcie_ops;
264 stm32_pcie->pci.pp.ops = &stm32_pcie_host_ops;
266 stm32_pcie->regmap = syscon_regmap_lookup_by_compatible("st,stm32mp25-syscfg");
267 if (IS_ERR(stm32_pcie->regmap))
268 return dev_err_probe(dev, PTR_ERR(stm32_pcie->regmap),
271 stm32_pcie->clk = devm_clk_get(dev, NULL);
272 if (IS_ERR(stm32_pcie->clk))
273 return dev_err_probe(dev, PTR_ERR(stm32_pcie->clk),
276 stm32_pcie->rst = devm_reset_control_get_exclusive(dev, NULL);
277 if (IS_ERR(stm32_pcie->rst))
278 return dev_err_probe(dev, PTR_ERR(stm32_pcie->rst),
291 reset_control_assert(stm32_pcie->rst);
292 reset_control_deassert(stm32_pcie->rst);
294 ret = clk_prepare_enable(stm32_pcie->clk);
314 ret = dw_pcie_host_init(&stm32_pcie->pci.pp);
318 if (stm32_pcie->wake_gpio)
324 clk_disable_unprepare(stm32_pcie->clk);
335 struct dw_pcie_rp *pp = &stm32_pcie->pci.pp;
337 if (stm32_pcie->wake_gpio)
338 device_init_wakeup(&pdev->dev, false);
342 clk_disable_unprepare(stm32_pcie->clk);
346 pm_runtime_put_noidle(&pdev->dev);
350 { .compatible = "st,stm32mp25-pcie-rc" },
358 .name = "stm32-pcie",