Lines Matching +full:pcie +full:- +full:is +full:- +full:gen1
1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe host controller driver for Rockchip SoCs.
6 * http://www.rock-chips.com
8 * Author: Simon Xue <xxm@rock-chips.com>
26 #include "pcie-designware.h"
36 #define to_rockchip_pcie(x) dev_get_drvdata((x)->dev)
91 return readl_relaxed(rockchip->apb_base + reg); in rockchip_pcie_readl_apb()
97 writel_relaxed(val, rockchip->apb_base + reg); in rockchip_pcie_writel_apb()
111 generic_handle_domain_irq(rockchip->irq_domain, hwirq); in rockchip_pcie_intx_handler()
119 HIWORD_UPDATE_BIT(BIT(data->hwirq)), in rockchip_intx_mask()
126 HIWORD_DISABLE_BIT(BIT(data->hwirq)), in rockchip_intx_unmask()
141 irq_set_chip_data(irq, domain->host_data); in rockchip_pcie_intx_map()
152 struct device *dev = rockchip->pci.dev; in rockchip_pcie_init_irq_domain()
155 intc = of_get_child_by_name(dev->of_node, "legacy-interrupt-controller"); in rockchip_pcie_init_irq_domain()
157 dev_err(dev, "missing child interrupt-controller node\n"); in rockchip_pcie_init_irq_domain()
158 return -EINVAL; in rockchip_pcie_init_irq_domain()
161 rockchip->irq_domain = irq_domain_create_linear(of_fwnode_handle(intc), PCI_NUM_INTX, in rockchip_pcie_init_irq_domain()
164 if (!rockchip->irq_domain) { in rockchip_pcie_init_irq_domain()
166 return -EINVAL; in rockchip_pcie_init_irq_domain()
217 gpiod_set_value_cansleep(rockchip->rst_gpio, 0); in rockchip_pcie_start_link()
222 * PCIe requires the refclk to be stable for 100µs prior to releasing in rockchip_pcie_start_link()
223 * PERST. See table 2-4 in section 2.6.2 AC Specifications of the PCI in rockchip_pcie_start_link()
225 * know if the refclk is coming from RC's PHY or external OSC. If it's in rockchip_pcie_start_link()
226 * from RC, so enabling LTSSM is the just right place to release #PERST. in rockchip_pcie_start_link()
231 gpiod_set_value_cansleep(rockchip->rst_gpio, 1); in rockchip_pcie_start_link()
247 struct device *dev = rockchip->pci.dev; in rockchip_pcie_host_init()
250 irq = of_irq_get_byname(dev->of_node, "legacy"); in rockchip_pcie_host_init()
282 struct device *dev = pci->dev; in rockchip_pcie_ep_hide_broken_ats_cap_rk3588()
285 if (!of_device_is_compatible(dev->of_node, "rockchip,rk3588-pcie-ep")) in rockchip_pcie_ep_hide_broken_ats_cap_rk3588()
318 dev_err(pci->dev, "UNKNOWN IRQ type\n"); in rockchip_pcie_raise_irq()
365 return rockchip->data->epc_features; in rockchip_pcie_get_features()
376 struct device *dev = rockchip->pci.dev; in rockchip_pcie_clk_init()
379 ret = devm_clk_bulk_get_all(dev, &rockchip->clks); in rockchip_pcie_clk_init()
383 rockchip->clk_cnt = ret; in rockchip_pcie_clk_init()
385 ret = clk_bulk_prepare_enable(rockchip->clk_cnt, rockchip->clks); in rockchip_pcie_clk_init()
395 rockchip->apb_base = devm_platform_ioremap_resource_byname(pdev, "apb"); in rockchip_pcie_resource_get()
396 if (IS_ERR(rockchip->apb_base)) in rockchip_pcie_resource_get()
397 return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->apb_base), in rockchip_pcie_resource_get()
400 rockchip->rst_gpio = devm_gpiod_get_optional(&pdev->dev, "reset", in rockchip_pcie_resource_get()
402 if (IS_ERR(rockchip->rst_gpio)) in rockchip_pcie_resource_get()
403 return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->rst_gpio), in rockchip_pcie_resource_get()
406 rockchip->rst = devm_reset_control_array_get_exclusive(&pdev->dev); in rockchip_pcie_resource_get()
407 if (IS_ERR(rockchip->rst)) in rockchip_pcie_resource_get()
408 return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->rst), in rockchip_pcie_resource_get()
416 struct device *dev = rockchip->pci.dev; in rockchip_pcie_phy_init()
419 rockchip->phy = devm_phy_get(dev, "pcie-phy"); in rockchip_pcie_phy_init()
420 if (IS_ERR(rockchip->phy)) in rockchip_pcie_phy_init()
421 return dev_err_probe(dev, PTR_ERR(rockchip->phy), in rockchip_pcie_phy_init()
424 ret = phy_init(rockchip->phy); in rockchip_pcie_phy_init()
428 ret = phy_power_on(rockchip->phy); in rockchip_pcie_phy_init()
430 phy_exit(rockchip->phy); in rockchip_pcie_phy_init()
437 phy_power_off(rockchip->phy); in rockchip_pcie_phy_deinit()
438 phy_exit(rockchip->phy); in rockchip_pcie_phy_deinit()
450 struct dw_pcie *pci = &rockchip->pci; in rockchip_pcie_rc_sys_irq_thread()
451 struct dw_pcie_rp *pp = &pci->pp; in rockchip_pcie_rc_sys_irq_thread()
452 struct device *dev = pci->dev; in rockchip_pcie_rc_sys_irq_thread()
467 pci_rescan_bus(pp->bridge->bus); in rockchip_pcie_rc_sys_irq_thread()
478 struct dw_pcie *pci = &rockchip->pci; in rockchip_pcie_ep_sys_irq_thread()
479 struct device *dev = pci->dev; in rockchip_pcie_ep_sys_irq_thread()
489 dev_dbg(dev, "hot reset or link-down reset\n"); in rockchip_pcie_ep_sys_irq_thread()
490 dw_pcie_ep_linkdown(&pci->ep); in rockchip_pcie_ep_sys_irq_thread()
500 dw_pcie_ep_linkup(&pci->ep); in rockchip_pcie_ep_sys_irq_thread()
510 struct device *dev = &pdev->dev; in rockchip_pcie_configure_rc()
516 return -ENODEV; in rockchip_pcie_configure_rc()
524 IRQF_ONESHOT, "pcie-sys-rc", rockchip); in rockchip_pcie_configure_rc()
526 dev_err(dev, "failed to request PCIe sys IRQ\n"); in rockchip_pcie_configure_rc()
537 pp = &rockchip->pci.pp; in rockchip_pcie_configure_rc()
538 pp->ops = &rockchip_pcie_host_ops; in rockchip_pcie_configure_rc()
539 pp->use_linkup_irq = true; in rockchip_pcie_configure_rc()
557 struct device *dev = &pdev->dev; in rockchip_pcie_configure_ep()
562 return -ENODEV; in rockchip_pcie_configure_ep()
570 IRQF_ONESHOT, "pcie-sys-ep", rockchip); in rockchip_pcie_configure_ep()
572 dev_err(dev, "failed to request PCIe sys IRQ\n"); in rockchip_pcie_configure_ep()
578 * hot reset/link-down reset. in rockchip_pcie_configure_ep()
586 rockchip->pci.ep.ops = &rockchip_pcie_ep_ops; in rockchip_pcie_configure_ep()
587 rockchip->pci.ep.page_size = SZ_64K; in rockchip_pcie_configure_ep()
591 ret = dw_pcie_ep_init(&rockchip->pci.ep); in rockchip_pcie_configure_ep()
597 ret = dw_pcie_ep_init_registers(&rockchip->pci.ep); in rockchip_pcie_configure_ep()
600 dw_pcie_ep_deinit(&rockchip->pci.ep); in rockchip_pcie_configure_ep()
604 pci_epc_init_notify(rockchip->pci.ep.epc); in rockchip_pcie_configure_ep()
606 /* unmask DLL up/down indicator and hot reset/link-down reset */ in rockchip_pcie_configure_ep()
615 struct device *dev = &pdev->dev; in rockchip_pcie_probe()
622 return -EINVAL; in rockchip_pcie_probe()
626 return -ENOMEM; in rockchip_pcie_probe()
630 rockchip->pci.dev = dev; in rockchip_pcie_probe()
631 rockchip->pci.ops = &dw_pcie_ops; in rockchip_pcie_probe()
632 rockchip->data = data; in rockchip_pcie_probe()
634 /* Default N_FTS value (210) is broken, override it to 255 */ in rockchip_pcie_probe()
635 rockchip->pci.n_fts[0] = 255; /* Gen1 */ in rockchip_pcie_probe()
636 rockchip->pci.n_fts[1] = 255; /* Gen2+ */ in rockchip_pcie_probe()
642 ret = reset_control_assert(rockchip->rst); in rockchip_pcie_probe()
647 rockchip->vpcie3v3 = devm_regulator_get_optional(dev, "vpcie3v3"); in rockchip_pcie_probe()
648 if (IS_ERR(rockchip->vpcie3v3)) { in rockchip_pcie_probe()
649 if (PTR_ERR(rockchip->vpcie3v3) != -ENODEV) in rockchip_pcie_probe()
650 return dev_err_probe(dev, PTR_ERR(rockchip->vpcie3v3), in rockchip_pcie_probe()
652 rockchip->vpcie3v3 = NULL; in rockchip_pcie_probe()
654 ret = regulator_enable(rockchip->vpcie3v3); in rockchip_pcie_probe()
664 ret = reset_control_deassert(rockchip->rst); in rockchip_pcie_probe()
672 switch (data->mode) { in rockchip_pcie_probe()
684 dev_err(dev, "INVALID device type %d\n", data->mode); in rockchip_pcie_probe()
685 ret = -EINVAL; in rockchip_pcie_probe()
692 clk_bulk_disable_unprepare(rockchip->clk_cnt, rockchip->clks); in rockchip_pcie_probe()
696 if (rockchip->vpcie3v3) in rockchip_pcie_probe()
697 regulator_disable(rockchip->vpcie3v3); in rockchip_pcie_probe()
718 .compatible = "rockchip,rk3568-pcie",
722 .compatible = "rockchip,rk3568-pcie-ep",
726 .compatible = "rockchip,rk3588-pcie-ep",
734 .name = "rockchip-dw-pcie",