Lines Matching +full:ep +full:- +full:side
1 // SPDX-License-Identifier: GPL-2.0
6 * http://www.rock-chips.com
8 * Author: Simon Xue <xxm@rock-chips.com>
27 #include "pcie-designware.h"
34 #define to_rockchip_pcie(x) dev_get_drvdata((x)->dev)
97 return readl_relaxed(rockchip->apb_base + reg); in rockchip_pcie_readl_apb()
103 writel_relaxed(val, rockchip->apb_base + reg); in rockchip_pcie_writel_apb()
117 generic_handle_domain_irq(rockchip->irq_domain, hwirq); in rockchip_pcie_intx_handler()
125 PCIE_INTR_LEGACY_MASK(data->hwirq), in rockchip_intx_mask()
132 PCIE_INTR_LEGACY_UNMASK(data->hwirq), in rockchip_intx_unmask()
147 irq_set_chip_data(irq, domain->host_data); in rockchip_pcie_intx_map()
158 struct device *dev = rockchip->pci.dev; in rockchip_pcie_init_irq_domain()
161 intc = of_get_child_by_name(dev->of_node, "legacy-interrupt-controller"); in rockchip_pcie_init_irq_domain()
163 dev_err(dev, "missing child interrupt-controller node\n"); in rockchip_pcie_init_irq_domain()
164 return -EINVAL; in rockchip_pcie_init_irq_domain()
167 rockchip->irq_domain = irq_domain_create_linear(of_fwnode_handle(intc), PCI_NUM_INTX, in rockchip_pcie_init_irq_domain()
170 if (!rockchip->irq_domain) { in rockchip_pcie_init_irq_domain()
172 return -EINVAL; in rockchip_pcie_init_irq_domain()
223 gpiod_set_value_cansleep(rockchip->rst_gpio, 0); in rockchip_pcie_start_link()
229 * PERST. See table 2-4 in section 2.6.2 AC Specifications of the PCI in rockchip_pcie_start_link()
237 gpiod_set_value_cansleep(rockchip->rst_gpio, 1); in rockchip_pcie_start_link()
253 struct device *dev = rockchip->pci.dev; in rockchip_pcie_host_init()
256 irq = of_irq_get_byname(dev->of_node, "legacy"); in rockchip_pcie_host_init()
277 * ATS does not work on RK3588 when running in EP mode.
279 * After the host has enabled ATS on the EP side, it will send an IOTLB
280 * invalidation request to the EP side. However, the RK3588 will never send
282 * error, and the EP will not be operational. If we hide the ATS capability,
285 static void rockchip_pcie_ep_hide_broken_ats_cap_rk3588(struct dw_pcie_ep *ep) in rockchip_pcie_ep_hide_broken_ats_cap_rk3588() argument
287 struct dw_pcie *pci = to_dw_pcie_from_ep(ep); in rockchip_pcie_ep_hide_broken_ats_cap_rk3588()
288 struct device *dev = pci->dev; in rockchip_pcie_ep_hide_broken_ats_cap_rk3588()
290 /* Only hide the ATS capability for RK3588 running in EP mode. */ in rockchip_pcie_ep_hide_broken_ats_cap_rk3588()
291 if (!of_device_is_compatible(dev->of_node, "rockchip,rk3588-pcie-ep")) in rockchip_pcie_ep_hide_broken_ats_cap_rk3588()
299 static void rockchip_pcie_ep_init(struct dw_pcie_ep *ep) in rockchip_pcie_ep_init() argument
301 struct dw_pcie *pci = to_dw_pcie_from_ep(ep); in rockchip_pcie_ep_init()
305 rockchip_pcie_ep_hide_broken_ats_cap_rk3588(ep); in rockchip_pcie_ep_init()
311 static int rockchip_pcie_raise_irq(struct dw_pcie_ep *ep, u8 func_no, in rockchip_pcie_raise_irq() argument
314 struct dw_pcie *pci = to_dw_pcie_from_ep(ep); in rockchip_pcie_raise_irq()
318 return dw_pcie_ep_raise_intx_irq(ep, func_no); in rockchip_pcie_raise_irq()
320 return dw_pcie_ep_raise_msi_irq(ep, func_no, interrupt_num); in rockchip_pcie_raise_irq()
322 return dw_pcie_ep_raise_msix_irq(ep, func_no, interrupt_num); in rockchip_pcie_raise_irq()
324 dev_err(pci->dev, "UNKNOWN IRQ type\n"); in rockchip_pcie_raise_irq()
364 rockchip_pcie_get_features(struct dw_pcie_ep *ep) in rockchip_pcie_get_features() argument
366 struct dw_pcie *pci = to_dw_pcie_from_ep(ep); in rockchip_pcie_get_features()
369 return rockchip->data->epc_features; in rockchip_pcie_get_features()
380 struct device *dev = rockchip->pci.dev; in rockchip_pcie_clk_init()
383 ret = devm_clk_bulk_get_all(dev, &rockchip->clks); in rockchip_pcie_clk_init()
387 rockchip->clk_cnt = ret; in rockchip_pcie_clk_init()
389 ret = clk_bulk_prepare_enable(rockchip->clk_cnt, rockchip->clks); in rockchip_pcie_clk_init()
399 rockchip->apb_base = devm_platform_ioremap_resource_byname(pdev, "apb"); in rockchip_pcie_resource_get()
400 if (IS_ERR(rockchip->apb_base)) in rockchip_pcie_resource_get()
401 return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->apb_base), in rockchip_pcie_resource_get()
404 rockchip->rst_gpio = devm_gpiod_get_optional(&pdev->dev, "reset", in rockchip_pcie_resource_get()
406 if (IS_ERR(rockchip->rst_gpio)) in rockchip_pcie_resource_get()
407 return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->rst_gpio), in rockchip_pcie_resource_get()
410 rockchip->rst = devm_reset_control_array_get_exclusive(&pdev->dev); in rockchip_pcie_resource_get()
411 if (IS_ERR(rockchip->rst)) in rockchip_pcie_resource_get()
412 return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->rst), in rockchip_pcie_resource_get()
420 struct device *dev = rockchip->pci.dev; in rockchip_pcie_phy_init()
423 rockchip->phy = devm_phy_get(dev, "pcie-phy"); in rockchip_pcie_phy_init()
424 if (IS_ERR(rockchip->phy)) in rockchip_pcie_phy_init()
425 return dev_err_probe(dev, PTR_ERR(rockchip->phy), in rockchip_pcie_phy_init()
428 ret = phy_init(rockchip->phy); in rockchip_pcie_phy_init()
432 ret = phy_power_on(rockchip->phy); in rockchip_pcie_phy_init()
434 phy_exit(rockchip->phy); in rockchip_pcie_phy_init()
441 phy_power_off(rockchip->phy); in rockchip_pcie_phy_deinit()
442 phy_exit(rockchip->phy); in rockchip_pcie_phy_deinit()
454 struct dw_pcie *pci = &rockchip->pci; in rockchip_pcie_rc_sys_irq_thread()
455 struct dw_pcie_rp *pp = &pci->pp; in rockchip_pcie_rc_sys_irq_thread()
456 struct device *dev = pci->dev; in rockchip_pcie_rc_sys_irq_thread()
471 pci_rescan_bus(pp->bridge->bus); in rockchip_pcie_rc_sys_irq_thread()
482 struct dw_pcie *pci = &rockchip->pci; in rockchip_pcie_ep_sys_irq_thread()
483 struct device *dev = pci->dev; in rockchip_pcie_ep_sys_irq_thread()
493 dev_dbg(dev, "hot reset or link-down reset\n"); in rockchip_pcie_ep_sys_irq_thread()
494 dw_pcie_ep_linkdown(&pci->ep); in rockchip_pcie_ep_sys_irq_thread()
504 dw_pcie_ep_linkup(&pci->ep); in rockchip_pcie_ep_sys_irq_thread()
514 struct device *dev = &pdev->dev; in rockchip_pcie_configure_rc()
520 return -ENODEV; in rockchip_pcie_configure_rc()
528 IRQF_ONESHOT, "pcie-sys-rc", rockchip); in rockchip_pcie_configure_rc()
542 pp = &rockchip->pci.pp; in rockchip_pcie_configure_rc()
543 pp->ops = &rockchip_pcie_host_ops; in rockchip_pcie_configure_rc()
544 pp->use_linkup_irq = true; in rockchip_pcie_configure_rc()
562 struct device *dev = &pdev->dev; in rockchip_pcie_configure_ep()
567 return -ENODEV; in rockchip_pcie_configure_ep()
575 IRQF_ONESHOT, "pcie-sys-ep", rockchip); in rockchip_pcie_configure_ep()
583 * hot reset/link-down reset. in rockchip_pcie_configure_ep()
593 rockchip->pci.ep.ops = &rockchip_pcie_ep_ops; in rockchip_pcie_configure_ep()
594 rockchip->pci.ep.page_size = SZ_64K; in rockchip_pcie_configure_ep()
598 ret = dw_pcie_ep_init(&rockchip->pci.ep); in rockchip_pcie_configure_ep()
604 ret = dw_pcie_ep_init_registers(&rockchip->pci.ep); in rockchip_pcie_configure_ep()
607 dw_pcie_ep_deinit(&rockchip->pci.ep); in rockchip_pcie_configure_ep()
611 pci_epc_init_notify(rockchip->pci.ep.epc); in rockchip_pcie_configure_ep()
613 /* unmask DLL up/down indicator and hot reset/link-down reset */ in rockchip_pcie_configure_ep()
623 struct device *dev = &pdev->dev; in rockchip_pcie_probe()
630 return -EINVAL; in rockchip_pcie_probe()
634 return -ENOMEM; in rockchip_pcie_probe()
638 rockchip->pci.dev = dev; in rockchip_pcie_probe()
639 rockchip->pci.ops = &dw_pcie_ops; in rockchip_pcie_probe()
640 rockchip->data = data; in rockchip_pcie_probe()
643 rockchip->pci.n_fts[0] = 255; /* Gen1 */ in rockchip_pcie_probe()
644 rockchip->pci.n_fts[1] = 255; /* Gen2+ */ in rockchip_pcie_probe()
650 ret = reset_control_assert(rockchip->rst); in rockchip_pcie_probe()
655 rockchip->vpcie3v3 = devm_regulator_get_optional(dev, "vpcie3v3"); in rockchip_pcie_probe()
656 if (IS_ERR(rockchip->vpcie3v3)) { in rockchip_pcie_probe()
657 if (PTR_ERR(rockchip->vpcie3v3) != -ENODEV) in rockchip_pcie_probe()
658 return dev_err_probe(dev, PTR_ERR(rockchip->vpcie3v3), in rockchip_pcie_probe()
660 rockchip->vpcie3v3 = NULL; in rockchip_pcie_probe()
662 ret = regulator_enable(rockchip->vpcie3v3); in rockchip_pcie_probe()
672 ret = reset_control_deassert(rockchip->rst); in rockchip_pcie_probe()
680 switch (data->mode) { in rockchip_pcie_probe()
692 dev_err(dev, "INVALID device type %d\n", data->mode); in rockchip_pcie_probe()
693 ret = -EINVAL; in rockchip_pcie_probe()
700 clk_bulk_disable_unprepare(rockchip->clk_cnt, rockchip->clks); in rockchip_pcie_probe()
704 if (rockchip->vpcie3v3) in rockchip_pcie_probe()
705 regulator_disable(rockchip->vpcie3v3); in rockchip_pcie_probe()
726 .compatible = "rockchip,rk3568-pcie",
730 .compatible = "rockchip,rk3568-pcie-ep",
734 .compatible = "rockchip,rk3588-pcie-ep",
742 .name = "rockchip-dw-pcie",