Lines Matching defs:rockchip
75 static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip, u32 reg)
77 return readl_relaxed(rockchip->apb_base + reg);
80 static void rockchip_pcie_writel_apb(struct rockchip_pcie *rockchip, u32 val,
83 writel_relaxed(val, rockchip->apb_base + reg);
89 struct rockchip_pcie *rockchip = irq_desc_get_handler_data(desc);
94 reg = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_INTR_STATUS_LEGACY);
97 generic_handle_domain_irq(rockchip->irq_domain, hwirq);
136 static int rockchip_pcie_init_irq_domain(struct rockchip_pcie *rockchip)
138 struct device *dev = rockchip->pci.dev;
147 rockchip->irq_domain = irq_domain_add_linear(intc, PCI_NUM_INTX,
148 &intx_domain_ops, rockchip);
150 if (!rockchip->irq_domain) {
158 static u32 rockchip_pcie_get_ltssm(struct rockchip_pcie *rockchip)
160 return rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_LTSSM_STATUS);
163 static void rockchip_pcie_enable_ltssm(struct rockchip_pcie *rockchip)
165 rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_ENABLE_LTSSM,
169 static void rockchip_pcie_disable_ltssm(struct rockchip_pcie *rockchip)
171 rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_DISABLE_LTSSM,
177 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
178 u32 val = rockchip_pcie_get_ltssm(rockchip);
189 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
192 gpiod_set_value_cansleep(rockchip->rst_gpio, 0);
194 rockchip_pcie_enable_ltssm(rockchip);
206 gpiod_set_value_cansleep(rockchip->rst_gpio, 1);
213 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
215 rockchip_pcie_disable_ltssm(rockchip);
221 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
222 struct device *dev = rockchip->pci.dev;
229 ret = rockchip_pcie_init_irq_domain(rockchip);
234 rockchip);
258 if (!of_device_is_compatible(dev->of_node, "rockchip,rk3588-pcie-ep"))
338 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci);
340 return rockchip->data->epc_features;
350 static int rockchip_pcie_clk_init(struct rockchip_pcie *rockchip)
352 struct device *dev = rockchip->pci.dev;
355 ret = devm_clk_bulk_get_all(dev, &rockchip->clks);
359 rockchip->clk_cnt = ret;
361 ret = clk_bulk_prepare_enable(rockchip->clk_cnt, rockchip->clks);
369 struct rockchip_pcie *rockchip)
371 rockchip->apb_base = devm_platform_ioremap_resource_byname(pdev, "apb");
372 if (IS_ERR(rockchip->apb_base))
373 return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->apb_base),
376 rockchip->rst_gpio = devm_gpiod_get_optional(&pdev->dev, "reset",
378 if (IS_ERR(rockchip->rst_gpio))
379 return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->rst_gpio),
382 rockchip->rst = devm_reset_control_array_get_exclusive(&pdev->dev);
383 if (IS_ERR(rockchip->rst))
384 return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->rst),
390 static int rockchip_pcie_phy_init(struct rockchip_pcie *rockchip)
392 struct device *dev = rockchip->pci.dev;
395 rockchip->phy = devm_phy_get(dev, "pcie-phy");
396 if (IS_ERR(rockchip->phy))
397 return dev_err_probe(dev, PTR_ERR(rockchip->phy),
400 ret = phy_init(rockchip->phy);
404 ret = phy_power_on(rockchip->phy);
406 phy_exit(rockchip->phy);
411 static void rockchip_pcie_phy_deinit(struct rockchip_pcie *rockchip)
413 phy_exit(rockchip->phy);
414 phy_power_off(rockchip->phy);
425 struct rockchip_pcie *rockchip = arg;
426 struct dw_pcie *pci = &rockchip->pci;
431 reg = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_INTR_STATUS_MISC);
432 rockchip_pcie_writel_apb(rockchip, reg, PCIE_CLIENT_INTR_STATUS_MISC);
435 dev_dbg(dev, "LTSSM_STATUS: %#x\n", rockchip_pcie_get_ltssm(rockchip));
438 val = rockchip_pcie_get_ltssm(rockchip);
453 struct rockchip_pcie *rockchip = arg;
454 struct dw_pcie *pci = &rockchip->pci;
458 reg = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_INTR_STATUS_MISC);
459 rockchip_pcie_writel_apb(rockchip, reg, PCIE_CLIENT_INTR_STATUS_MISC);
462 dev_dbg(dev, "LTSSM_STATUS: %#x\n", rockchip_pcie_get_ltssm(rockchip));
470 val = rockchip_pcie_get_ltssm(rockchip);
481 struct rockchip_pcie *rockchip)
497 IRQF_ONESHOT, "pcie-sys-rc", rockchip);
505 rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL);
507 rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_RC_MODE,
510 pp = &rockchip->pci.pp;
522 rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_INTR_MASK_MISC);
528 struct rockchip_pcie *rockchip)
543 IRQF_ONESHOT, "pcie-sys-ep", rockchip);
551 rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL);
553 rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_EP_MODE,
556 rockchip->pci.ep.ops = &rockchip_pcie_ep_ops;
557 rockchip->pci.ep.page_size = SZ_64K;
561 ret = dw_pcie_ep_init(&rockchip->pci.ep);
567 ret = dw_pcie_ep_init_registers(&rockchip->pci.ep);
570 dw_pcie_ep_deinit(&rockchip->pci.ep);
574 pci_epc_init_notify(rockchip->pci.ep.epc);
578 rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_INTR_MASK_MISC);
586 struct rockchip_pcie *rockchip;
594 rockchip = devm_kzalloc(dev, sizeof(*rockchip), GFP_KERNEL);
595 if (!rockchip)
598 platform_set_drvdata(pdev, rockchip);
600 rockchip->pci.dev = dev;
601 rockchip->pci.ops = &dw_pcie_ops;
602 rockchip->data = data;
604 ret = rockchip_pcie_resource_get(pdev, rockchip);
608 ret = reset_control_assert(rockchip->rst);
613 rockchip->vpcie3v3 = devm_regulator_get_optional(dev, "vpcie3v3");
614 if (IS_ERR(rockchip->vpcie3v3)) {
615 if (PTR_ERR(rockchip->vpcie3v3) != -ENODEV)
616 return dev_err_probe(dev, PTR_ERR(rockchip->vpcie3v3),
618 rockchip->vpcie3v3 = NULL;
620 ret = regulator_enable(rockchip->vpcie3v3);
626 ret = rockchip_pcie_phy_init(rockchip);
630 ret = reset_control_deassert(rockchip->rst);
634 ret = rockchip_pcie_clk_init(rockchip);
640 ret = rockchip_pcie_configure_rc(pdev, rockchip);
645 ret = rockchip_pcie_configure_ep(pdev, rockchip);
658 clk_bulk_disable_unprepare(rockchip->clk_cnt, rockchip->clks);
660 rockchip_pcie_phy_deinit(rockchip);
662 if (rockchip->vpcie3v3)
663 regulator_disable(rockchip->vpcie3v3);
684 .compatible = "rockchip,rk3568-pcie",
688 .compatible = "rockchip,rk3568-pcie-ep",
692 .compatible = "rockchip,rk3588-pcie-ep",
700 .name = "rockchip-dw-pcie",