422 	struct dw_pcie_ob_atu_cfg atu = {0};  in dw_pcie_config_ecam_iatu()  local
435 	atu.index = 0;  in dw_pcie_config_ecam_iatu()
436 	atu.type = PCIE_ATU_TYPE_CFG0;  in dw_pcie_config_ecam_iatu()
437 	atu.parent_bus_addr = pp->cfg0_base + SZ_1M;  in dw_pcie_config_ecam_iatu()
439 	atu.size = SZ_1M;  in dw_pcie_config_ecam_iatu()
440 	atu.ctrl2 = PCIE_ATU_CFG_SHIFT_MODE_ENABLE;  in dw_pcie_config_ecam_iatu()
441 	ret = dw_pcie_prog_outbound_atu(pci, &atu);  in dw_pcie_config_ecam_iatu()
451 	atu.index = 1;  in dw_pcie_config_ecam_iatu()
452 	atu.type = PCIE_ATU_TYPE_CFG1;  in dw_pcie_config_ecam_iatu()
453 	atu.parent_bus_addr = pp->cfg0_base + SZ_2M;  in dw_pcie_config_ecam_iatu()
454 	atu.size = (SZ_1M * bus_range_max) - SZ_2M;  in dw_pcie_config_ecam_iatu()
455 	atu.ctrl2 = PCIE_ATU_CFG_SHIFT_MODE_ENABLE;  in dw_pcie_config_ecam_iatu()
457 	return dw_pcie_prog_outbound_atu(pci, &atu);  in dw_pcie_config_ecam_iatu()
740 	struct dw_pcie_ob_atu_cfg atu = { 0 };  in dw_pcie_other_conf_map_bus()  local
763 	atu.type = type;  in dw_pcie_other_conf_map_bus()
764 	atu.parent_bus_addr = pp->cfg0_base - pci->parent_bus_offset;  in dw_pcie_other_conf_map_bus()
765 	atu.pci_addr = busdev;  in dw_pcie_other_conf_map_bus()
766 	atu.size = pp->cfg0_size;  in dw_pcie_other_conf_map_bus()
768 	ret = dw_pcie_prog_outbound_atu(pci, &atu);  in dw_pcie_other_conf_map_bus()
780 	struct dw_pcie_ob_atu_cfg atu = { 0 };  in dw_pcie_rd_other_conf()  local
788 		atu.type = PCIE_ATU_TYPE_IO;  in dw_pcie_rd_other_conf()
789 		atu.parent_bus_addr = pp->io_base - pci->parent_bus_offset;  in dw_pcie_rd_other_conf()
790 		atu.pci_addr = pp->io_bus_addr;  in dw_pcie_rd_other_conf()
791 		atu.size = pp->io_size;  in dw_pcie_rd_other_conf()
793 		ret = dw_pcie_prog_outbound_atu(pci, &atu);  in dw_pcie_rd_other_conf()
806 	struct dw_pcie_ob_atu_cfg atu = { 0 };  in dw_pcie_wr_other_conf()  local
814 		atu.type = PCIE_ATU_TYPE_IO;  in dw_pcie_wr_other_conf()
815 		atu.parent_bus_addr = pp->io_base - pci->parent_bus_offset;  in dw_pcie_wr_other_conf()
816 		atu.pci_addr = pp->io_bus_addr;  in dw_pcie_wr_other_conf()
817 		atu.size = pp->io_size;  in dw_pcie_wr_other_conf()
819 		ret = dw_pcie_prog_outbound_atu(pci, &atu);  in dw_pcie_wr_other_conf()
854 	struct dw_pcie_ob_atu_cfg atu = { 0 };  in dw_pcie_iatu_setup()  local
858 	/* Note the very first outbound ATU is used for CFG IOs */  in dw_pcie_iatu_setup()
882 		atu.index = i;  in dw_pcie_iatu_setup()
883 		atu.type = PCIE_ATU_TYPE_MEM;  in dw_pcie_iatu_setup()
884 		atu.parent_bus_addr = entry->res->start - pci->parent_bus_offset;  in dw_pcie_iatu_setup()
885 		atu.pci_addr = entry->res->start - entry->offset;  in dw_pcie_iatu_setup()
889 			atu.size = resource_size(entry->res) -  in dw_pcie_iatu_setup()
892 			atu.size = resource_size(entry->res);  in dw_pcie_iatu_setup()
894 		ret = dw_pcie_prog_outbound_atu(pci, &atu);  in dw_pcie_iatu_setup()
904 			atu.index = i;  in dw_pcie_iatu_setup()
905 			atu.type = PCIE_ATU_TYPE_IO;  in dw_pcie_iatu_setup()
906 			atu.parent_bus_addr = pp->io_base - pci->parent_bus_offset;  in dw_pcie_iatu_setup()
907 			atu.pci_addr = pp->io_bus_addr;  in dw_pcie_iatu_setup()
908 			atu.size = pp->io_size;  in dw_pcie_iatu_setup()
910 			ret = dw_pcie_prog_outbound_atu(pci, &atu);  in dw_pcie_iatu_setup()
1067 	 * ATU, so we should not program the ATU here.  in dw_pcie_setup_rc()
1092 	struct dw_pcie_ob_atu_cfg atu = { 0 };  in dw_pcie_pme_turn_off()  local
1102 	atu.code = PCIE_MSG_CODE_PME_TURN_OFF;  in dw_pcie_pme_turn_off()
1103 	atu.routing = PCIE_MSG_TYPE_R_BC;  in dw_pcie_pme_turn_off()
1104 	atu.type = PCIE_ATU_TYPE_MSG;  in dw_pcie_pme_turn_off()
1105 	atu.size = resource_size(pci->pp.msg_res);  in dw_pcie_pme_turn_off()
1106 	atu.index = pci->pp.msg_atu_index;  in dw_pcie_pme_turn_off()
1108 	atu.parent_bus_addr = pci->pp.msg_res->start - pci->parent_bus_offset;  in dw_pcie_pme_turn_off()
1110 	ret = dw_pcie_prog_outbound_atu(pci, &atu);  in dw_pcie_pme_turn_off()