26 	struct al_pcie_acpi *pcie = cfg->priv;  in al_pcie_map_bus()  local
27 	void __iomem *dbi_base = pcie->dbi_base;  in al_pcie_map_bus()
142 static inline u32 al_pcie_controller_readl(struct al_pcie *pcie, u32 offset)  in al_pcie_controller_readl()  argument
144 	return readl_relaxed(pcie->controller_base + offset);  in al_pcie_controller_readl()
147 static inline void al_pcie_controller_writel(struct al_pcie *pcie, u32 offset,  in al_pcie_controller_writel()  argument
150 	writel_relaxed(val, pcie->controller_base + offset);  in al_pcie_controller_writel()
153 static int al_pcie_rev_id_get(struct al_pcie *pcie, unsigned int *rev_id)  in al_pcie_rev_id_get()  argument
158 	dev_rev_id_val = al_pcie_controller_readl(pcie, AXI_BASE_OFFSET +  in al_pcie_rev_id_get()
174 		dev_err(pcie->dev, "Unsupported dev_id_val (0x%x)\n",  in al_pcie_rev_id_get()
179 	dev_dbg(pcie->dev, "dev_id_val: 0x%x\n", dev_id_val);  in al_pcie_rev_id_get()
184 static int al_pcie_reg_offsets_set(struct al_pcie *pcie)  in al_pcie_reg_offsets_set()  argument
186 	switch (pcie->controller_rev_id) {  in al_pcie_reg_offsets_set()
188 		pcie->reg_offsets.ob_ctrl = OB_CTRL_REV1_2_OFFSET;  in al_pcie_reg_offsets_set()
192 		pcie->reg_offsets.ob_ctrl = OB_CTRL_REV3_5_OFFSET;  in al_pcie_reg_offsets_set()
195 		dev_err(pcie->dev, "Unsupported controller rev_id: 0x%x\n",  in al_pcie_reg_offsets_set()
196 			pcie->controller_rev_id);  in al_pcie_reg_offsets_set()
203 static inline void al_pcie_target_bus_set(struct al_pcie *pcie,  in al_pcie_target_bus_set()  argument
212 	al_pcie_controller_writel(pcie, AXI_BASE_OFFSET +  in al_pcie_target_bus_set()
213 				  pcie->reg_offsets.ob_ctrl + CFG_TARGET_BUS,  in al_pcie_target_bus_set()
221 	struct al_pcie *pcie = to_al_pcie(to_dw_pcie_from_pp(pp));  in al_pcie_conf_addr_map_bus()  local
223 	struct al_pcie_target_bus_cfg *target_bus_cfg = &pcie->target_bus_cfg;  in al_pcie_conf_addr_map_bus()
228 		dev_dbg(pcie->pci->dev, "Changing target bus busnum val from 0x%x to 0x%x\n",  in al_pcie_conf_addr_map_bus()
231 		al_pcie_target_bus_set(pcie,  in al_pcie_conf_addr_map_bus()
245 static int al_pcie_config_prepare(struct al_pcie *pcie)  in al_pcie_config_prepare()  argument
248 	struct dw_pcie_rp *pp = &pcie->pci->pp;  in al_pcie_config_prepare()
263 	target_bus_cfg = &pcie->target_bus_cfg;  in al_pcie_config_prepare()
265 	ecam_bus_mask = (pcie->ecam_size >> PCIE_ECAM_BUS_SHIFT) - 1;  in al_pcie_config_prepare()
267 		dev_warn(pcie->dev, "ECAM window size is larger than 256MB. Cutting off at 256\n");  in al_pcie_config_prepare()
277 	al_pcie_target_bus_set(pcie, target_bus_cfg->reg_val,  in al_pcie_config_prepare()
284 	cfg_control_offset = AXI_BASE_OFFSET + pcie->reg_offsets.ob_ctrl +  in al_pcie_config_prepare()
287 	cfg_control = al_pcie_controller_readl(pcie, cfg_control_offset);  in al_pcie_config_prepare()
295 	al_pcie_controller_writel(pcie, cfg_control_offset, reg);  in al_pcie_config_prepare()
303 	struct al_pcie *pcie = to_al_pcie(pci);  in al_pcie_host_init()  local
308 	rc = al_pcie_rev_id_get(pcie, &pcie->controller_rev_id);  in al_pcie_host_init()
312 	rc = al_pcie_reg_offsets_set(pcie);  in al_pcie_host_init()
316 	rc = al_pcie_config_prepare(pcie);  in al_pcie_host_init()