Lines Matching +full:phy +full:- +full:cadence

1 /* SPDX-License-Identifier: GPL-2.0 */
2 // Copyright (c) 2017 Cadence
3 // Cadence PCIe controller driver.
4 // Author: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
11 #include <linux/pci-epf.h>
12 #include <linux/phy/phy.h>
117 					(((aperture) - 2) << ((bar) * 8))
155 	(((nbits) - 1) & CDNS_PCIE_AT_OB_REGION_PCI_ADDR0_NBITS_MASK)
195 	(((nbits) - 1) & CDNS_PCIE_AT_OB_REGION_CPU_ADDR0_NBITS_MASK)
206 	(((nbits) - 1) & CDNS_PCIE_AT_IB_RP_BAR_ADDR0_NBITS_MASK)
222 	RP_BAR_UNDEFINED = -1,
292  * struct cdns_pcie - private data for Cadence PCIe controller drivers
297  * @phy_count: number of supported PHY devices
298  * @phy: list of pointers to specific PHY control blocks
300  * @ops: Platform-specific ops to control various inputs from Cadence PCIe
309 	struct phy		**phy;
315  * struct cdns_pcie_rc - private data for this PCIe Root Complex driver
316  * @pcie: Cadence PCIe controller
340  * struct cdns_pcie_epf - Structure to hold info about endpoint function
350  * struct cdns_pcie_ep - private data for this PCIe endpoint controller driver
351  * @pcie: Cadence PCIe controller
393 	writel(value, pcie->reg_base + reg);
398 	return readl(pcie->reg_base + reg);
415 	return (val >> (8 * offset)) & ((1 << (size * 8)) - 1);
435 	mask = ~(((1 << (size * 8)) - 1) << (offset * 8));
445 	void __iomem *addr = pcie->reg_base + CDNS_PCIE_RP_BASE + reg;
453 	void __iomem *addr = pcie->reg_base + CDNS_PCIE_RP_BASE + reg;
460 	void __iomem *addr = pcie->reg_base + CDNS_PCIE_RP_BASE + reg;
469 	void __iomem *addr = pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg;
477 	void __iomem *addr = pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg;
485 	writel(value, pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg);
490 	void __iomem *addr = pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg;
497 	return readl(pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg);
502 	if (pcie->ops->start_link)
503 		return pcie->ops->start_link(pcie);
510 	if (pcie->ops->stop_link)
511 		pcie->ops->stop_link(pcie);
516 	if (pcie->ops->link_up)
517 		return pcie->ops->link_up(pcie);