Lines Matching +full:pcie +full:- +full:ep
1 // SPDX-License-Identifier: GPL-2.0
3 * pci-j721e - PCIe controller driver for TI's J721E SoCs
5 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
10 #include <linux/clk-provider.h>
26 #include "pcie-cadence.h"
28 #define cdns_pcie_to_rc(p) container_of(p, struct cdns_pcie_rc, pcie)
83 static inline u32 j721e_pcie_user_readl(struct j721e_pcie *pcie, u32 offset) in j721e_pcie_user_readl() argument
85 return readl(pcie->user_cfg_base + offset); in j721e_pcie_user_readl()
88 static inline void j721e_pcie_user_writel(struct j721e_pcie *pcie, u32 offset, in j721e_pcie_user_writel() argument
91 writel(value, pcie->user_cfg_base + offset); in j721e_pcie_user_writel()
94 static inline u32 j721e_pcie_intd_readl(struct j721e_pcie *pcie, u32 offset) in j721e_pcie_intd_readl() argument
96 return readl(pcie->intd_cfg_base + offset); in j721e_pcie_intd_readl()
99 static inline void j721e_pcie_intd_writel(struct j721e_pcie *pcie, u32 offset, in j721e_pcie_intd_writel() argument
102 writel(value, pcie->intd_cfg_base + offset); in j721e_pcie_intd_writel()
107 struct j721e_pcie *pcie = priv; in j721e_pcie_link_irq_handler() local
108 struct device *dev = pcie->cdns_pcie->dev; in j721e_pcie_link_irq_handler()
111 reg = j721e_pcie_intd_readl(pcie, STATUS_REG_SYS_2); in j721e_pcie_link_irq_handler()
112 if (!(reg & pcie->linkdown_irq_regfield)) in j721e_pcie_link_irq_handler()
117 j721e_pcie_intd_writel(pcie, STATUS_CLR_REG_SYS_2, pcie->linkdown_irq_regfield); in j721e_pcie_link_irq_handler()
121 static void j721e_pcie_disable_link_irq(struct j721e_pcie *pcie) in j721e_pcie_disable_link_irq() argument
125 reg = j721e_pcie_intd_readl(pcie, ENABLE_CLR_REG_SYS_2); in j721e_pcie_disable_link_irq()
126 reg |= pcie->linkdown_irq_regfield; in j721e_pcie_disable_link_irq()
127 j721e_pcie_intd_writel(pcie, ENABLE_CLR_REG_SYS_2, reg); in j721e_pcie_disable_link_irq()
130 static void j721e_pcie_config_link_irq(struct j721e_pcie *pcie) in j721e_pcie_config_link_irq() argument
134 reg = j721e_pcie_intd_readl(pcie, ENABLE_REG_SYS_2); in j721e_pcie_config_link_irq()
135 reg |= pcie->linkdown_irq_regfield; in j721e_pcie_config_link_irq()
136 j721e_pcie_intd_writel(pcie, ENABLE_REG_SYS_2, reg); in j721e_pcie_config_link_irq()
141 struct j721e_pcie *pcie = dev_get_drvdata(cdns_pcie->dev); in j721e_pcie_start_link() local
144 reg = j721e_pcie_user_readl(pcie, J721E_PCIE_USER_CMD_STATUS); in j721e_pcie_start_link()
146 j721e_pcie_user_writel(pcie, J721E_PCIE_USER_CMD_STATUS, reg); in j721e_pcie_start_link()
153 struct j721e_pcie *pcie = dev_get_drvdata(cdns_pcie->dev); in j721e_pcie_stop_link() local
156 reg = j721e_pcie_user_readl(pcie, J721E_PCIE_USER_CMD_STATUS); in j721e_pcie_stop_link()
158 j721e_pcie_user_writel(pcie, J721E_PCIE_USER_CMD_STATUS, reg); in j721e_pcie_stop_link()
163 struct j721e_pcie *pcie = dev_get_drvdata(cdns_pcie->dev); in j721e_pcie_link_up() local
166 reg = j721e_pcie_user_readl(pcie, J721E_PCIE_USER_LINKSTATUS); in j721e_pcie_link_up()
176 static int j721e_pcie_set_mode(struct j721e_pcie *pcie, struct regmap *syscon, in j721e_pcie_set_mode() argument
179 struct device *dev = pcie->cdns_pcie->dev; in j721e_pcie_set_mode()
181 u32 mode = pcie->mode; in j721e_pcie_set_mode()
190 dev_err(dev, "failed to set pcie mode\n"); in j721e_pcie_set_mode()
195 static int j721e_pcie_set_link_speed(struct j721e_pcie *pcie, in j721e_pcie_set_link_speed() argument
198 struct device *dev = pcie->cdns_pcie->dev; in j721e_pcie_set_link_speed()
199 struct device_node *np = dev->of_node; in j721e_pcie_set_link_speed()
208 val = link_speed - 1; in j721e_pcie_set_link_speed()
216 static int j721e_pcie_set_lane_count(struct j721e_pcie *pcie, in j721e_pcie_set_lane_count() argument
219 struct device *dev = pcie->cdns_pcie->dev; in j721e_pcie_set_lane_count()
220 u32 lanes = pcie->num_lanes; in j721e_pcie_set_lane_count()
225 if (pcie->max_lanes == 4) in j721e_pcie_set_lane_count()
228 val = LANE_COUNT(lanes - 1); in j721e_pcie_set_lane_count()
236 static int j721e_enable_acspcie_refclk(struct j721e_pcie *pcie, in j721e_enable_acspcie_refclk() argument
239 struct device *dev = pcie->cdns_pcie->dev; in j721e_enable_acspcie_refclk()
240 struct device_node *node = dev->of_node; in j721e_enable_acspcie_refclk()
247 "ti,syscon-acspcie-proxy-ctrl", in j721e_enable_acspcie_refclk()
251 "ti,syscon-acspcie-proxy-ctrl has invalid arguments\n"); in j721e_enable_acspcie_refclk()
266 static int j721e_pcie_ctrl_init(struct j721e_pcie *pcie) in j721e_pcie_ctrl_init() argument
268 struct device *dev = pcie->cdns_pcie->dev; in j721e_pcie_ctrl_init()
269 struct device_node *node = dev->of_node; in j721e_pcie_ctrl_init()
275 syscon = syscon_regmap_lookup_by_phandle(node, "ti,syscon-pcie-ctrl"); in j721e_pcie_ctrl_init()
277 dev_err(dev, "Unable to get ti,syscon-pcie-ctrl regmap\n"); in j721e_pcie_ctrl_init()
282 ret = of_parse_phandle_with_fixed_args(node, "ti,syscon-pcie-ctrl", 1, in j721e_pcie_ctrl_init()
288 * The PCIe Controller's registers have different "reset-values" in j721e_pcie_ctrl_init()
290 * register within the CTRL_MMR memory-mapped register space. in j721e_pcie_ctrl_init()
291 * The registers latch onto a "reset-value" based on the "strap" in j721e_pcie_ctrl_init()
292 * settings sampled after the PCIe Controller is powered on. in j721e_pcie_ctrl_init()
293 * To ensure that the "reset-values" are sampled accurately, power in j721e_pcie_ctrl_init()
294 * off the PCIe Controller before programming the "strap" settings in j721e_pcie_ctrl_init()
298 * and power on the PCIe Controller. in j721e_pcie_ctrl_init()
302 dev_err(dev, "Failed to power off PCIe Controller\n"); in j721e_pcie_ctrl_init()
306 ret = j721e_pcie_set_mode(pcie, syscon, offset); in j721e_pcie_ctrl_init()
312 ret = j721e_pcie_set_link_speed(pcie, syscon, offset); in j721e_pcie_ctrl_init()
318 ret = j721e_pcie_set_lane_count(pcie, syscon, offset); in j721e_pcie_ctrl_init()
320 dev_err(dev, "Failed to set num-lanes\n"); in j721e_pcie_ctrl_init()
326 dev_err(dev, "Failed to power on PCIe Controller\n"); in j721e_pcie_ctrl_init()
332 "ti,syscon-acspcie-proxy-ctrl"); in j721e_pcie_ctrl_init()
336 return j721e_enable_acspcie_refclk(pcie, syscon); in j721e_pcie_ctrl_init()
431 .compatible = "ti,j721e-pcie-host",
435 .compatible = "ti,j721e-pcie-ep",
439 .compatible = "ti,j7200-pcie-host",
443 .compatible = "ti,j7200-pcie-ep",
447 .compatible = "ti,am64-pcie-host",
451 .compatible = "ti,am64-pcie-ep",
455 .compatible = "ti,j784s4-pcie-host",
459 .compatible = "ti,j784s4-pcie-ep",
463 .compatible = "ti,j722s-pcie-host",
472 struct device *dev = &pdev->dev; in j721e_pcie_probe()
473 struct device_node *node = dev->of_node; in j721e_pcie_probe()
477 struct j721e_pcie *pcie; in j721e_pcie_probe() local
479 struct cdns_pcie_ep *ep = NULL; in j721e_pcie_probe() local
490 return -EINVAL; in j721e_pcie_probe()
492 mode = (u32)data->mode; in j721e_pcie_probe()
494 pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); in j721e_pcie_probe()
495 if (!pcie) in j721e_pcie_probe()
496 return -ENOMEM; in j721e_pcie_probe()
501 return -ENODEV; in j721e_pcie_probe()
505 return -ENOMEM; in j721e_pcie_probe()
507 if (!data->byte_access_allowed) in j721e_pcie_probe()
508 bridge->ops = &cdns_ti_pcie_host_ops; in j721e_pcie_probe()
510 rc->quirk_retrain_flag = data->quirk_retrain_flag; in j721e_pcie_probe()
511 rc->quirk_detect_quiet_flag = data->quirk_detect_quiet_flag; in j721e_pcie_probe()
513 cdns_pcie = &rc->pcie; in j721e_pcie_probe()
514 cdns_pcie->dev = dev; in j721e_pcie_probe()
515 cdns_pcie->ops = &j721e_pcie_ops; in j721e_pcie_probe()
516 pcie->cdns_pcie = cdns_pcie; in j721e_pcie_probe()
520 return -ENODEV; in j721e_pcie_probe()
522 ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL); in j721e_pcie_probe()
523 if (!ep) in j721e_pcie_probe()
524 return -ENOMEM; in j721e_pcie_probe()
526 ep->quirk_detect_quiet_flag = data->quirk_detect_quiet_flag; in j721e_pcie_probe()
527 ep->quirk_disable_flr = data->quirk_disable_flr; in j721e_pcie_probe()
529 cdns_pcie = &ep->pcie; in j721e_pcie_probe()
530 cdns_pcie->dev = dev; in j721e_pcie_probe()
531 cdns_pcie->ops = &j721e_pcie_ops; in j721e_pcie_probe()
532 pcie->cdns_pcie = cdns_pcie; in j721e_pcie_probe()
539 pcie->mode = mode; in j721e_pcie_probe()
540 pcie->linkdown_irq_regfield = data->linkdown_irq_regfield; in j721e_pcie_probe()
545 pcie->intd_cfg_base = base; in j721e_pcie_probe()
550 pcie->user_cfg_base = base; in j721e_pcie_probe()
552 ret = of_property_read_u32(node, "num-lanes", &num_lanes); in j721e_pcie_probe()
553 if (ret || num_lanes > data->max_lanes) { in j721e_pcie_probe()
554 dev_warn(dev, "num-lanes property not provided or invalid, setting num-lanes to 1\n"); in j721e_pcie_probe()
558 pcie->num_lanes = num_lanes; in j721e_pcie_probe()
559 pcie->max_lanes = data->max_lanes; in j721e_pcie_probe()
562 return -EINVAL; in j721e_pcie_probe()
568 dev_set_drvdata(dev, pcie); in j721e_pcie_probe()
576 ret = j721e_pcie_ctrl_init(pcie); in j721e_pcie_probe()
583 "j721e-pcie-link-down-irq", pcie); in j721e_pcie_probe()
589 j721e_pcie_config_link_irq(pcie); in j721e_pcie_probe()
598 pcie->reset_gpio = gpiod; in j721e_pcie_probe()
617 pcie->refclk = clk; in j721e_pcie_probe()
633 clk_disable_unprepare(pcie->refclk); in j721e_pcie_probe()
645 ret = cdns_pcie_ep_setup(ep); in j721e_pcie_probe()
666 struct j721e_pcie *pcie = platform_get_drvdata(pdev); in j721e_pcie_remove() local
667 struct cdns_pcie *cdns_pcie = pcie->cdns_pcie; in j721e_pcie_remove()
668 struct device *dev = &pdev->dev; in j721e_pcie_remove()
669 struct cdns_pcie_ep *ep; in j721e_pcie_remove() local
672 if (pcie->mode == PCI_MODE_RC) { in j721e_pcie_remove()
673 rc = container_of(cdns_pcie, struct cdns_pcie_rc, pcie); in j721e_pcie_remove()
676 ep = container_of(cdns_pcie, struct cdns_pcie_ep, pcie); in j721e_pcie_remove()
677 cdns_pcie_ep_disable(ep); in j721e_pcie_remove()
680 gpiod_set_value_cansleep(pcie->reset_gpio, 0); in j721e_pcie_remove()
682 clk_disable_unprepare(pcie->refclk); in j721e_pcie_remove()
684 j721e_pcie_disable_link_irq(pcie); in j721e_pcie_remove()
691 struct j721e_pcie *pcie = dev_get_drvdata(dev); in j721e_pcie_suspend_noirq() local
693 if (pcie->mode == PCI_MODE_RC) { in j721e_pcie_suspend_noirq()
694 gpiod_set_value_cansleep(pcie->reset_gpio, 0); in j721e_pcie_suspend_noirq()
695 clk_disable_unprepare(pcie->refclk); in j721e_pcie_suspend_noirq()
698 cdns_pcie_disable_phy(pcie->cdns_pcie); in j721e_pcie_suspend_noirq()
705 struct j721e_pcie *pcie = dev_get_drvdata(dev); in j721e_pcie_resume_noirq() local
706 struct cdns_pcie *cdns_pcie = pcie->cdns_pcie; in j721e_pcie_resume_noirq()
709 ret = j721e_pcie_ctrl_init(pcie); in j721e_pcie_resume_noirq()
713 j721e_pcie_config_link_irq(pcie); in j721e_pcie_resume_noirq()
719 ret = cdns_pcie_enable_phy(pcie->cdns_pcie); in j721e_pcie_resume_noirq()
723 if (pcie->mode == PCI_MODE_RC) { in j721e_pcie_resume_noirq()
726 ret = clk_prepare_enable(pcie->refclk); in j721e_pcie_resume_noirq()
737 if (pcie->reset_gpio) { in j721e_pcie_resume_noirq()
739 gpiod_set_value_cansleep(pcie->reset_gpio, 1); in j721e_pcie_resume_noirq()
744 clk_disable_unprepare(pcie->refclk); in j721e_pcie_resume_noirq()
753 rc->avail_ib_bar[bar] = true; in j721e_pcie_resume_noirq()
757 clk_disable_unprepare(pcie->refclk); in j721e_pcie_resume_noirq()
773 .name = "j721e-pcie",
782 MODULE_DESCRIPTION("PCIe controller driver for TI's J721E and related SoCs");