Lines Matching +full:0 +full:xa000
25 titan_110l = 0,
102 dev->subsystem_device == 0x0299)
110 * and serial ports. The form is 0x00PS, where <P> is the number of
113 par->numports = (dev->subsystem_device & 0xf0) >> 4;
118 return 0;
125 /* netmos_9855 */ { 1, { { 0, -1 }, }, netmos_parallel_init },
126 /* netmos_9855_2p */ { 2, { { 0, -1 }, { 2, -1 }, } },
128 /* netmos_9900_2p */ {2, { { 0, 1 }, { 3, 4 }, } },
129 /* netmos_99xx_1p */ {1, { { 0, 1 }, } },
174 PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_110l },
176 PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_210l },
178 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
180 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
182 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
184 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
186 0x1000, 0x0020, 0, 0, netmos_9855_2p },
188 0x1000, 0x0022, 0, 0, netmos_9855_2p },
190 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9855 },
192 0xA000, 0x3011, 0, 0, netmos_9900 },
194 0xA000, 0x3012, 0, 0, netmos_9900 },
196 0xA000, 0x3020, 0, 0, netmos_9900_2p },
198 0xA000, 0x2000, 0, 0, netmos_99xx_1p },
200 { PCI_VENDOR_ID_AFAVLAB, 0x2110,
201 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p },
202 { PCI_VENDOR_ID_AFAVLAB, 0x2111,
203 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p },
204 { PCI_VENDOR_ID_AFAVLAB, 0x2112,
205 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p },
206 { PCI_VENDOR_ID_AFAVLAB, 0x2140,
207 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p },
208 { PCI_VENDOR_ID_AFAVLAB, 0x2141,
209 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p },
210 { PCI_VENDOR_ID_AFAVLAB, 0x2142,
211 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p },
212 { PCI_VENDOR_ID_AFAVLAB, 0x2160,
213 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p },
214 { PCI_VENDOR_ID_AFAVLAB, 0x2161,
215 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p },
216 { PCI_VENDOR_ID_AFAVLAB, 0x2162,
217 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p },
219 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x },
221 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x },
223 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x },
225 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x },
227 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x },
229 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x },
231 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x },
233 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x },
235 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x },
237 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
239 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x },
241 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x },
243 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
245 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
247 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
249 { 0x1409, 0x7168, 0x1409, 0x4078, 0, 0, timedia_4078a },
250 { 0x1409, 0x7168, 0x1409, 0x4079, 0, 0, timedia_4079h },
251 { 0x1409, 0x7168, 0x1409, 0x4085, 0, 0, timedia_4085h },
252 { 0x1409, 0x7168, 0x1409, 0x4088, 0, 0, timedia_4088a },
253 { 0x1409, 0x7168, 0x1409, 0x4089, 0, 0, timedia_4089a },
254 { 0x1409, 0x7168, 0x1409, 0x4095, 0, 0, timedia_4095a },
255 { 0x1409, 0x7168, 0x1409, 0x4096, 0, 0, timedia_4096a },
256 { 0x1409, 0x7168, 0x1409, 0x5078, 0, 0, timedia_4078u },
257 { 0x1409, 0x7168, 0x1409, 0x5079, 0, 0, timedia_4079a },
258 { 0x1409, 0x7168, 0x1409, 0x5085, 0, 0, timedia_4085u },
259 { 0x1409, 0x7168, 0x1409, 0x6079, 0, 0, timedia_4079r },
260 { 0x1409, 0x7168, 0x1409, 0x7079, 0, 0, timedia_4079s },
261 { 0x1409, 0x7168, 0x1409, 0x8079, 0, 0, timedia_4079d },
262 { 0x1409, 0x7168, 0x1409, 0x9079, 0, 0, timedia_4079e },
263 { 0x1409, 0x7168, 0x1409, 0xa079, 0, 0, timedia_4079f },
264 { 0x1409, 0x7168, 0x1409, 0xb079, 0, 0, timedia_9079a },
265 { 0x1409, 0x7168, 0x1409, 0xc079, 0, 0, timedia_9079b },
266 { 0x1409, 0x7168, 0x1409, 0xd079, 0, 0, timedia_9079c },
270 PCI_ANY_ID, PCI_ANY_ID, 0, 0, wch_ch353_1s1p },
272 0x4348, 0x3253, 0, 0, wch_ch353_2s1p },
274 0x1c00, 0x3050, 0, 0, wch_ch382_0s1p },
276 0x1c00, 0x3250, 0, 0, wch_ch382_2s1p },
279 { PCI_VENDOR_ID_INTASHIELD, 0x4100,
280 PCI_ANY_ID, PCI_ANY_ID, 0, 0, brainboxes_5s1p },
284 0x0100, 0, 0, sunix_4008a },
286 0x0101, 0, 0, sunix_5069a },
288 0x0102, 0, 0, sunix_5079a },
290 0x0104, 0, 0, sunix_5099a },
293 { PCI_VENDOR_ID_INTASHIELD, 0x0bc1,
294 PCI_ANY_ID, PCI_ANY_ID, 0, 0, brainboxes_uc257 },
295 { PCI_VENDOR_ID_INTASHIELD, 0x0bc2,
296 PCI_ANY_ID, PCI_ANY_ID, 0, 0, brainboxes_uc257 },
299 { PCI_VENDOR_ID_INTASHIELD, 0x0861,
300 PCI_ANY_ID, PCI_ANY_ID, 0, 0, brainboxes_uc257 },
301 { PCI_VENDOR_ID_INTASHIELD, 0x0862,
302 PCI_ANY_ID, PCI_ANY_ID, 0, 0, brainboxes_uc257 },
303 { PCI_VENDOR_ID_INTASHIELD, 0x0863,
304 PCI_ANY_ID, PCI_ANY_ID, 0, 0, brainboxes_uc257 },
307 { PCI_VENDOR_ID_INTASHIELD, 0x0e61,
308 PCI_ANY_ID, PCI_ANY_ID, 0, 0, brainboxes_uc414 },
311 { PCI_VENDOR_ID_INTASHIELD, 0x0981,
312 PCI_ANY_ID, PCI_ANY_ID, 0, 0, brainboxes_uc257 },
313 { PCI_VENDOR_ID_INTASHIELD, 0x0982,
314 PCI_ANY_ID, PCI_ANY_ID, 0, 0, brainboxes_uc257 },
317 { PCI_VENDOR_ID_INTASHIELD, 0x0da0,
318 PCI_ANY_ID, PCI_ANY_ID, 0, 0, brainboxes_is300 },
321 { PCI_VENDOR_ID_INTASHIELD, 0x402c,
322 PCI_ANY_ID, PCI_ANY_ID, 0, 0, brainboxes_px263 },
324 { 0, } /* terminate list */
374 .num_ports = 0,
380 .num_ports = 0,
554 .num_ports = 0,
563 .first_offset = 0xC0,
572 .num_ports = 0,
577 .uart_offset = 0x8,
582 .uart_offset = 0x8,
587 .uart_offset = 0x8,
630 if (board->num_ports == 0)
631 return 0;
638 return 0;
646 int n, success = 0;
654 for (n = 0; n < card->numports; n++) {
669 io_hi = 0;
670 if ((hi >= 0) && (hi <= 6))
677 irq = pci_irq_vector(dev, 0);
678 if (irq < 0)
680 if (irq == 0)
702 return 0;
728 for (i = 0; i < priv->num_par; i++)
733 return 0;
746 for (i = 0; i < priv->num_par; i++)
760 return 0;
771 return 0;