Lines Matching +full:d +full:- +full:tlb +full:- +full:size
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 ** ccio-dma.c:
4 ** DMA management routines for first generation cache-coherent machines.
9 ** (c) Copyright 2000 Hewlett-Packard Company
13 ** the I/O MMU - basically what x86 does.
16 ** o outbound DMA is slower - U2 won't prefetch data (GSC+ XQL signal).
17 ** o Inbound DMA less efficient - U2 can't use DMA_FAST attribute.
19 ** o Doesn't work under PCX-U/U+ machines since they didn't follow
20 ** the coherency design originally worked out. Only PCX-W does.
34 #include <linux/dma-map-ops.h>
36 #include <linux/iommu-helper.h>
46 #include <asm/parisc-device.h>
51 ** Choose "ccio" since that's what HP-UX calls it.
99 #define CMD_TLB_DIRECT_WRITE 35 /* IO_COMMAND for I/O TLB Writes */
100 #define CMD_TLB_PURGE 33 /* IO_COMMAND to Purge I/O TLB entry */
130 ** -------------
137 ** | HV | TLB | reserved | HV | mode | reserved |
158 ** o TLB field affects transactions which are forwarded from GSC+ to Runway.
161 ** TLB Mode Value Description
162 ** Real 0 No TLB translation. Address is directly mapped and the
164 ** Error 1 Software fills the TLB manually.
165 ** Normal 2 IOA fetches IO TLB misses from IO PDIR (in host memory).
218 u32 pdir_size; /* bytes, function of IOV Space size */
219 u32 res_hint; /* next available IOVP -
221 u32 res_size; /* size of resource map in bytes */
245 struct pci_dev *fake_pci_dev; /* the fake pci_dev for non-pci devs */
262 * allocation policies is also adjusted. We'd like to avoid
263 * I/O TLB thrashing by having resource allocation policy
264 * match the I/O TLB replacement policy.
284 #define CCIO_SEARCH_LOOP(ioc, res_idx, mask, size) \ argument
288 idx = (unsigned int)((unsigned long)res_ptr - (unsigned long)ioc->res_map); \
293 ioc->res_hint = res_idx + (size >> 3); \
298 #define CCIO_FIND_FREE_MAPPING(ioa, res_idx, mask, size) \ argument
299 u##size *res_ptr = (u##size *)&((ioc)->res_map[ioa->res_hint & ~((size >> 3) - 1)]); \
300 u##size *res_end = (u##size *)&(ioc)->res_map[ioa->res_size]; \
301 CCIO_SEARCH_LOOP(ioc, res_idx, mask, size); \
302 res_ptr = (u##size *)&(ioc)->res_map[0]; \
303 CCIO_SEARCH_LOOP(ioa, res_idx, mask, size);
308 ** o Most IOVA's are "temporary" - avg search time should be small.
313 ** o search for log2(size) bits at a time.
320 * ccio_alloc_range - Allocate pages in the ioc's resource map.
323 * @size: The requested number of bytes to be mapped into the
327 * of available pages for the requested size.
330 ccio_alloc_range(struct ioc *ioc, struct device *dev, size_t size) in ccio_alloc_range() argument
332 unsigned int pages_needed = size >> IOVP_SHIFT; in ccio_alloc_range()
342 DBG_RES("%s() size: %zu pages_needed %d\n", in ccio_alloc_range()
343 __func__, size, pages_needed); in ccio_alloc_range()
354 * LAN traffic will not thrash the TLB IFF the same NIC in ccio_alloc_range()
360 * an unsigned long - not byte at a time. As it is now, in ccio_alloc_range()
386 DBG_RES("%s() res_idx %d res_hint: %d\n", in ccio_alloc_range()
387 __func__, res_idx, ioc->res_hint); in ccio_alloc_range()
392 unsigned long tmp = cr_end - cr_start; in ccio_alloc_range()
394 cr_start = (cr_end < cr_start) ? -(tmp) : (tmp); in ccio_alloc_range()
396 ioc->avg_search[ioc->avg_idx++] = cr_start; in ccio_alloc_range()
397 ioc->avg_idx &= CCIO_SEARCH_SAMPLE - 1; in ccio_alloc_range()
398 ioc->used_pages += pages_needed; in ccio_alloc_range()
406 #define CCIO_FREE_MAPPINGS(ioc, res_idx, mask, size) \ argument
407 u##size *res_ptr = (u##size *)&((ioc)->res_map[res_idx]); \
412 * ccio_free_range - Free pages from the ioc's resource map.
430 DBG_RES("%s(): res_idx: %d pages_mapped %lu\n", in ccio_free_range()
434 ioc->used_pages -= pages_mapped; in ccio_free_range()
487 ** FIXME: the default hints need to be per GSC device - not global.
489 ** HP-UX dorks: linux device driver programming model is totally different
490 ** than HP-UX's. HP-UX always sets HINT_PREFETCH since it's drivers
491 ** do special things to work on non-coherent platforms...linux has to
517 * ccio_io_pdir_entry - Initialize an I/O Pdir.
529 * +------+----------------+-----------------------------------------------+
533 * +------+----------------+-----------------------------------------------+
535 * +-----------------------+-----------------------------------------------+
539 * +-----------------------+-----------------------------------------------+
556 ** WORD 1 - low order word in ccio_io_pdir_entry()
565 ** WORD 0 - high order word in ccio_io_pdir_entry()
593 ** PCX-U/U+ do. (eg C200/C240) in ccio_io_pdir_entry()
594 ** PCX-T'? Don't know. (eg C110 or similar K-class) in ccio_io_pdir_entry()
596 ** See PDC_MODEL/option 0/SW_CAP word for "Non-coherent IO-PDIR bit". in ccio_io_pdir_entry()
598 ** "Since PCX-U employs an offset hash that is incompatible with in ccio_io_pdir_entry()
607 * ccio_clear_io_tlb - Remove stale entries from the I/O TLB.
612 * Purge invalid I/O PDIR entries from the I/O TLB.
619 u32 chain_size = 1 << ioc->chainid_shift; in ccio_clear_io_tlb()
625 WRITE_U32(CMD_TLB_PURGE | iovp, &ioc->ioc_regs->io_command); in ccio_clear_io_tlb()
627 byte_cnt -= chain_size; in ccio_clear_io_tlb()
632 * ccio_mark_invalid - Mark the I/O Pdir entries invalid.
638 * TLB entries.
641 * away the entire I/O TLB instead of individual entries.
643 * FIXME: Uturn has 256 TLB entries. We don't need to purge every
644 * PDIR entry - just once for each possible TLB entry.
655 /* round up to nearest page size */ in ccio_mark_invalid()
661 char *pdir_ptr = (char *) &(ioc->pdir_base[idx]); in ccio_mark_invalid()
663 BUG_ON(idx >= (ioc->pdir_size / sizeof(u64))); in ccio_mark_invalid()
667 ** PCX-U/U+ do. (eg C200/C240) in ccio_mark_invalid()
668 ** See PDC_MODEL/option 0/SW_CAP for "Non-coherent IO-PDIR bit". in ccio_mark_invalid()
673 byte_cnt -= IOVP_SIZE; in ccio_mark_invalid()
687 * ccio_dma_supported - Verify the IOMMU supports the DMA address range.
700 /* only support 32-bit or better devices (ie PCI/GSC) */ in ccio_dma_supported()
705 * ccio_map_single - Map an address range into the IOMMU.
708 * @size: The length of the DMA region.
714 ccio_map_single(struct device *dev, phys_addr_t addr, size_t size, in ccio_map_single() argument
730 BUG_ON(size <= 0); in ccio_map_single()
736 size = ALIGN(size + offset, IOVP_SIZE); in ccio_map_single()
737 spin_lock_irqsave(&ioc->res_lock, flags); in ccio_map_single()
740 ioc->msingle_calls++; in ccio_map_single()
741 ioc->msingle_pages += size >> IOVP_SHIFT; in ccio_map_single()
744 idx = ccio_alloc_range(ioc, dev, size); in ccio_map_single()
747 pdir_start = &(ioc->pdir_base[idx]); in ccio_map_single()
749 DBG_RUN("%s() %pa -> %#lx size: %zu\n", in ccio_map_single()
750 __func__, &addr, (long)(iovp | offset), size); in ccio_map_single()
753 if ((size % L1_CACHE_BYTES) || (addr % L1_CACHE_BYTES)) in ccio_map_single()
756 while(size > 0) { in ccio_map_single()
765 size -= IOVP_SIZE; in ccio_map_single()
768 spin_unlock_irqrestore(&ioc->res_lock, flags); in ccio_map_single()
776 ccio_map_phys(struct device *dev, phys_addr_t phys, size_t size, in ccio_map_phys() argument
782 return ccio_map_single(dev, phys, size, direction); in ccio_map_phys()
787 * ccio_unmap_phys - Unmap an address range from the IOMMU.
790 * @size: The length of the DMA region.
795 ccio_unmap_phys(struct device *dev, dma_addr_t iova, size_t size, in ccio_unmap_phys() argument
810 __func__, (long)iova, size); in ccio_unmap_phys()
813 size += offset; in ccio_unmap_phys()
814 size = ALIGN(size, IOVP_SIZE); in ccio_unmap_phys()
816 spin_lock_irqsave(&ioc->res_lock, flags); in ccio_unmap_phys()
819 ioc->usingle_calls++; in ccio_unmap_phys()
820 ioc->usingle_pages += size >> IOVP_SHIFT; in ccio_unmap_phys()
823 ccio_mark_invalid(ioc, iova, size); in ccio_unmap_phys()
824 ccio_free_range(ioc, iova, (size >> IOVP_SHIFT)); in ccio_unmap_phys()
825 spin_unlock_irqrestore(&ioc->res_lock, flags); in ccio_unmap_phys()
829 * ccio_alloc - Allocate a consistent DMA mapping.
831 * @size: The length of the DMA region.
839 ccio_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag, in ccio_alloc() argument
844 /* GRANT Need to establish hierarchy for non-PCI devs as well in ccio_alloc()
853 ret = (void *) __get_free_pages(flag, get_order(size)); in ccio_alloc()
856 memset(ret, 0, size); in ccio_alloc()
857 *dma_handle = ccio_map_single(dev, virt_to_phys(ret), size, in ccio_alloc()
865 * ccio_free - Free a consistent DMA mapping.
867 * @size: The length of the DMA region.
875 ccio_free(struct device *dev, size_t size, void *cpu_addr, in ccio_free() argument
878 ccio_unmap_phys(dev, dma_handle, size, 0, 0); in ccio_free()
879 free_pages((unsigned long)cpu_addr, get_order(size)); in ccio_free()
892 #include "iommu-helpers.h"
895 * ccio_map_sg - Map the scatter/gather list into the IOMMU.
918 return -EINVAL; in ccio_map_sg()
920 DBG_RUN_SG("%s() START %d entries\n", __func__, nents); in ccio_map_sg()
925 sg_phys(sglist), sglist->length, in ccio_map_sg()
927 sg_dma_len(sglist) = sglist->length; in ccio_map_sg()
934 spin_lock_irqsave(&ioc->res_lock, flags); in ccio_map_sg()
937 ioc->msg_calls++; in ccio_map_sg()
960 spin_unlock_irqrestore(&ioc->res_lock, flags); in ccio_map_sg()
964 DBG_RUN_SG("%s() DONE %d mappings\n", __func__, filled); in ccio_map_sg()
975 * ccio_unmap_sg - Unmap the scatter/gather list from the IOMMU.
997 DBG_RUN_SG("%s() START %d entries, %p,%x\n", in ccio_unmap_sg()
998 __func__, nents, sg_virt(sglist), sglist->length); in ccio_unmap_sg()
1001 ioc->usg_calls++; in ccio_unmap_sg()
1007 ioc->usg_pages += sg_dma_len(sglist) >> PAGE_SHIFT; in ccio_unmap_sg()
1012 nents--; in ccio_unmap_sg()
1015 DBG_RUN_SG("%s() DONE (nents %d)\n", __func__, nents); in ccio_unmap_sg()
1037 unsigned int total_pages = ioc->res_size << 3; in ccio_proc_info()
1043 seq_printf(m, "%s\n", ioc->name); in ccio_proc_info()
1046 (ioc->cujo20_bug ? "yes" : "no")); in ccio_proc_info()
1048 seq_printf(m, "IO PDIR size : %d bytes (%d entries)\n", in ccio_proc_info()
1052 seq_printf(m, "IO PDIR entries : %ld free %ld used (%d%%)\n", in ccio_proc_info()
1053 total_pages - ioc->used_pages, ioc->used_pages, in ccio_proc_info()
1054 (int)(ioc->used_pages * 100 / total_pages)); in ccio_proc_info()
1057 seq_printf(m, "Resource bitmap : %d bytes (%d pages)\n", in ccio_proc_info()
1058 ioc->res_size, total_pages); in ccio_proc_info()
1061 min = max = ioc->avg_search[0]; in ccio_proc_info()
1063 avg += ioc->avg_search[j]; in ccio_proc_info()
1064 if(ioc->avg_search[j] > max) in ccio_proc_info()
1065 max = ioc->avg_search[j]; in ccio_proc_info()
1066 if(ioc->avg_search[j] < min) in ccio_proc_info()
1067 min = ioc->avg_search[j]; in ccio_proc_info()
1073 seq_printf(m, "pci_map_single(): %8ld calls %8ld pages (avg %d/1000)\n", in ccio_proc_info()
1074 ioc->msingle_calls, ioc->msingle_pages, in ccio_proc_info()
1075 (int)((ioc->msingle_pages * 1000)/ioc->msingle_calls)); in ccio_proc_info()
1077 /* KLUGE - unmap_sg calls unmap_phys for each mapped page */ in ccio_proc_info()
1078 min = ioc->usingle_calls - ioc->usg_calls; in ccio_proc_info()
1079 max = ioc->usingle_pages - ioc->usg_pages; in ccio_proc_info()
1080 seq_printf(m, "pci_unmap_single: %8ld calls %8ld pages (avg %d/1000)\n", in ccio_proc_info()
1083 seq_printf(m, "pci_map_sg() : %8ld calls %8ld pages (avg %d/1000)\n", in ccio_proc_info()
1084 ioc->msg_calls, ioc->msg_pages, in ccio_proc_info()
1085 (int)((ioc->msg_pages * 1000)/ioc->msg_calls)); in ccio_proc_info()
1087 seq_printf(m, "pci_unmap_sg() : %8ld calls %8ld pages (avg %d/1000)\n\n\n", in ccio_proc_info()
1088 ioc->usg_calls, ioc->usg_pages, in ccio_proc_info()
1089 (int)((ioc->usg_pages * 1000)/ioc->usg_calls)); in ccio_proc_info()
1092 ioc = ioc->next; in ccio_proc_info()
1103 seq_hex_dump(m, " ", DUMP_PREFIX_NONE, 32, 4, ioc->res_map, in ccio_proc_bitmap_info()
1104 ioc->res_size, false); in ccio_proc_bitmap_info()
1106 ioc = ioc->next; in ccio_proc_bitmap_info()
1107 break; /* XXX - remove me */ in ccio_proc_bitmap_info()
1115 * ccio_find_ioc - Find the ioc in the ioc_list
1128 if (ioc->hw_path == hw_path) in ccio_find_ioc()
1131 ioc = ioc->next; in ccio_find_ioc()
1138 * ccio_get_iommu - Find the iommu which controls this device
1150 return ccio_find_ioc(dev->hw_path); in ccio_get_iommu()
1166 ioc->cujo20_bug = 1; in ccio_cujo20_fixup()
1167 res_ptr = ioc->res_map; in ccio_cujo20_fixup()
1170 while (idx < ioc->res_size) { in ccio_cujo20_fixup()
1177 /* GRANT - is this needed for U2 or not? */
1180 ** Get the size of the I/O TLB for this I/O MMU.
1182 ** If spa_shift is non-zero (ie probably U2),
1183 ** then calculate the I/O TLB size using spa_shift.
1185 ** Otherwise we are supposed to get the IODC entry point ENTRY TLB
1187 ** I think only Java (K/D/R-class too?) systems don't do this.
1192 if (dev->spa_shift == 0) {
1193 panic("%s() : Can't determine I/O TLB size.\n", __func__);
1195 return (1 << dev->spa_shift);
1199 /* Uturn supports 256 TLB entries */
1220 * ccio_ioc_init - Initialize the I/O Controller
1235 ** Determine IOVA Space size from memory size. in ccio_ioc_init()
1240 ** can be outstanding based on PCI Class/sub-class. Both in ccio_ioc_init()
1242 ** Hot-Plug/Removal of PCI cards. (aka PCI OLARD). in ccio_ioc_init()
1247 /* limit IOVA space size to 1MB-1GB */ in ccio_ioc_init()
1249 if (iova_space_size < (1 << (20 - PAGE_SHIFT))) { in ccio_ioc_init()
1250 iova_space_size = 1 << (20 - PAGE_SHIFT); in ccio_ioc_init()
1252 } else if (iova_space_size > (1 << (30 - PAGE_SHIFT))) { in ccio_ioc_init()
1253 iova_space_size = 1 << (30 - PAGE_SHIFT); in ccio_ioc_init()
1258 ** iova space must be log2() in size. in ccio_ioc_init()
1266 ** since the pages must also be physically contiguous - typically in ccio_ioc_init()
1275 ioc->pdir_size = (iova_space_size / IOVP_SIZE) * sizeof(u64); in ccio_ioc_init()
1277 BUG_ON(ioc->pdir_size > 8 * 1024 * 1024); /* max pdir size <= 8MB */ in ccio_ioc_init()
1280 BUG_ON((1 << get_order(ioc->pdir_size)) != (ioc->pdir_size >> PAGE_SHIFT)); in ccio_ioc_init()
1282 DBG_INIT("%s() hpa 0x%p mem %luMB IOV %dMB (%d bits)\n", in ccio_ioc_init()
1283 __func__, ioc->ioc_regs, in ccio_ioc_init()
1284 (unsigned long) totalram_pages() >> (20 - PAGE_SHIFT), in ccio_ioc_init()
1288 ioc->pdir_base = (__le64 *)__get_free_pages(GFP_KERNEL, in ccio_ioc_init()
1289 get_order(ioc->pdir_size)); in ccio_ioc_init()
1290 if(NULL == ioc->pdir_base) { in ccio_ioc_init()
1293 memset(ioc->pdir_base, 0, ioc->pdir_size); in ccio_ioc_init()
1295 BUG_ON((((unsigned long)ioc->pdir_base) & PAGE_MASK) != (unsigned long)ioc->pdir_base); in ccio_ioc_init()
1296 DBG_INIT(" base %p\n", ioc->pdir_base); in ccio_ioc_init()
1298 /* resource map size dictated by pdir_size */ in ccio_ioc_init()
1299 ioc->res_size = (ioc->pdir_size / sizeof(u64)) >> 3; in ccio_ioc_init()
1300 DBG_INIT("%s() res_size 0x%x\n", __func__, ioc->res_size); in ccio_ioc_init()
1302 ioc->res_map = (u8 *)__get_free_pages(GFP_KERNEL, in ccio_ioc_init()
1303 get_order(ioc->res_size)); in ccio_ioc_init()
1304 if(NULL == ioc->res_map) { in ccio_ioc_init()
1307 memset(ioc->res_map, 0, ioc->res_size); in ccio_ioc_init()
1310 ioc->res_hint = 16; in ccio_ioc_init()
1313 spin_lock_init(&ioc->res_lock); in ccio_ioc_init()
1317 ** which TLB entry an IOVP will use. in ccio_ioc_init()
1319 ioc->chainid_shift = get_order(iova_space_size) + PAGE_SHIFT - CCIO_CHAINID_SHIFT; in ccio_ioc_init()
1320 DBG_INIT(" chainid_shift 0x%x\n", ioc->chainid_shift); in ccio_ioc_init()
1325 WRITE_U32(CCIO_CHAINID_MASK << ioc->chainid_shift, in ccio_ioc_init()
1326 &ioc->ioc_regs->io_chain_id_mask); in ccio_ioc_init()
1328 WRITE_U32(virt_to_phys(ioc->pdir_base), in ccio_ioc_init()
1329 &ioc->ioc_regs->io_pdir_base); in ccio_ioc_init()
1334 WRITE_U32(IOA_NORMAL_MODE, &ioc->ioc_regs->io_control); in ccio_ioc_init()
1337 ** Initialize all I/O TLB entries to 0 (Valid bit off). in ccio_ioc_init()
1339 WRITE_U32(0, &ioc->ioc_regs->io_tlb_entry_m); in ccio_ioc_init()
1340 WRITE_U32(0, &ioc->ioc_regs->io_tlb_entry_l); in ccio_ioc_init()
1342 for(i = 1 << CCIO_CHAINID_SHIFT; i ; i--) { in ccio_ioc_init()
1343 WRITE_U32((CMD_TLB_DIRECT_WRITE | (i << ioc->chainid_shift)), in ccio_ioc_init()
1344 &ioc->ioc_regs->io_command); in ccio_ioc_init()
1353 res->parent = NULL; in ccio_init_resource()
1354 res->flags = IORESOURCE_MEM; in ccio_init_resource()
1358 * The upper 16-bits of range registers are hardcoded to 0xffff. in ccio_init_resource()
1360 res->start = (unsigned long)((signed) READ_U32(ioaddr) << 16); in ccio_init_resource()
1361 res->end = (unsigned long)((signed) (READ_U32(ioaddr + 4) << 16) - 1); in ccio_init_resource()
1362 res->name = name; in ccio_init_resource()
1366 if (res->end + 1 == res->start) in ccio_init_resource()
1369 /* On some platforms (e.g. K-Class), we have already registered in ccio_init_resource()
1377 __func__, (unsigned long)res->start, (unsigned long)res->end); in ccio_init_resource()
1383 struct resource *res = ioc->mmio_region; in ccio_init_resources()
1386 return -ENOMEM; in ccio_init_resources()
1387 snprintf(name, 14, "GSC Bus [%d/]", ioc->hw_path); in ccio_init_resources()
1389 ccio_init_resource(res, name, &ioc->ioc_regs->io_io_low); in ccio_init_resources()
1390 ccio_init_resource(res + 1, name, &ioc->ioc_regs->io_io_low_hv); in ccio_init_resources()
1394 static int new_ioc_area(struct resource *res, unsigned long size, in new_ioc_area() argument
1398 return -EBUSY; in new_ioc_area()
1400 res->start = (max - size + 1) &~ (align - 1); in new_ioc_area()
1401 res->end = res->start + size; in new_ioc_area()
1410 return new_ioc_area(res, size, min, max - size, align); in new_ioc_area()
1413 static int expand_ioc_area(struct resource *res, unsigned long size, in expand_ioc_area() argument
1418 if (!res->parent) in expand_ioc_area()
1419 return new_ioc_area(res, size, min, max, align); in expand_ioc_area()
1421 start = (res->start - size) &~ (align - 1); in expand_ioc_area()
1422 len = res->end - start + 1; in expand_ioc_area()
1428 start = res->start; in expand_ioc_area()
1429 len = ((size + res->end + align) &~ (align - 1)) - start; in expand_ioc_area()
1435 return -EBUSY; in expand_ioc_area()
1446 struct resource *res, unsigned long size, in ccio_allocate_resource() argument
1454 parent = ioc->mmio_region; in ccio_allocate_resource()
1455 if (parent->parent && in ccio_allocate_resource()
1456 !allocate_resource(parent, res, size, min, max, align, NULL, NULL)) in ccio_allocate_resource()
1459 if ((parent + 1)->parent && in ccio_allocate_resource()
1460 !allocate_resource(parent + 1, res, size, min, max, align, in ccio_allocate_resource()
1464 if (!expand_ioc_area(parent, size, min, max, align)) { in ccio_allocate_resource()
1465 __raw_writel(((parent->start)>>16) | 0xffff0000, in ccio_allocate_resource()
1466 &ioc->ioc_regs->io_io_low); in ccio_allocate_resource()
1467 __raw_writel(((parent->end)>>16) | 0xffff0000, in ccio_allocate_resource()
1468 &ioc->ioc_regs->io_io_high); in ccio_allocate_resource()
1469 } else if (!expand_ioc_area(parent + 1, size, min, max, align)) { in ccio_allocate_resource()
1471 __raw_writel(((parent->start)>>16) | 0xffff0000, in ccio_allocate_resource()
1472 &ioc->ioc_regs->io_io_low_hv); in ccio_allocate_resource()
1473 __raw_writel(((parent->end)>>16) | 0xffff0000, in ccio_allocate_resource()
1474 &ioc->ioc_regs->io_io_high_hv); in ccio_allocate_resource()
1476 return -EBUSY; in ccio_allocate_resource()
1480 return allocate_resource(parent, res, size, min, max, align, NULL,NULL); in ccio_allocate_resource()
1491 } else if ((ioc->mmio_region->start <= res->start) && in ccio_request_resource()
1492 (res->end <= ioc->mmio_region->end)) { in ccio_request_resource()
1493 parent = ioc->mmio_region; in ccio_request_resource()
1494 } else if (((ioc->mmio_region + 1)->start <= res->start) && in ccio_request_resource()
1495 (res->end <= (ioc->mmio_region + 1)->end)) { in ccio_request_resource()
1496 parent = ioc->mmio_region + 1; in ccio_request_resource()
1498 return -EBUSY; in ccio_request_resource()
1502 * firmware assigned them. e.g. children of hppb.c (e.g. K-class) in ccio_request_resource()
1510 * ccio_probe - Determine if ccio should claim this device.
1526 return -ENOMEM; in ccio_probe()
1529 ioc->name = dev->id.hversion == U2_IOA_RUNWAY ? "U2" : "UTurn"; in ccio_probe()
1531 printk(KERN_INFO "Found %s at 0x%lx\n", ioc->name, in ccio_probe()
1532 (unsigned long)dev->hpa.start); in ccio_probe()
1535 ioc_p = &(*ioc_p)->next; in ccio_probe()
1539 ioc->hw_path = dev->hw_path; in ccio_probe()
1540 ioc->ioc_regs = ioremap(dev->hpa.start, 4096); in ccio_probe()
1541 if (!ioc->ioc_regs) { in ccio_probe()
1543 return -ENOMEM; in ccio_probe()
1547 iounmap(ioc->ioc_regs); in ccio_probe()
1549 return -ENOMEM; in ccio_probe()
1557 hba->iommu = ioc; in ccio_probe()
1558 dev->dev.platform_data = hba; in ccio_probe()
1568 proc_create_single(MODULE_NAME"-bitmap", 0, runway, in ccio_probe()
1578 * ccio_init - ccio initialization procedure.