Lines Matching full:sdam
34 static bool sdam_is_valid(struct sdam_chip *sdam, unsigned int offset,
37 unsigned int sdam_mem_end = SDAM_MEM_START + sdam->size - 1;
66 struct sdam_chip *sdam = priv;
67 struct device *dev = sdam->sdam_config.dev;
70 if (!sdam_is_valid(sdam, offset, bytes)) {
71 dev_err(dev, "Invalid SDAM offset %#x len=%zd\n",
76 rc = regmap_bulk_read(sdam->regmap, sdam->base + offset, val, bytes);
78 dev_err(dev, "Failed to read SDAM offset %#x len=%zd, rc=%d\n",
87 struct sdam_chip *sdam = priv;
88 struct device *dev = sdam->sdam_config.dev;
91 if (!sdam_is_valid(sdam, offset, bytes)) {
92 dev_err(dev, "Invalid SDAM offset %#x len=%zd\n",
103 rc = regmap_bulk_write(sdam->regmap, sdam->base + offset, val, bytes);
105 dev_err(dev, "Failed to write SDAM offset %#x len=%zd, rc=%d\n",
113 struct sdam_chip *sdam;
118 sdam = devm_kzalloc(&pdev->dev, sizeof(*sdam), GFP_KERNEL);
119 if (!sdam)
122 sdam->regmap = dev_get_regmap(pdev->dev.parent, NULL);
123 if (!sdam->regmap) {
128 rc = of_property_read_u32(pdev->dev.of_node, "reg", &sdam->base);
130 dev_err(&pdev->dev, "Failed to get SDAM base, rc=%d\n", rc);
134 rc = regmap_read(sdam->regmap, sdam->base + SDAM_SIZE, &val);
139 sdam->size = val * 32;
141 sdam->sdam_config.dev = &pdev->dev;
142 sdam->sdam_config.name = "spmi_sdam";
143 sdam->sdam_config.id = NVMEM_DEVID_AUTO;
144 sdam->sdam_config.owner = THIS_MODULE;
145 sdam->sdam_config.add_legacy_fixed_of_cells = true;
146 sdam->sdam_config.stride = 1;
147 sdam->sdam_config.size = sdam->size;
148 sdam->sdam_config.word_size = 1;
149 sdam->sdam_config.reg_read = sdam_read;
150 sdam->sdam_config.reg_write = sdam_write;
151 sdam->sdam_config.priv = sdam;
153 nvmem = devm_nvmem_register(&pdev->dev, &sdam->sdam_config);
156 "Failed to register SDAM nvmem device rc=%ld\n",
161 "SDAM base=%#x size=%u registered successfully\n",
162 sdam->base, sdam->size);
168 { .compatible = "qcom,spmi-sdam" },
175 .name = "qcom,spmi-sdam",
182 MODULE_DESCRIPTION("QCOM SPMI SDAM driver");