623 	struct ntb_transport_mw *mw;  in ntb_transport_setup_qp_mw()  local
635 	mw = &nt->mw_vec[mw_num];  in ntb_transport_setup_qp_mw()
637 	if (!mw->virt_addr)  in ntb_transport_setup_qp_mw()
645 	rx_size = (unsigned int)mw->xlat_size / num_qps_mw;  in ntb_transport_setup_qp_mw()
646 	qp->rx_buff = mw->virt_addr + rx_size * (qp_num / mw_count);  in ntb_transport_setup_qp_mw()
799 	struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];  in ntb_free_mw()  local
802 	if (!mw->virt_addr)  in ntb_free_mw()
806 	dma_free_coherent(&pdev->dev, mw->alloc_size,  in ntb_free_mw()
807 			  mw->alloc_addr, mw->dma_addr);  in ntb_free_mw()
808 	mw->xlat_size = 0;  in ntb_free_mw()
809 	mw->buff_size = 0;  in ntb_free_mw()
810 	mw->alloc_size = 0;  in ntb_free_mw()
811 	mw->alloc_addr = NULL;  in ntb_free_mw()
812 	mw->virt_addr = NULL;  in ntb_free_mw()
815 static int ntb_alloc_mw_buffer(struct ntb_transport_mw *mw,  in ntb_alloc_mw_buffer()  argument
834 	alloc_addr = dma_alloc_attrs(ntb_dev, mw->alloc_size,  in ntb_alloc_mw_buffer()
838 		dev_err(ntb_dev, "Unable to alloc MW buff of size %zu\n",  in ntb_alloc_mw_buffer()
839 			mw->alloc_size);  in ntb_alloc_mw_buffer()
851 		if (mw->alloc_size > mw->buff_size) {  in ntb_alloc_mw_buffer()
860 	mw->alloc_addr = alloc_addr;  in ntb_alloc_mw_buffer()
861 	mw->virt_addr = virt_addr;  in ntb_alloc_mw_buffer()
862 	mw->dma_addr = dma_addr;  in ntb_alloc_mw_buffer()
867 	dma_free_coherent(ntb_dev, mw->alloc_size, alloc_addr, dma_addr);  in ntb_alloc_mw_buffer()
875 	struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];  in ntb_set_mw()  local
894 	if (mw->xlat_size == xlat_size)  in ntb_set_mw()
897 	if (mw->buff_size)  in ntb_set_mw()
901 	mw->xlat_size = xlat_size;  in ntb_set_mw()
902 	mw->buff_size = buff_size;  in ntb_set_mw()
903 	mw->alloc_size = buff_size;  in ntb_set_mw()
905 	rc = ntb_alloc_mw_buffer(mw, &pdev->dev, xlat_align);  in ntb_set_mw()
907 		mw->alloc_size *= 2;  in ntb_set_mw()
908 		rc = ntb_alloc_mw_buffer(mw, &pdev->dev, xlat_align);  in ntb_set_mw()
911 				"Unable to alloc aligned MW buff\n");  in ntb_set_mw()
912 			mw->xlat_size = 0;  in ntb_set_mw()
913 			mw->buff_size = 0;  in ntb_set_mw()
914 			mw->alloc_size = 0;  in ntb_set_mw()
920 	rc = ntb_mw_set_trans(nt->ndev, PIDX, num_mw, mw->dma_addr,  in ntb_set_mw()
921 			      mw->xlat_size);  in ntb_set_mw()
923 		dev_err(&pdev->dev, "Unable to set mw%d translation", num_mw);  in ntb_set_mw()
1116 		dev_dbg(&pdev->dev, "Remote MW%d size = %#llx\n", i, val64);  in ntb_transport_link_work()
1273 	struct ntb_transport_mw *mw;  in ntb_transport_probe()  local
1282 		dev_err(&ndev->dev, "Inbound MW based NTB API is required\n");  in ntb_transport_probe()
1306 	 * we will reserve the last MW for the MSI window.  in ntb_transport_probe()
1318 	/* Limit the MW's based on the availability of scratchpads */  in ntb_transport_probe()
1339 		mw = &nt->mw_vec[i];  in ntb_transport_probe()
1341 		rc = ntb_peer_mw_get_addr(ndev, i, &mw->phys_addr,  in ntb_transport_probe()
1342 					  &mw->phys_size);  in ntb_transport_probe()
1346 		mw->vbase = ioremap_wc(mw->phys_addr, mw->phys_size);  in ntb_transport_probe()
1347 		if (!mw->vbase) {  in ntb_transport_probe()
1352 		mw->buff_size = 0;  in ntb_transport_probe()
1353 		mw->xlat_size = 0;  in ntb_transport_probe()
1354 		mw->virt_addr = NULL;  in ntb_transport_probe()
1355 		mw->dma_addr = 0;  in ntb_transport_probe()
1421 		mw = &nt->mw_vec[i];  in ntb_transport_probe()
1422 		iounmap(mw->vbase);  in ntb_transport_probe()