Lines Matching +full:0 +full:x4048

50 #define GEN3_IMBAR1SZ_OFFSET		0x00d0
51 #define GEN3_IMBAR2SZ_OFFSET		0x00d1
52 #define GEN3_EMBAR1SZ_OFFSET		0x00d2
53 #define GEN3_EMBAR2SZ_OFFSET		0x00d3
54 #define GEN3_DEVCTRL_OFFSET		0x0098
55 #define GEN3_DEVSTS_OFFSET		0x009a
56 #define GEN3_UNCERRSTS_OFFSET		0x014c
57 #define GEN3_CORERRSTS_OFFSET		0x0158
58 #define GEN3_LINK_STATUS_OFFSET		0x01a2
60 #define GEN3_NTBCNTL_OFFSET		0x0000
61 #define GEN3_IMBAR1XBASE_OFFSET		0x0010		/* SBAR2XLAT */
62 #define GEN3_IMBAR1XLMT_OFFSET		0x0018		/* SBAR2LMT */
63 #define GEN3_IMBAR2XBASE_OFFSET		0x0020		/* SBAR4XLAT */
64 #define GEN3_IMBAR2XLMT_OFFSET		0x0028		/* SBAR4LMT */
65 #define GEN3_IM_INT_STATUS_OFFSET	0x0040
66 #define GEN3_IM_INT_DISABLE_OFFSET	0x0048
67 #define GEN3_IM_SPAD_OFFSET		0x0080		/* SPAD */
68 #define GEN3_USMEMMISS_OFFSET		0x0070
69 #define GEN3_INTVEC_OFFSET		0x00d0
70 #define GEN3_IM_DOORBELL_OFFSET		0x0100		/* SDOORBELL0 */
71 #define GEN3_B2B_SPAD_OFFSET		0x0180		/* B2B SPAD */
72 #define GEN3_EMBAR0XBASE_OFFSET		0x4008		/* B2B_XLAT */
73 #define GEN3_EMBAR1XBASE_OFFSET		0x4010		/* PBAR2XLAT */
74 #define GEN3_EMBAR1XLMT_OFFSET		0x4018		/* PBAR2LMT */
75 #define GEN3_EMBAR2XBASE_OFFSET		0x4020		/* PBAR4XLAT */
76 #define GEN3_EMBAR2XLMT_OFFSET		0x4028		/* PBAR4LMT */
77 #define GEN3_EM_INT_STATUS_OFFSET	0x4040
78 #define GEN3_EM_INT_DISABLE_OFFSET	0x4048
79 #define GEN3_EM_SPAD_OFFSET		0x4080		/* remote SPAD */
80 #define GEN3_EM_DOORBELL_OFFSET		0x4100		/* PDOORBELL0 */
81 #define GEN3_SPCICMD_OFFSET		0x4504		/* SPCICMD */
82 #define GEN3_EMBAR0_OFFSET		0x4510		/* SBAR0BASE */
83 #define GEN3_EMBAR1_OFFSET		0x4518		/* SBAR23BASE */
84 #define GEN3_EMBAR2_OFFSET		0x4520		/* SBAR45BASE */