1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/crc-ccitt.h>
132 #define PN544_FW_I2C_WRITE_DATA_MAX_LEN MIN((PN544_FW_I2C_MAX_PAYLOAD -\
136 #define PN544_FW_SECURE_CHUNK_WRITE_DATA_MAX_LEN (PN544_FW_I2C_MAX_PAYLOAD -\
161 	const struct firmware *fw;  member
183 		       16, 1, (skb)->data, (skb)->len, 0);	\
192 	nfc_info(&phy->i2c_dev->dev, "Detecting nfc_en polarity\n");  in pn544_hci_i2c_platform_init()
194 	/* Disable fw download */  in pn544_hci_i2c_platform_init()
195 	gpiod_set_value_cansleep(phy->gpiod_fw, 0);  in pn544_hci_i2c_platform_init()
198 		phy->en_polarity = polarity;  in pn544_hci_i2c_platform_init()
200 		while (retry--) {  in pn544_hci_i2c_platform_init()
202 			gpiod_set_value_cansleep(phy->gpiod_en, !phy->en_polarity);  in pn544_hci_i2c_platform_init()
206 			gpiod_set_value_cansleep(phy->gpiod_en, phy->en_polarity);  in pn544_hci_i2c_platform_init()
210 			dev_dbg(&phy->i2c_dev->dev, "Sending reset cmd\n");  in pn544_hci_i2c_platform_init()
211 			ret = i2c_master_send(phy->i2c_dev, rset_cmd, count);  in pn544_hci_i2c_platform_init()
213 				nfc_info(&phy->i2c_dev->dev,  in pn544_hci_i2c_platform_init()
221 	nfc_err(&phy->i2c_dev->dev,  in pn544_hci_i2c_platform_init()
225 	gpiod_set_value_cansleep(phy->gpiod_en, !phy->en_polarity);  in pn544_hci_i2c_platform_init()
231 	gpiod_set_value_cansleep(phy->gpiod_fw, run_mode == PN544_FW_MODE ? 1 : 0);  in pn544_hci_i2c_enable_mode()
232 	gpiod_set_value_cansleep(phy->gpiod_en, phy->en_polarity);  in pn544_hci_i2c_enable_mode()
235 	phy->run_mode = run_mode;  in pn544_hci_i2c_enable_mode()
244 	phy->powered = 1;  in pn544_hci_i2c_enable()
253 	gpiod_set_value_cansleep(phy->gpiod_fw, 0);  in pn544_hci_i2c_disable()
254 	gpiod_set_value_cansleep(phy->gpiod_en, !phy->en_polarity);  in pn544_hci_i2c_disable()
257 	gpiod_set_value_cansleep(phy->gpiod_en, phy->en_polarity);  in pn544_hci_i2c_disable()
260 	gpiod_set_value_cansleep(phy->gpiod_en, !phy->en_polarity);  in pn544_hci_i2c_disable()
263 	phy->powered = 0;  in pn544_hci_i2c_disable()
271 	len = skb->len + 2;  in pn544_hci_i2c_add_len_crc()
274 	crc = crc_ccitt(0xffff, skb->data, skb->len);  in pn544_hci_i2c_add_len_crc()
295 	struct i2c_client *client = phy->i2c_dev;  in pn544_hci_i2c_write()
297 	if (phy->hard_fault != 0)  in pn544_hci_i2c_write()
298 		return phy->hard_fault;  in pn544_hci_i2c_write()
306 	r = i2c_master_send(client, skb->data, skb->len);  in pn544_hci_i2c_write()
308 	if (r == -EREMOTEIO) {	/* Retry, chip was in standby */  in pn544_hci_i2c_write()
310 		r = i2c_master_send(client, skb->data, skb->len);  in pn544_hci_i2c_write()
314 		if (r != skb->len)  in pn544_hci_i2c_write()
315 			r = -EREMOTEIO;  in pn544_hci_i2c_write()
331 	crc = crc_ccitt(0xffff, buf, len - 2);  in check_crc()
334 	if (buf[len - 2] != (crc & 0xff) || buf[len - 1] != (crc >> 8)) {  in check_crc()
336 		       crc, buf[len - 1], buf[len - 2]);  in check_crc()
340 		return -EPERM;  in check_crc()
350  * -EREMOTEIO : i2c read error (fatal)
351  * -EBADMSG : frame was incorrect and discarded
352  * -ENOMEM : cannot allocate skb, frame dropped
358 	u8 tmp[PN544_HCI_I2C_LLC_MAX_SIZE - 1];  in pn544_hci_i2c_read()
359 	struct i2c_client *client = phy->i2c_dev;  in pn544_hci_i2c_read()
363 		nfc_err(&client->dev, "cannot read len byte\n");  in pn544_hci_i2c_read()
364 		return -EREMOTEIO;  in pn544_hci_i2c_read()
367 	if ((len < (PN544_HCI_I2C_LLC_MIN_SIZE - 1)) ||  in pn544_hci_i2c_read()
368 	    (len > (PN544_HCI_I2C_LLC_MAX_SIZE - 1))) {  in pn544_hci_i2c_read()
369 		nfc_err(&client->dev, "invalid len byte\n");  in pn544_hci_i2c_read()
370 		r = -EBADMSG;  in pn544_hci_i2c_read()
376 		r = -ENOMEM;  in pn544_hci_i2c_read()
385 		return -EREMOTEIO;  in pn544_hci_i2c_read()
390 	r = check_crc((*skb)->data, (*skb)->len);  in pn544_hci_i2c_read()
393 		r = -EBADMSG;  in pn544_hci_i2c_read()
398 	skb_trim(*skb, (*skb)->len - 2);  in pn544_hci_i2c_read()
406 		r = -EREMOTEIO;  in pn544_hci_i2c_read()
417 	struct i2c_client *client = phy->i2c_dev;  in pn544_hci_i2c_fw_read_status()
421 		nfc_err(&client->dev, "cannot read fw status\n");  in pn544_hci_i2c_fw_read_status()
422 		return -EIO;  in pn544_hci_i2c_fw_read_status()
433 		return -ETIMEDOUT;  in pn544_hci_i2c_fw_read_status()
435 		return -ENODATA;  in pn544_hci_i2c_fw_read_status()
437 		return -EACCES;  in pn544_hci_i2c_fw_read_status()
439 		return -EPROTO;  in pn544_hci_i2c_fw_read_status()
441 		return -EINVAL;  in pn544_hci_i2c_fw_read_status()
443 		return -ENOTSUPP;  in pn544_hci_i2c_fw_read_status()
445 		return -EBADMSG;  in pn544_hci_i2c_fw_read_status()
447 		return -ENOKEY;  in pn544_hci_i2c_fw_read_status()
449 		return -EINVAL;  in pn544_hci_i2c_fw_read_status()
451 		return -ENOMEM;  in pn544_hci_i2c_fw_read_status()
453 		return -EACCES;  in pn544_hci_i2c_fw_read_status()
456 		return -EIO;  in pn544_hci_i2c_fw_read_status()
458 		return -EIO;  in pn544_hci_i2c_fw_read_status()
465  * The frame format is len-data-crc, and corruption can occur anywhere while
470  * - the chip will always present only one single complete frame on the bus
472  * - the chip will not present a new frame until we have completely read
485 	if (!phy || irq != phy->i2c_dev->irq) {  in pn544_hci_i2c_irq_thread_fn()
490 	client = phy->i2c_dev;  in pn544_hci_i2c_irq_thread_fn()
491 	dev_dbg(&client->dev, "IRQ\n");  in pn544_hci_i2c_irq_thread_fn()
493 	if (phy->hard_fault != 0)  in pn544_hci_i2c_irq_thread_fn()
496 	if (phy->run_mode == PN544_FW_MODE) {  in pn544_hci_i2c_irq_thread_fn()
497 		phy->fw_cmd_result = pn544_hci_i2c_fw_read_status(phy);  in pn544_hci_i2c_irq_thread_fn()
498 		schedule_work(&phy->fw_work);  in pn544_hci_i2c_irq_thread_fn()
501 		if (r == -EREMOTEIO) {  in pn544_hci_i2c_irq_thread_fn()
502 			phy->hard_fault = r;  in pn544_hci_i2c_irq_thread_fn()
504 			nfc_hci_recv_frame(phy->hdev, NULL);  in pn544_hci_i2c_irq_thread_fn()
507 		} else if ((r == -ENOMEM) || (r == -EBADMSG)) {  in pn544_hci_i2c_irq_thread_fn()
511 		nfc_hci_recv_frame(phy->hdev, skb);  in pn544_hci_i2c_irq_thread_fn()
529 	strcpy(phy->firmware_name, firmware_name);  in pn544_hci_i2c_fw_download()
531 	phy->hw_variant = hw_variant;  in pn544_hci_i2c_fw_download()
532 	phy->fw_work_state = FW_WORK_STATE_START;  in pn544_hci_i2c_fw_download()
534 	schedule_work(&phy->fw_work);  in pn544_hci_i2c_fw_download()
546 	phy->fw_work_state = FW_WORK_STATE_IDLE;  in pn544_hci_i2c_fw_work_complete()
548 	if (phy->fw) {  in pn544_hci_i2c_fw_work_complete()
549 		release_firmware(phy->fw);  in pn544_hci_i2c_fw_work_complete()
550 		phy->fw = NULL;  in pn544_hci_i2c_fw_work_complete()
553 	nfc_fw_download_done(phy->hdev->ndev, phy->firmware_name, (u32) -result);  in pn544_hci_i2c_fw_work_complete()
570 	params_len = sizeof(framep->be_dest_addr) +  in pn544_hci_i2c_fw_write_cmd()
571 		     sizeof(framep->be_datalen) + datalen;  in pn544_hci_i2c_fw_write_cmd()
572 	framelen = params_len + sizeof(framep->cmd) +  in pn544_hci_i2c_fw_write_cmd()
573 			     sizeof(framep->be_length);  in pn544_hci_i2c_fw_write_cmd()
575 	framep->cmd = PN544_FW_CMD_WRITE;  in pn544_hci_i2c_fw_write_cmd()
577 	put_unaligned_be16(params_len, &framep->be_length);  in pn544_hci_i2c_fw_write_cmd()
579 	framep->be_dest_addr[0] = (dest_addr & 0xff0000) >> 16;  in pn544_hci_i2c_fw_write_cmd()
580 	framep->be_dest_addr[1] = (dest_addr & 0xff00) >> 8;  in pn544_hci_i2c_fw_write_cmd()
581 	framep->be_dest_addr[2] = dest_addr & 0xff;  in pn544_hci_i2c_fw_write_cmd()
583 	put_unaligned_be16(datalen, &framep->be_datalen);  in pn544_hci_i2c_fw_write_cmd()
585 	memcpy(framep->data, data, datalen);  in pn544_hci_i2c_fw_write_cmd()
594 		return -EIO;  in pn544_hci_i2c_fw_write_cmd()
633 		return -EIO;  in pn544_hci_i2c_fw_check_cmd()
640 	r = pn544_hci_i2c_fw_write_cmd(phy->i2c_dev,  in pn544_hci_i2c_fw_write_chunk()
641 				       phy->fw_blob_dest_addr + phy->fw_written,  in pn544_hci_i2c_fw_write_chunk()
642 				       phy->fw_blob_data + phy->fw_written,  in pn544_hci_i2c_fw_write_chunk()
643 				       phy->fw_blob_size - phy->fw_written);  in pn544_hci_i2c_fw_write_chunk()
647 	phy->fw_written += r;  in pn544_hci_i2c_fw_write_chunk()
648 	phy->fw_work_state = FW_WORK_STATE_WAIT_WRITE_ANSWER;  in pn544_hci_i2c_fw_write_chunk()
666 	chunk->cmd = PN544_FW_CMD_SECURE_CHUNK_WRITE;  in pn544_hci_i2c_fw_secure_write_frame_cmd()
668 	put_unaligned_be16(datalen, &chunk->be_datalen);  in pn544_hci_i2c_fw_secure_write_frame_cmd()
670 	memcpy(chunk->data, data, datalen);  in pn544_hci_i2c_fw_secure_write_frame_cmd()
672 	chunklen = sizeof(chunk->cmd) + sizeof(chunk->be_datalen) + datalen;  in pn544_hci_i2c_fw_secure_write_frame_cmd()
674 	r = i2c_master_send(phy->i2c_dev, buf, chunklen);  in pn544_hci_i2c_fw_secure_write_frame_cmd()
681 		return -EIO;  in pn544_hci_i2c_fw_secure_write_frame_cmd()
690 	framep = (struct pn544_i2c_fw_secure_frame *) phy->fw_blob_data;  in pn544_hci_i2c_fw_secure_write_frame()
691 	if (phy->fw_written == 0)  in pn544_hci_i2c_fw_secure_write_frame()
692 		phy->fw_blob_size = get_unaligned_be16(&framep->be_datalen)  in pn544_hci_i2c_fw_secure_write_frame()
696 	if (phy->fw_blob_size > PN544_FW_I2C_MAX_PAYLOAD &&  in pn544_hci_i2c_fw_secure_write_frame()
697 			framep->cmd != PN544_FW_CMD_SECURE_WRITE)  in pn544_hci_i2c_fw_secure_write_frame()
698 		return -EINVAL;  in pn544_hci_i2c_fw_secure_write_frame()
701 	if (phy->fw_blob_size < PN544_FW_I2C_MAX_PAYLOAD) {  in pn544_hci_i2c_fw_secure_write_frame()
702 		r = i2c_master_send(phy->i2c_dev,  in pn544_hci_i2c_fw_secure_write_frame()
703 			(const char *) phy->fw_blob_data, phy->fw_blob_size);  in pn544_hci_i2c_fw_secure_write_frame()
705 		if (r == phy->fw_blob_size)  in pn544_hci_i2c_fw_secure_write_frame()
710 			return -EIO;  in pn544_hci_i2c_fw_secure_write_frame()
714 				       phy->fw_blob_data + phy->fw_written,  in pn544_hci_i2c_fw_secure_write_frame()
715 				       phy->fw_blob_size - phy->fw_written);  in pn544_hci_i2c_fw_secure_write_frame()
720 	phy->fw_written += r;  in pn544_hci_i2c_fw_secure_write_frame()
721 	phy->fw_work_state = FW_WORK_STATE_WAIT_SECURE_WRITE_ANSWER;  in pn544_hci_i2c_fw_secure_write_frame()
724 	if (framep->cmd == PN544_FW_CMD_RESET) {  in pn544_hci_i2c_fw_secure_write_frame()
726 		phy->fw_cmd_result = 0;  in pn544_hci_i2c_fw_secure_write_frame()
727 		schedule_work(&phy->fw_work);  in pn544_hci_i2c_fw_secure_write_frame()
741 	switch (phy->fw_work_state) {  in pn544_hci_i2c_fw_work()
745 		r = request_firmware(&phy->fw, phy->firmware_name,  in pn544_hci_i2c_fw_work()
746 				     &phy->i2c_dev->dev);  in pn544_hci_i2c_fw_work()
750 		phy->fw_written = 0;  in pn544_hci_i2c_fw_work()
752 		switch (phy->hw_variant) {  in pn544_hci_i2c_fw_work()
754 			blob = (struct pn544_i2c_fw_blob *) phy->fw->data;  in pn544_hci_i2c_fw_work()
755 			phy->fw_blob_size = get_unaligned_be32(&blob->be_size);  in pn544_hci_i2c_fw_work()
756 			phy->fw_blob_dest_addr = get_unaligned_be32(  in pn544_hci_i2c_fw_work()
757 							&blob->be_destaddr);  in pn544_hci_i2c_fw_work()
758 			phy->fw_blob_data = blob->data;  in pn544_hci_i2c_fw_work()
764 								phy->fw->data;  in pn544_hci_i2c_fw_work()
765 			phy->fw_blob_data = secure_blob->data;  in pn544_hci_i2c_fw_work()
766 			phy->fw_size = phy->fw->size;  in pn544_hci_i2c_fw_work()
770 			r = -ENOTSUPP;  in pn544_hci_i2c_fw_work()
780 		r = phy->fw_cmd_result;  in pn544_hci_i2c_fw_work()
784 		if (phy->fw_written == phy->fw_blob_size) {  in pn544_hci_i2c_fw_work()
785 			r = pn544_hci_i2c_fw_check_cmd(phy->i2c_dev,  in pn544_hci_i2c_fw_work()
786 						       phy->fw_blob_dest_addr,  in pn544_hci_i2c_fw_work()
787 						       phy->fw_blob_data,  in pn544_hci_i2c_fw_work()
788 						       phy->fw_blob_size);  in pn544_hci_i2c_fw_work()
791 			phy->fw_work_state = FW_WORK_STATE_WAIT_CHECK_ANSWER;  in pn544_hci_i2c_fw_work()
803 		r = phy->fw_cmd_result;  in pn544_hci_i2c_fw_work()
807 		blob = (struct pn544_i2c_fw_blob *) (phy->fw_blob_data +  in pn544_hci_i2c_fw_work()
808 		       phy->fw_blob_size);  in pn544_hci_i2c_fw_work()
809 		phy->fw_blob_size = get_unaligned_be32(&blob->be_size);  in pn544_hci_i2c_fw_work()
810 		if (phy->fw_blob_size != 0) {  in pn544_hci_i2c_fw_work()
811 			phy->fw_blob_dest_addr =  in pn544_hci_i2c_fw_work()
812 					get_unaligned_be32(&blob->be_destaddr);  in pn544_hci_i2c_fw_work()
813 			phy->fw_blob_data = blob->data;  in pn544_hci_i2c_fw_work()
815 			phy->fw_written = 0;  in pn544_hci_i2c_fw_work()
820 		if (r < 0 || phy->fw_blob_size == 0)  in pn544_hci_i2c_fw_work()
825 		r = phy->fw_cmd_result;  in pn544_hci_i2c_fw_work()
834 		if (phy->fw_written == phy->fw_blob_size) {  in pn544_hci_i2c_fw_work()
836 				(phy->fw_blob_data + phy->fw_blob_size);  in pn544_hci_i2c_fw_work()
837 			phy->fw_size -= phy->fw_blob_size +  in pn544_hci_i2c_fw_work()
839 			if (phy->fw_size >= PN544_FW_SECURE_BLOB_HEADER_LEN  in pn544_hci_i2c_fw_work()
841 				phy->fw_blob_data = secure_blob->data;  in pn544_hci_i2c_fw_work()
843 				phy->fw_written = 0;  in pn544_hci_i2c_fw_work()
849 		if (r < 0 || phy->fw_size == 0)  in pn544_hci_i2c_fw_work()
862 	{ "enable-gpios", &enable_gpios, 1 },
863 	{ "firmware-gpios", &firmware_gpios, 1 },
869 	struct device *dev = &client->dev;  in pn544_hci_i2c_probe()
873 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {  in pn544_hci_i2c_probe()
874 		nfc_err(&client->dev, "Need I2C_FUNC_I2C\n");  in pn544_hci_i2c_probe()
875 		return -ENODEV;  in pn544_hci_i2c_probe()
878 	phy = devm_kzalloc(&client->dev, sizeof(struct pn544_i2c_phy),  in pn544_hci_i2c_probe()
881 		return -ENOMEM;  in pn544_hci_i2c_probe()
883 	INIT_WORK(&phy->fw_work, pn544_hci_i2c_fw_work);  in pn544_hci_i2c_probe()
884 	phy->fw_work_state = FW_WORK_STATE_IDLE;  in pn544_hci_i2c_probe()
886 	phy->i2c_dev = client;  in pn544_hci_i2c_probe()
894 	phy->gpiod_en = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);  in pn544_hci_i2c_probe()
895 	if (IS_ERR(phy->gpiod_en)) {  in pn544_hci_i2c_probe()
897 		return PTR_ERR(phy->gpiod_en);  in pn544_hci_i2c_probe()
900 	/* Get FW GPIO */  in pn544_hci_i2c_probe()
901 	phy->gpiod_fw = devm_gpiod_get(dev, "firmware", GPIOD_OUT_LOW);  in pn544_hci_i2c_probe()
902 	if (IS_ERR(phy->gpiod_fw)) {  in pn544_hci_i2c_probe()
903 		nfc_err(dev, "Unable to get FW GPIO\n");  in pn544_hci_i2c_probe()
904 		return PTR_ERR(phy->gpiod_fw);  in pn544_hci_i2c_probe()
909 	r = devm_request_threaded_irq(&client->dev, client->irq, NULL,  in pn544_hci_i2c_probe()
914 		nfc_err(&client->dev, "Unable to register IRQ handler\n");  in pn544_hci_i2c_probe()
921 			    pn544_hci_i2c_fw_download, &phy->hdev);  in pn544_hci_i2c_probe()
932 	cancel_work_sync(&phy->fw_work);  in pn544_hci_i2c_remove()
933 	if (phy->fw_work_state != FW_WORK_STATE_IDLE)  in pn544_hci_i2c_remove()
934 		pn544_hci_i2c_fw_work_complete(phy, -ENODEV);  in pn544_hci_i2c_remove()
936 	pn544_hci_remove(phy->hdev);  in pn544_hci_i2c_remove()
938 	if (phy->powered)  in pn544_hci_i2c_remove()
943 	{ .compatible = "nxp,pn544-i2c", },