Lines Matching +full:clear +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (c) 1998-2007 Texas Instruments Incorporated
70 * bits 0 - 15: Reserved.
71 * bits 16 - 23: Version ID - The WiLink version ID
73 * bits 24 - 31: Chip ID - The WiLink chip ID.
93 /* 0 - Always active*/
94 /* 1 - Power down mode: light / fast sleep*/
95 /* 2 - ELP mode: Deep / Max sleep*/
188 * Bit Definition
191 * 13 Copy RX Status - when set, write three receive status words
195 * 11 RX Complete upon FCS error - when set, give rx complete
198 * 10 SSID Filter Enable - When set, the WiLink discards all beacon,
202 * When clear, the WiLink receives frames with any SSID.
203 * 9 Broadcast Filter Enable - When set, the WiLink discards all
204 * broadcast frames. When clear, the WiLink receives all received
207 * 5 BSSID Filter Enable - When set, the WiLink discards any frames
210 * When clear, the WiLink receives frames from any BSSID.
211 * 4 MAC Addr Filter - When set, the WiLink discards any frames
214 * When clear, the WiLink receives frames destined to any MAC
216 * 3 Promiscuous - When set, the WiLink receives all valid frames
218 * When clear, only frames that pass the other filters specified
220 * 2 FCS - When set, the WiLink includes the FCS with the received
223 * 1 PLCP header - When set, write all data from baseband to frame
225 * 0 Reserved - Always equal to 0.
228 * Bit Definition
230 * 31:12 Reserved - Always equal to 0.
231 * 11 Association - When set, the WiLink receives all association
233 * request/response, and disassociation). When clear, these frames
235 * 10 Auth/De auth - When set, the WiLink receives all authentication
236 * and de-authentication frames. When clear, these frames are
238 * 9 Beacon - When set, the WiLink receives all beacon frames.
239 * When clear, these frames are discarded.
240 * 8 Contention Free - When set, the WiLink receives all contention
242 * When clear, these frames are discarded.
243 * 7 Control - When set, the WiLink receives all control frames.
244 * When clear, these frames are discarded.
245 * 6 Data - When set, the WiLink receives all data frames.
246 * When clear, these frames are discarded.
247 * 5 FCS Error - When set, the WiLink receives frames that have FCS
249 * When clear, these frames are discarded.
250 * 4 Management - When set, the WiLink receives all management
252 * When clear, these frames are discarded.
253 * 3 Probe Request - When set, the WiLink receives all probe request
255 * When clear, these frames are discarded.
256 * 2 Probe Response - When set, the WiLink receives all probe
258 * When clear, these frames are discarded.
259 * 1 RTS/CTS/ACK - When set, the WiLink receives all RTS, CTS and ACK
261 * When clear, these frames are discarded.
262 * 0 Rsvd Type/Sub Type - When set, the WiLink receives all frames
265 * When clear, these frames are discarded.
364 * traffic from the AP after a PS-poll has been
438 * bit set that the firmware buffers before
441 * without the unicast TIM bit set are dropped.
452 * 1 1 Treatment bit mask
458 * 1 1 Treatment bit mask
464 * Treatment bit mask - The information element handling:
465 * bit 0 - The information element is compared and transferred
467 * bit 1 - The information element is transferred to the host
480 #define BEACON_RULE_PASS_ON_CHANGE BIT(0)
481 #define BEACON_RULE_PASS_ON_APPEARANCE BIT(1)
514 * 0 -> PTA enabled
515 * 1 -> PTA disabled
516 * 2 -> sense no active mode, i.e.
519 * 3 -> PTA is switched on in response
560 * during protective mode, of which a new BT-HP request
582 /* range: 10-20000 default: 1500 */
586 /* range: 2000-65535 default: 8700 */
589 /* range: 0 - 15000 (Msec) default: 1000 */
592 /* range 400-10000(Usec) default: 3000 */
598 /* range: 0-50000(Usec) default: 1050 */
604 * Range: 100-50000(Usec) default:2550
608 /* 0 -> shared antenna */
612 * 0 -> TI legacy
613 * 1 -> Palau
619 * 0 -> no AFH
620 * 1 -> from dedicated GPIO
621 * 2 -> AFH on (from host)
653 /* range: 1-255 default: 5 */
656 /* range: 0-1 default: 1 */
659 /* range: 0 - 15 default: 4 */
665 * Allow PA_SD assertion/de-assertion
676 /* range: 0 - 20 default: 1 */
686 /* The RX Clear Channel Assessment threshold in the PHY */
718 #define CFG_RX_FCS BIT(2)
719 #define CFG_RX_ALL_GOOD BIT(3)
720 #define CFG_UNI_FILTER_EN BIT(4)
721 #define CFG_BSSID_FILTER_EN BIT(5)
722 #define CFG_MC_FILTER_EN BIT(6)
723 #define CFG_MC_ADDR0_EN BIT(7)
724 #define CFG_MC_ADDR1_EN BIT(8)
725 #define CFG_BC_REJECT_EN BIT(9)
726 #define CFG_SSID_FILTER_EN BIT(10)
727 #define CFG_RX_INT_FCS_ERROR BIT(11)
728 #define CFG_RX_INT_ENCRYPTED BIT(12)
729 #define CFG_RX_WR_RX_STATUS BIT(13)
730 #define CFG_RX_FILTER_NULTI BIT(14)
731 #define CFG_RX_RESERVE BIT(15)
732 #define CFG_RX_TIMESTAMP_TSF BIT(16)
734 #define CFG_RX_RSV_EN BIT(0)
735 #define CFG_RX_RCTS_ACK BIT(1)
736 #define CFG_RX_PRSP_EN BIT(2)
737 #define CFG_RX_PREQ_EN BIT(3)
738 #define CFG_RX_MGMT_EN BIT(4)
739 #define CFG_RX_FCS_ERROR BIT(5)
740 #define CFG_RX_DATA_EN BIT(6)
741 #define CFG_RX_CTL_EN BIT(7)
742 #define CFG_RX_CF_EN BIT(8)
743 #define CFG_RX_BCN_EN BIT(9)
744 #define CFG_RX_AUTH_EN BIT(10)
745 #define CFG_RX_ASSOC_EN BIT(11)
747 #define SCAN_PASSIVE BIT(0)
748 #define SCAN_5GHZ_BAND BIT(1)
749 #define SCAN_TRIGGERED BIT(2)
750 #define SCAN_PRIORITY_HIGH BIT(3)
812 u8 wake_up_event; /* Only one bit can be set */
969 /* the amount of wake on host-access times */
972 /* the amount of wake on timer-expire */
975 /* the number of packets that were transmitted with PS bit set */
978 /* the number of packets that were transmitted with PS bit clear */
1005 * cont_miss_bcns_spread[0] - single missed beacon.
1006 * cont_miss_bcns_spread[1] - two continuous missed beacons.
1007 * cont_miss_bcns_spread[2] - three continuous missed beacons.
1009 * cont_miss_bcns_spread[9] - ten and more continuous missed beacons.
1189 * For BSS: Number of TBTTs in a DTIM period (range: 1-10)
1214 * resumes. Range 0 - 255.
1226 u8 version; /* The IP version: 4 - IPv4, 6 - IPv6.*/
1227 u8 enable; /* 1 - ARP filtering is enabled, 0 - disabled */
1239 * Access Category - The TX queue's access category
1295 /* tx queue id number (0-7) */
1301 /* EDCA: ac index (0-3), HCCA: traffic stream id (8-15) */
1318 Host Interrupt Register (WiLink -> Host)
1323 #define WL1251_ACX_INTR_RX0_DATA BIT(0)
1326 #define WL1251_ACX_INTR_TX_RESULT BIT(1)
1329 #define WL1251_ACX_INTR_TX_XFR BIT(2)
1332 #define WL1251_ACX_INTR_RX1_DATA BIT(3)
1335 #define WL1251_ACX_INTR_EVENT_A BIT(4)
1338 #define WL1251_ACX_INTR_EVENT_B BIT(5)
1341 #define WL1251_ACX_INTR_WAKE_ON_HOST BIT(6)
1344 #define WL1251_ACX_INTR_TRACE_A BIT(7)
1347 #define WL1251_ACX_INTR_TRACE_B BIT(8)
1350 #define WL1251_ACX_INTR_CMD_COMPLETE BIT(9)
1353 #define WL1251_ACX_INTR_INIT_COMPLETE BIT(14)