Lines Matching +full:24 +full:- +full:9
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
28 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_rate_mode()
41 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_ht_mcs()
49 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_mcs()
62 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_nss()
69 #define RTW89_TXWD_BODY0_WP_OFFSET GENMASK(31, 24)
70 #define RTW89_TXWD_BODY0_WP_OFFSET_V1 GENMASK(28, 24)
88 #define RTW89_TXWD_BODY2_MACID GENMASK(30, 24)
99 #define RTW89_TXWD_BODY4_SEC_IV_L1 GENMASK(31, 24)
103 #define RTW89_TXWD_BODY5_SEC_IV_H5 GENMASK(31, 24)
114 #define RTW89_TXWD_BODY7_DATA_RATE GENMASK(24, 16)
120 #define RTW89_TXWD_INFO0_DATA_RATE GENMASK(24, 16)
129 #define RTW89_TXWD_INFO1_DATA_RTY_LOWEST_RATE GENMASK(24, 16)
135 #define RTW89_TXWD_INFO2_SEC_TYPE GENMASK(12, 9)
155 #define BE_TXD_BODY0_WP_INT BIT(9)
163 #define BE_TXD_BODY0_WP_OFFSET_V1 GENMASK(27, 24)
175 #define BE_TXD_BODY1_REUSE_START_OFFSET GENMASK(25, 24)
185 #define BE_TXD_BODY2_MACID GENMASK(31, 24)
203 #define BE_TXD_BODY4_SEC_IV_L1 GENMASK(31, 24)
209 #define BE_TXD_BODY5_SEC_IV_H5 GENMASK(31, 24)
213 #define BE_TXD_BODY6_RU_TC GENMASK(9, 5)
221 #define BE_TXD_BODY6_RU_POS GENMASK(31, 24)
225 #define BE_TXD_BODY7_MSDU_NUM GENMASK(9, 6)
237 #define BE_TXD_INFO0_DISRTSFB BIT(9)
249 #define BE_TXD_INFO1_BCN_SRCH_SEQ GENMASK(9, 8)
272 #define BE_TXD_INFO3_RTT_EN BIT(9)
313 #define BE_TXD_INFO7_UL_APEP_UNIT GENMASK(10, 9)
320 #define BE_TXD_INFO7_USE_WD_UL GENMASK(25, 24)
329 #define AX_RXD_RPKT_TYPE_MASK GENMASK(27, 24)
339 #define AX_RXD_RX_DATARATE_MASK GENMASK(24, 16)
361 #define AX_RXD_CRC32_ERR BIT(9)
369 #define AX_RXD_CHKSUM_OFFLOAD_EN BIT(24)
392 #define AX_RXD_RX_PL_ID_MASK GENMASK(27, 24)
447 #define RTW89_PHY_STS_HDR_W0_RSSI_AVG GENMASK(31, 24)
451 #define RTW89_PHY_STS_HDR_W1_RSSI_D GENMASK(31, 24)
473 #define BE_RXD_RPKT_TYPE_MASK GENMASK(29, 24)
480 #define BE_RXD_BCN_FW_INFO_MASK GENMASK(25, 24)
500 #define BE_RXD_SW_DEC BIT(9)
515 #define BE_RXD_FRAG_MASK GENMASK(27, 24)
537 #define BE_RXD_SEC_CAM_IDX_MASK GENMASK(31, 24)
552 #define BE_RXD_WITH_LLC BIT(24)
584 #define RTW89_PHY_STS_IE00_V2_W4_RPL_TD_B GENMASK(17, 9)
637 RTW89_TXCH_CH9 = 9, /* HI Band 0 */
644 RTW89_TXCH_MAX = RTW89_TXCH_NUM - 1
653 RTW89_RXCH_MAX = RTW89_RXCH_NUM - 1