Lines Matching full:path
153 u8 path; in _wait_rx_mode() local
157 for (path = 0; path < RF_PATH_MAX; path++) { in _wait_rx_mode()
158 if (!(kpath & BIT(path))) in _wait_rx_mode()
162 2, 5000, false, rtwdev, path, 0x00, in _wait_rx_mode()
166 path, ret); in _wait_rx_mode()
304 enum rtw89_rf_path path, u8 index) in _dack_reload_by_path() argument
312 path_offset = (path == RF_PATH_A ? 0 : 0x28); in _dack_reload_by_path()
320 val32 |= dack->msbk_d[path][index][i + 12] << (i * 8); in _dack_reload_by_path()
329 val32 |= dack->msbk_d[path][index][i + 8] << (i * 8); in _dack_reload_by_path()
338 val32 |= dack->msbk_d[path][index][i + 4] << (i * 8); in _dack_reload_by_path()
347 val32 |= dack->msbk_d[path][index][i] << (i * 8); in _dack_reload_by_path()
354 val32 = (dack->biask_d[path][index] << 22) | in _dack_reload_by_path()
355 (dack->dadck_d[path][index] << 14); in _dack_reload_by_path()
361 static void _dack_reload(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dack_reload() argument
366 _dack_reload_by_path(rtwdev, path, i); in _dack_reload()
407 static void _dack_reset(struct rtw89_dev *rtwdev, u8 path) in _dack_reset() argument
409 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _dack_reset()
443 static void rtw8852c_txck_force(struct rtw89_dev *rtwdev, u8 path, bool force, in rtw8852c_txck_force() argument
446 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_ON, 0x0); in rtw8852c_txck_force()
451 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_VAL, ck); in rtw8852c_txck_force()
452 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_ON, 0x1); in rtw8852c_txck_force()
455 static void rtw8852c_rxck_force(struct rtw89_dev *rtwdev, u8 path, bool force, in rtw8852c_rxck_force() argument
460 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x0); in rtw8852c_rxck_force()
465 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_VAL, ck); in rtw8852c_rxck_force()
466 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x1); in rtw8852c_rxck_force()
481 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_CTL, def->ctl); in rtw8852c_rxck_force()
482 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_EN, def->en); in rtw8852c_rxck_force()
483 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, def->bw0); in rtw8852c_rxck_force()
484 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, def->bw1); in rtw8852c_rxck_force()
485 rtw89_phy_write32_mask(rtwdev, R_DRCK | (path << 8), B_DRCK_MUL, def->mul); in rtw8852c_rxck_force()
486 rtw89_phy_write32_mask(rtwdev, R_ADCMOD | (path << 8), B_ADCMOD_LP, def->lp); in rtw8852c_rxck_force()
648 static void rtw8852c_disable_rxagc(struct rtw89_dev *rtwdev, u8 path, u8 en_rxgac) in rtw8852c_disable_rxagc() argument
650 if (path == RF_PATH_A) in rtw8852c_disable_rxagc()
656 static void _iqk_rxk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_rxk_setting() argument
660 if (path == RF_PATH_A) in _iqk_rxk_setting()
665 switch (iqk_info->iqk_bw[path]) { in _iqk_rxk_setting()
668 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_DPD_GDIS, 0x1); in _iqk_rxk_setting()
669 rtw8852c_rxck_force(rtwdev, path, true, ADC_480M); in _iqk_rxk_setting()
670 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_ACK_VAL, 0x0); in _iqk_rxk_setting()
671 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1); in _iqk_rxk_setting()
672 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x1); in _iqk_rxk_setting()
675 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_DPD_GDIS, 0x1); in _iqk_rxk_setting()
676 rtw8852c_rxck_force(rtwdev, path, true, ADC_960M); in _iqk_rxk_setting()
677 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_ACK_VAL, 0x1); in _iqk_rxk_setting()
678 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1); in _iqk_rxk_setting()
679 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x1); in _iqk_rxk_setting()
682 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_DPD_GDIS, 0x1); in _iqk_rxk_setting()
683 rtw8852c_rxck_force(rtwdev, path, true, ADC_1920M); in _iqk_rxk_setting()
684 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_ACK_VAL, 0x2); in _iqk_rxk_setting()
685 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1); in _iqk_rxk_setting()
686 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x1); in _iqk_rxk_setting()
694 if (path == RF_PATH_A) in _iqk_rxk_setting()
700 static bool _iqk_check_cal(struct rtw89_dev *rtwdev, u8 path, u8 ktype) in _iqk_check_cal() argument
712 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, ret=%d\n", path, ret); in _iqk_check_cal()
715 "[IQK]S%x, type= %x, 0x8008 = 0x%x\n", path, ktype, tmp); in _iqk_check_cal()
721 enum rtw89_phy_idx phy_idx, u8 path, u8 ktype) in _iqk_one_shot() argument
724 u32 addr_rfc_ctl = R_UPD_CLK + (path << 13); in _iqk_one_shot()
730 iqk_cmd = 0x008 | (1 << (4 + path)) | (path << 1); in _iqk_one_shot()
734 iqk_cmd = 0x008 | (1 << (4 + path)); in _iqk_one_shot()
738 iqk_cmd = 0x108 | (1 << (4 + path)); in _iqk_one_shot()
742 iqk_cmd = 0x508 | (1 << (4 + path)); in _iqk_one_shot()
746 iqk_cmd = 0x208 | (1 << (4 + path)); in _iqk_one_shot()
750 iqk_cmd = 0x308 | (1 << (4 + path)); in _iqk_one_shot()
754 iqk_cmd = 0x008 | (1 << (4 + path)) | ((0x8 + iqk_info->iqk_bw[path]) << 8); in _iqk_one_shot()
757 iqk_cmd = 0x508 | (1 << (4 + path)) | (path << 1); in _iqk_one_shot()
761 iqk_cmd = 0x008 | (1 << (4 + path)) | ((0xc + iqk_info->iqk_bw[path]) << 8); in _iqk_one_shot()
765 iqk_cmd = 0x408 | (1 << (4 + path)); in _iqk_one_shot()
769 iqk_cmd = 0x608 | (1 << (4 + path)); in _iqk_one_shot()
777 fail = _iqk_check_cal(rtwdev, path, ktype); in _iqk_one_shot()
784 enum rtw89_phy_idx phy_idx, u8 path) in _rxk_group_sel() argument
792 bkrf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_NBW); in _rxk_group_sel()
793 if (path == RF_PATH_B) { in _rxk_group_sel()
801 switch (iqk_info->iqk_band[path]) { in _rxk_group_sel()
804 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _rxk_group_sel()
805 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _rxk_group_sel()
806 rtw89_write_rf(rtwdev, path, RR_RXG, RR_RXG_IQKMOD, 0x9); in _rxk_group_sel()
809 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _rxk_group_sel()
810 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _rxk_group_sel()
811 rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x8); in _rxk_group_sel()
814 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _rxk_group_sel()
815 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _rxk_group_sel()
816 rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x9); in _rxk_group_sel()
823 switch (iqk_info->iqk_band[path]) { in _rxk_group_sel()
826 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, in _rxk_group_sel()
828 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_VOBUF, in _rxk_group_sel()
832 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, in _rxk_group_sel()
834 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT, in _rxk_group_sel()
838 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, in _rxk_group_sel()
840 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT, in _rxk_group_sel()
844 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _rxk_group_sel()
846 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _rxk_group_sel()
848 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _rxk_group_sel()
850 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); in _rxk_group_sel()
853 if (path == RF_PATH_B) in _rxk_group_sel()
854 rtw89_write_rf(rtwdev, path, RR_IQKPLL, RR_IQKPLL_MOD, 0x0); in _rxk_group_sel()
855 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, bkrf0); in _rxk_group_sel()
858 iqk_info->nb_rxcfir[path] = 0x40000002; in _rxk_group_sel()
859 iqk_info->is_wb_rxiqk[path] = false; in _rxk_group_sel()
861 iqk_info->nb_rxcfir[path] = 0x40000000; in _rxk_group_sel()
862 iqk_info->is_wb_rxiqk[path] = true; in _rxk_group_sel()
869 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_nbrxk() argument
877 bkrf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_NBW); in _iqk_nbrxk()
878 if (path == RF_PATH_B) { in _iqk_nbrxk()
886 switch (iqk_info->iqk_band[path]) { in _iqk_nbrxk()
889 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _iqk_nbrxk()
890 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _iqk_nbrxk()
891 rtw89_write_rf(rtwdev, path, RR_RXG, RR_RXG_IQKMOD, 0x9); in _iqk_nbrxk()
894 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _iqk_nbrxk()
895 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _iqk_nbrxk()
896 rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x8); in _iqk_nbrxk()
899 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _iqk_nbrxk()
900 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _iqk_nbrxk()
901 rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x9); in _iqk_nbrxk()
907 switch (iqk_info->iqk_band[path]) { in _iqk_nbrxk()
910 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, _rxk_g_idxrxgain[gp]); in _iqk_nbrxk()
911 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_VOBUF, _rxk_g_idxattc2[gp]); in _iqk_nbrxk()
914 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, _rxk_a_idxrxgain[gp]); in _iqk_nbrxk()
915 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT, _rxk_a_idxattc2[gp]); in _iqk_nbrxk()
918 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, _rxk_a6_idxrxgain[gp]); in _iqk_nbrxk()
919 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT, _rxk_a6_idxattc2[gp]); in _iqk_nbrxk()
923 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL, 0x1); in _iqk_nbrxk()
924 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SET, 0x0); in _iqk_nbrxk()
925 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP_V1, gp); in _iqk_nbrxk()
926 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); in _iqk_nbrxk()
928 if (path == RF_PATH_B) in _iqk_nbrxk()
929 rtw89_write_rf(rtwdev, path, RR_IQKPLL, RR_IQKPLL_MOD, 0x0); in _iqk_nbrxk()
931 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, bkrf0); in _iqk_nbrxk()
934 iqk_info->nb_rxcfir[path] = in _iqk_nbrxk()
935 rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), in _iqk_nbrxk()
938 iqk_info->nb_rxcfir[path] = 0x40000002; in _iqk_nbrxk()
940 iqk_info->is_wb_rxiqk[path] = false; in _iqk_nbrxk()
945 enum rtw89_phy_idx phy_idx, u8 path) in _txk_group_sel() argument
952 switch (iqk_info->iqk_band[path]) { in _txk_group_sel()
954 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, in _txk_group_sel()
956 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, in _txk_group_sel()
958 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, in _txk_group_sel()
961 R_KIP_IQP + (path << 8), in _txk_group_sel()
965 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, in _txk_group_sel()
967 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, in _txk_group_sel()
969 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, in _txk_group_sel()
972 R_KIP_IQP + (path << 8), in _txk_group_sel()
976 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, in _txk_group_sel()
978 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, in _txk_group_sel()
980 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, in _txk_group_sel()
983 R_KIP_IQP + (path << 8), in _txk_group_sel()
989 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _txk_group_sel()
991 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _txk_group_sel()
993 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _txk_group_sel()
995 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _txk_group_sel()
999 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_TXK); in _txk_group_sel()
1003 iqk_info->nb_txcfir[path] = 0x40000002; in _txk_group_sel()
1004 iqk_info->is_wb_txiqk[path] = false; in _txk_group_sel()
1006 iqk_info->nb_txcfir[path] = 0x40000000; in _txk_group_sel()
1007 iqk_info->is_wb_txiqk[path] = true; in _txk_group_sel()
1014 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_nbtxk() argument
1020 switch (iqk_info->iqk_band[path]) { in _iqk_nbtxk()
1022 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, _txk_g_power_range[gp]); in _iqk_nbtxk()
1023 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, _txk_g_track_range[gp]); in _iqk_nbtxk()
1024 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, _txk_g_gain_bb[gp]); in _iqk_nbtxk()
1025 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_nbtxk()
1029 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, _txk_a_power_range[gp]); in _iqk_nbtxk()
1030 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, _txk_a_track_range[gp]); in _iqk_nbtxk()
1031 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, _txk_a_gain_bb[gp]); in _iqk_nbtxk()
1032 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_nbtxk()
1036 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, _txk_a6_power_range[gp]); in _iqk_nbtxk()
1037 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, _txk_a6_track_range[gp]); in _iqk_nbtxk()
1038 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, _txk_a6_gain_bb[gp]); in _iqk_nbtxk()
1039 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_nbtxk()
1046 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL, 0x1); in _iqk_nbtxk()
1047 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SET, 0x1); in _iqk_nbtxk()
1048 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G2, 0x0); in _iqk_nbtxk()
1049 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP, gp + 1); in _iqk_nbtxk()
1052 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); in _iqk_nbtxk()
1055 iqk_info->nb_txcfir[path] = in _iqk_nbtxk()
1056 rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), in _iqk_nbtxk()
1059 iqk_info->nb_txcfir[path] = 0x40000002; in _iqk_nbtxk()
1061 iqk_info->is_wb_txiqk[path] = false; in _iqk_nbtxk()
1066 static bool _lok_finetune_check(struct rtw89_dev *rtwdev, u8 path) in _lok_finetune_check() argument
1079 val = rtw89_read_rf(rtwdev, path, RR_TXMO, RFREG_MASK); in _lok_finetune_check()
1088 iqk_info->lok_idac[idx][path] = val; in _lok_finetune_check()
1090 val = rtw89_read_rf(rtwdev, path, RR_LOKVB, RFREG_MASK); in _lok_finetune_check()
1099 iqk_info->lok_vbuf[idx][path] = val; in _lok_finetune_check()
1105 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_lok() argument
1116 switch (iqk_info->iqk_band[path]) { in _iqk_lok()
1118 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1119 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1124 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1125 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1130 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1131 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1138 tmp = _iqk_one_shot(rtwdev, phy_idx, path, tmp_id); in _iqk_lok()
1139 iqk_info->lok_cor_fail[0][path] = tmp; in _iqk_lok()
1142 switch (iqk_info->iqk_band[path]) { in _iqk_lok()
1144 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1145 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1149 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1150 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1154 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1155 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1161 tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_VBUFFER); in _iqk_lok()
1164 switch (iqk_info->iqk_band[path]) { in _iqk_lok()
1166 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1167 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1172 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1173 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1178 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1179 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1186 tmp = _iqk_one_shot(rtwdev, phy_idx, path, tmp_id); in _iqk_lok()
1187 iqk_info->lok_fin_fail[0][path] = tmp; in _iqk_lok()
1190 switch (iqk_info->iqk_band[path]) { in _iqk_lok()
1193 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1194 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1198 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1199 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1203 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1204 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1208 tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_VBUFFER); in _iqk_lok()
1209 fail = _lok_finetune_check(rtwdev, path); in _iqk_lok()
1214 static void _iqk_txk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_txk_setting() argument
1218 switch (iqk_info->iqk_band[path]) { in _iqk_txk_setting()
1221 rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT2, 0x0); in _iqk_txk_setting()
1222 rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT1, 0x0); in _iqk_txk_setting()
1223 rtw89_write_rf(rtwdev, path, RR_TXG2, RR_TXG2_ATT0, 0x1); in _iqk_txk_setting()
1224 rtw89_write_rf(rtwdev, path, RR_TXA2, RR_TXA2_LDO, 0xf); in _iqk_txk_setting()
1225 rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0); in _iqk_txk_setting()
1226 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); in _iqk_txk_setting()
1227 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _iqk_txk_setting()
1230 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); in _iqk_txk_setting()
1231 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x6); in _iqk_txk_setting()
1234 rtw89_write_rf(rtwdev, path, RR_TXATANK, RR_TXATANK_LBSW2, 0x0); in _iqk_txk_setting()
1235 rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXAS, 0x1); in _iqk_txk_setting()
1236 rtw89_write_rf(rtwdev, path, RR_TXA2, RR_TXA2_LDO, 0xf); in _iqk_txk_setting()
1237 rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0); in _iqk_txk_setting()
1238 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); in _iqk_txk_setting()
1239 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _iqk_txk_setting()
1242 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); in _iqk_txk_setting()
1243 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x6); in _iqk_txk_setting()
1246 rtw89_write_rf(rtwdev, path, RR_TXATANK, RR_TXATANK_LBSW2, 0x0); in _iqk_txk_setting()
1247 rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXAS, 0x1); in _iqk_txk_setting()
1248 rtw89_write_rf(rtwdev, path, RR_TXA2, RR_TXA2_LDO, 0xf); in _iqk_txk_setting()
1249 rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0); in _iqk_txk_setting()
1250 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); in _iqk_txk_setting()
1251 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _iqk_txk_setting()
1254 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); in _iqk_txk_setting()
1255 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x6); in _iqk_txk_setting()
1261 u8 path) in _iqk_info_iqk() argument
1267 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_thermal = %lu\n", path, in _iqk_info_iqk()
1268 ewma_thermal_read(&rtwdev->phystat.avg_thermal[path])); in _iqk_info_iqk()
1269 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_COR_fail= %d\n", path, in _iqk_info_iqk()
1270 iqk_info->lok_cor_fail[0][path]); in _iqk_info_iqk()
1271 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_FIN_fail= %d\n", path, in _iqk_info_iqk()
1272 iqk_info->lok_fin_fail[0][path]); in _iqk_info_iqk()
1273 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_TXIQK_fail = %d\n", path, in _iqk_info_iqk()
1274 iqk_info->iqk_tx_fail[0][path]); in _iqk_info_iqk()
1275 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_RXIQK_fail= %d,\n", path, in _iqk_info_iqk()
1276 iqk_info->iqk_rx_fail[0][path]); in _iqk_info_iqk()
1278 flag = iqk_info->lok_cor_fail[0][path]; in _iqk_info_iqk()
1279 rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FCOR << (path * 4), flag); in _iqk_info_iqk()
1280 flag = iqk_info->lok_fin_fail[0][path]; in _iqk_info_iqk()
1281 rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FFIN << (path * 4), flag); in _iqk_info_iqk()
1282 flag = iqk_info->iqk_tx_fail[0][path]; in _iqk_info_iqk()
1283 rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FTX << (path * 4), flag); in _iqk_info_iqk()
1284 flag = iqk_info->iqk_rx_fail[0][path]; in _iqk_info_iqk()
1285 rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_F_RX << (path * 4), flag); in _iqk_info_iqk()
1287 tmp = rtw89_phy_read32_mask(rtwdev, R_IQK_RES + (path << 8), MASKDWORD); in _iqk_info_iqk()
1288 iqk_info->bp_iqkenable[path] = tmp; in _iqk_info_iqk()
1289 tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD); in _iqk_info_iqk()
1290 iqk_info->bp_txkresult[path] = tmp; in _iqk_info_iqk()
1291 tmp = rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD); in _iqk_info_iqk()
1292 iqk_info->bp_rxkresult[path] = tmp; in _iqk_info_iqk()
1297 tmp = rtw89_phy_read32_mask(rtwdev, R_IQKINF, B_IQKINF_FAIL << (path * 4)); in _iqk_info_iqk()
1300 rtw89_phy_write32_mask(rtwdev, R_IQKINF2, B_IQKINF2_FCNT << (path * 4), in _iqk_info_iqk()
1304 static void _iqk_by_path(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) in _iqk_by_path() argument
1308 _iqk_txk_setting(rtwdev, path); in _iqk_by_path()
1309 iqk_info->lok_fail[path] = _iqk_lok(rtwdev, phy_idx, path); in _iqk_by_path()
1312 iqk_info->iqk_tx_fail[0][path] = _iqk_nbtxk(rtwdev, phy_idx, path); in _iqk_by_path()
1314 iqk_info->iqk_tx_fail[0][path] = _txk_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1316 _iqk_rxk_setting(rtwdev, path); in _iqk_by_path()
1318 iqk_info->iqk_rx_fail[0][path] = _iqk_nbrxk(rtwdev, phy_idx, path); in _iqk_by_path()
1320 iqk_info->iqk_rx_fail[0][path] = _rxk_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1322 _iqk_info_iqk(rtwdev, phy_idx, path); in _iqk_by_path()
1326 enum rtw89_phy_idx phy, u8 path, in _iqk_get_ch_info() argument
1334 iqk_info->iqk_band[path] = chan->band_type; in _iqk_get_ch_info()
1335 iqk_info->iqk_bw[path] = chan->band_width; in _iqk_get_ch_info()
1336 iqk_info->iqk_ch[path] = chan->channel; in _iqk_get_ch_info()
1339 "[IQK]iqk_info->iqk_band[%x] = 0x%x\n", path, in _iqk_get_ch_info()
1340 iqk_info->iqk_band[path]); in _iqk_get_ch_info()
1342 path, iqk_info->iqk_bw[path]); in _iqk_get_ch_info()
1344 path, iqk_info->iqk_ch[path]); in _iqk_get_ch_info()
1346 "[IQK]S%d (PHY%d): / DBCC %s/ %s/ CH%d/ %s\n", path, phy, in _iqk_get_ch_info()
1348 iqk_info->iqk_band[path] == 0 ? "2G" : in _iqk_get_ch_info()
1349 iqk_info->iqk_band[path] == 1 ? "5G" : "6G", in _iqk_get_ch_info()
1350 iqk_info->iqk_ch[path], in _iqk_get_ch_info()
1351 iqk_info->iqk_bw[path] == 0 ? "20M" : in _iqk_get_ch_info()
1352 iqk_info->iqk_bw[path] == 1 ? "40M" : "80M"); in _iqk_get_ch_info()
1359 rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_BAND << (path * 16), in _iqk_get_ch_info()
1360 iqk_info->iqk_band[path]); in _iqk_get_ch_info()
1361 rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_BW << (path * 16), in _iqk_get_ch_info()
1362 iqk_info->iqk_bw[path]); in _iqk_get_ch_info()
1363 rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_CH << (path * 16), in _iqk_get_ch_info()
1364 iqk_info->iqk_ch[path]); in _iqk_get_ch_info()
1370 u8 path) in _iqk_start_iqk() argument
1372 _iqk_by_path(rtwdev, phy_idx, path); in _iqk_start_iqk()
1375 static void _iqk_restore(struct rtw89_dev *rtwdev, u8 path) in _iqk_restore() argument
1380 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD, in _iqk_restore()
1381 iqk_info->nb_txcfir[path]); in _iqk_restore()
1382 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, in _iqk_restore()
1383 iqk_info->nb_rxcfir[path]); in _iqk_restore()
1385 0x00001219 + (path << 4)); in _iqk_restore()
1387 fail = _iqk_check_cal(rtwdev, path, 0x12); in _iqk_restore()
1394 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x0); in _iqk_restore()
1395 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); in _iqk_restore()
1396 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); in _iqk_restore()
1400 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_afebb_restore() argument
1402 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _iqk_afebb_restore()
1406 rtw8852c_disable_rxagc(rtwdev, path, 0x1); in _iqk_afebb_restore()
1409 static void _iqk_preset(struct rtw89_dev *rtwdev, u8 path) in _iqk_preset() argument
1415 rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_IQC, idx); in _iqk_preset()
1416 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3, idx); in _iqk_preset()
1417 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _iqk_preset()
1423 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_macbb_setting() argument
1428 rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x0); in _iqk_macbb_setting()
1429 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x1); in _iqk_macbb_setting()
1430 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x0); in _iqk_macbb_setting()
1431 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x1); in _iqk_macbb_setting()
1432 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x0); in _iqk_macbb_setting()
1435 rtw8852c_disable_rxagc(rtwdev, path, 0x0); in _iqk_macbb_setting()
1436 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), MASKDWORD, 0xf801fffd); in _iqk_macbb_setting()
1437 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_DPD_DIS, 0x1); in _iqk_macbb_setting()
1438 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_DAC_VAL, 0x1); in _iqk_macbb_setting()
1440 rtw8852c_txck_force(rtwdev, path, true, DAC_960M); in _iqk_macbb_setting()
1441 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_DPD_GDIS, 0x1); in _iqk_macbb_setting()
1443 rtw8852c_rxck_force(rtwdev, path, true, ADC_1920M); in _iqk_macbb_setting()
1444 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_ACK_VAL, 0x2); in _iqk_macbb_setting()
1446 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW | (path << 13), B_P0_NRBW_DBG, 0x1); in _iqk_macbb_setting()
1451 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x1); in _iqk_macbb_setting()
1452 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x1); in _iqk_macbb_setting()
1455 static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _rck() argument
1461 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] ====== S%d RCK ======\n", path); in _rck()
1463 rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); in _rck()
1465 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rck()
1466 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); in _rck()
1469 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); in _rck()
1472 rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, 0x00240); in _rck()
1475 false, rtwdev, path, 0x1c, BIT(3)); in _rck()
1479 rck_val = rtw89_read_rf(rtwdev, path, RR_RCKC, RR_RCKC_CA); in _rck()
1480 rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, rck_val); in _rck()
1482 rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); in _rck()
1486 rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK), in _rck()
1487 rtw89_read_rf(rtwdev, path, RR_RCKS, RFREG_MASK)); in _rck()
1493 u8 ch, path; in _iqk_init() local
1510 for (path = 0; path < RTW8852C_IQK_SS; path++) { in _iqk_init()
1511 iqk_info->lok_cor_fail[ch][path] = false; in _iqk_init()
1512 iqk_info->lok_fin_fail[ch][path] = false; in _iqk_init()
1513 iqk_info->iqk_tx_fail[ch][path] = false; in _iqk_init()
1514 iqk_info->iqk_rx_fail[ch][path] = false; in _iqk_init()
1515 iqk_info->iqk_mcc_ch[ch][path] = 0x0; in _iqk_init()
1516 iqk_info->iqk_table_idx[path] = 0x0; in _iqk_init()
1522 enum rtw89_phy_idx phy_idx, u8 path, in _doiqk() argument
1538 _iqk_get_ch_info(rtwdev, phy_idx, path, chanctx_idx); in _doiqk()
1540 _rfk_backup_rf_reg(rtwdev, backup_rf_val[path], path); in _doiqk()
1541 _iqk_macbb_setting(rtwdev, phy_idx, path); in _doiqk()
1542 _iqk_preset(rtwdev, path); in _doiqk()
1543 _iqk_start_iqk(rtwdev, phy_idx, path); in _doiqk()
1544 _iqk_restore(rtwdev, path); in _doiqk()
1545 _iqk_afebb_restore(rtwdev, phy_idx, path); in _doiqk()
1547 _rfk_restore_rf_reg(rtwdev, backup_rf_val[path], path); in _doiqk()
1570 static void _rx_dck_value_rewrite(struct rtw89_dev *rtwdev, u8 path, u8 addr, in _rx_dck_value_rewrite() argument
1582 rtw89_write_rf(rtwdev, path, RR_LUTPLL, RR_CAL_RW, 0x1); in _rx_dck_value_rewrite()
1583 rtw89_write_rf(rtwdev, path, RR_RFC, RR_WCAL, 0x1); in _rx_dck_value_rewrite()
1584 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_FINE, 0x1); in _rx_dck_value_rewrite()
1585 rtw89_write_rf(rtwdev, path, RR_LUTWA, MASKBYTE0, addr); in _rx_dck_value_rewrite()
1586 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, ofst_val); in _rx_dck_value_rewrite()
1587 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, ofst_val); in _rx_dck_value_rewrite()
1588 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_FINE, 0x0); in _rx_dck_value_rewrite()
1589 rtw89_write_rf(rtwdev, path, RR_RFC, RR_WCAL, 0x0); in _rx_dck_value_rewrite()
1590 rtw89_write_rf(rtwdev, path, RR_LUTPLL, RR_CAL_RW, 0x0); in _rx_dck_value_rewrite()
1597 static bool _rx_dck_rek_check(struct rtw89_dev *rtwdev, u8 path) in _rx_dck_rek_check() argument
1607 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr_bs[i]); in _rx_dck_rek_check()
1608 i_even_bs = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_rek_check()
1609 q_even_bs = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_rek_check()
1614 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr[i]); in _rx_dck_rek_check()
1615 i_even = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_rek_check()
1616 q_even = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_rek_check()
1624 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr_bs[i] + 1); in _rx_dck_rek_check()
1625 i_odd_bs = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_rek_check()
1626 q_odd_bs = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_rek_check()
1631 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr[i] + 1); in _rx_dck_rek_check()
1632 i_odd = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_rek_check()
1633 q_odd = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_rek_check()
1645 static void _rx_dck_fix_if_need(struct rtw89_dev *rtwdev, u8 path, u8 addr, in _rx_dck_fix_if_need() argument
1667 _rx_dck_value_rewrite(rtwdev, path, addr, val_i, val_q); in _rx_dck_fix_if_need()
1670 static void _rx_dck_recover(struct rtw89_dev *rtwdev, u8 path) in _rx_dck_recover() argument
1681 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr_bs[i]); in _rx_dck_recover()
1682 i_even_bs = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_recover()
1683 q_even_bs = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_recover()
1685 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr_bs[i] + 1); in _rx_dck_recover()
1686 i_odd_bs = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_recover()
1687 q_odd_bs = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_recover()
1693 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr[i]); in _rx_dck_recover()
1694 i_even = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_recover()
1695 q_even = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_recover()
1700 _rx_dck_fix_if_need(rtwdev, path, _dck_addr[i], in _rx_dck_recover()
1707 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr[i] + 1); in _rx_dck_recover()
1708 i_odd = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_recover()
1709 q_odd = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_recover()
1714 _rx_dck_fix_if_need(rtwdev, path, _dck_addr[i] + 1, in _rx_dck_recover()
1719 static void _rx_dck_toggle(struct rtw89_dev *rtwdev, u8 path) in _rx_dck_toggle() argument
1724 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); in _rx_dck_toggle()
1725 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x1); in _rx_dck_toggle()
1728 2, 2000, false, rtwdev, path, in _rx_dck_toggle()
1731 rtw89_warn(rtwdev, "[RX_DCK] S%d RXDCK timeout\n", path); in _rx_dck_toggle()
1733 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RX_DCK] S%d RXDCK finish\n", path); in _rx_dck_toggle()
1735 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); in _rx_dck_toggle()
1738 static void _set_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, u8 path, in _set_rx_dck() argument
1743 rtw89_write_rf(rtwdev, path, RR_DCK1, RR_DCK1_CLR, 0x0); in _set_rx_dck()
1745 _rx_dck_toggle(rtwdev, path); in _set_rx_dck()
1746 if (rtw89_read_rf(rtwdev, path, RR_DCKC, RR_DCKC_CHK) == 0) in _set_rx_dck()
1748 res = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_DONE); in _set_rx_dck()
1750 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_IDAC, res); in _set_rx_dck()
1751 _rx_dck_toggle(rtwdev, path); in _set_rx_dck()
1752 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_IDAC, 0x1); in _set_rx_dck()
1835 enum rtw89_rf_path path, bool is_bybb) in _rf_direct_cntrl() argument
1838 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); in _rf_direct_cntrl()
1840 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rf_direct_cntrl()
1844 enum rtw89_rf_path path, bool off);
1847 u32 reg_bkup[][RTW8852C_DPK_KIP_REG_NUM], u8 path) in _dpk_bkup_kip() argument
1852 reg_bkup[path][i] = in _dpk_bkup_kip()
1853 rtw89_phy_read32_mask(rtwdev, reg[i] + (path << 8), MASKDWORD); in _dpk_bkup_kip()
1856 reg[i] + (path << 8), reg_bkup[path][i]); in _dpk_bkup_kip()
1861 u32 reg_bkup[][RTW8852C_DPK_KIP_REG_NUM], u8 path) in _dpk_reload_kip() argument
1866 rtw89_phy_write32_mask(rtwdev, reg[i] + (path << 8), in _dpk_reload_kip()
1867 MASKDWORD, reg_bkup[path][i]); in _dpk_reload_kip()
1869 reg[i] + (path << 8), reg_bkup[path][i]); in _dpk_reload_kip()
1874 enum rtw89_rf_path path, enum rtw8852c_dpk_id id) in _dpk_one_shot() argument
1880 dpk_cmd = (u16)((id << 8) | (0x19 + path * 0x12)); in _dpk_one_shot()
1909 enum rtw89_rf_path path, enum rtw89_chanctx_idx chanctx_idx) in _dpk_information() argument
1914 u8 kidx = dpk->cur_idx[path]; in _dpk_information()
1916 dpk->bp[path][kidx].band = chan->band_type; in _dpk_information()
1917 dpk->bp[path][kidx].ch = chan->channel; in _dpk_information()
1918 dpk->bp[path][kidx].bw = chan->band_width; in _dpk_information()
1922 path, dpk->cur_idx[path], phy, in _dpk_information()
1923 rtwdev->is_tssi_mode[path] ? "on" : "off", in _dpk_information()
1925 dpk->bp[path][kidx].band == 0 ? "2G" : in _dpk_information()
1926 dpk->bp[path][kidx].band == 1 ? "5G" : "6G", in _dpk_information()
1927 dpk->bp[path][kidx].ch, in _dpk_information()
1928 dpk->bp[path][kidx].bw == 0 ? "20M" : in _dpk_information()
1929 dpk->bp[path][kidx].bw == 1 ? "40M" : "80M"); in _dpk_information()
1934 enum rtw89_rf_path path, u8 kpath) in _dpk_bb_afe_setting() argument
1937 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x1); in _dpk_bb_afe_setting()
1938 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x0); in _dpk_bb_afe_setting()
1939 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x1); in _dpk_bb_afe_setting()
1940 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x0); in _dpk_bb_afe_setting()
1943 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), MASKDWORD, 0xd801dffd); in _dpk_bb_afe_setting()
1946 rtw8852c_txck_force(rtwdev, path, true, DAC_960M); in _dpk_bb_afe_setting()
1949 rtw8852c_rxck_force(rtwdev, path, true, ADC_1920M); in _dpk_bb_afe_setting()
1950 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), in _dpk_bb_afe_setting()
1958 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x1); in _dpk_bb_afe_setting()
1959 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x1); in _dpk_bb_afe_setting()
1961 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d BB/AFE setting\n", path); in _dpk_bb_afe_setting()
1964 static void _dpk_bb_afe_restore(struct rtw89_dev *rtwdev, u8 path) in _dpk_bb_afe_restore() argument
1966 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), in _dpk_bb_afe_restore()
1968 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x1); in _dpk_bb_afe_restore()
1969 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x0); in _dpk_bb_afe_restore()
1970 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x1); in _dpk_bb_afe_restore()
1971 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x0); in _dpk_bb_afe_restore()
1972 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), MASKDWORD, 0x00000000); in _dpk_bb_afe_restore()
1973 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), B_P0_TXCK_ALL, 0x00); in _dpk_bb_afe_restore()
1974 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x0); in _dpk_bb_afe_restore()
1975 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x0); in _dpk_bb_afe_restore()
1977 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d BB/AFE restore\n", path); in _dpk_bb_afe_restore()
1981 enum rtw89_rf_path path, bool is_pause) in _dpk_tssi_pause() argument
1983 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _dpk_tssi_pause()
1986 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d TSSI %s\n", path, in _dpk_tssi_pause()
1990 static void _dpk_kip_control_rfc(struct rtw89_dev *rtwdev, u8 path, bool ctrl_by_kip) in _dpk_kip_control_rfc() argument
1992 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_IQK_RFC_ON, ctrl_by_kip); in _dpk_kip_control_rfc()
1997 static void _dpk_txpwr_bb_force(struct rtw89_dev *rtwdev, u8 path, bool force) in _dpk_txpwr_bb_force() argument
1999 rtw89_phy_write32_mask(rtwdev, R_TXPWRB + (path << 13), B_TXPWRB_ON, force); in _dpk_txpwr_bb_force()
2000 rtw89_phy_write32_mask(rtwdev, R_TXPWRB_H + (path << 13), B_TXPWRB_RDY, force); in _dpk_txpwr_bb_force()
2003 path, force ? "on" : "off"); in _dpk_txpwr_bb_force()
2007 enum rtw89_rf_path path) in _dpk_kip_restore() argument
2009 _dpk_one_shot(rtwdev, phy, path, D_KIP_RESTORE); in _dpk_kip_restore()
2010 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_kip_restore()
2011 _dpk_txpwr_bb_force(rtwdev, path, false); in _dpk_kip_restore()
2012 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d restore KIP\n", path); in _dpk_kip_restore()
2017 enum rtw89_rf_path path) in _dpk_lbk_rxiqk() argument
2023 rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), B_DPD_LBK, 0x1); in _dpk_lbk_rxiqk()
2026 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_lbk_rxiqk()
2028 cur_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB); in _dpk_lbk_rxiqk()
2029 rf_11 = rtw89_read_rf(rtwdev, path, RR_TXIG, RFREG_MASK); in _dpk_lbk_rxiqk()
2030 reg_81cc = rtw89_phy_read32_mask(rtwdev, R_KIP_IQP + (path << 8), in _dpk_lbk_rxiqk()
2033 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); in _dpk_lbk_rxiqk()
2034 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x3); in _dpk_lbk_rxiqk()
2035 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0xd); in _dpk_lbk_rxiqk()
2036 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB, 0x1f); in _dpk_lbk_rxiqk()
2038 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_IQSW, 0x12); in _dpk_lbk_rxiqk()
2039 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_SW, 0x3); in _dpk_lbk_rxiqk()
2041 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_lbk_rxiqk()
2045 _dpk_one_shot(rtwdev, phy, path, LBK_RXIQK); in _dpk_lbk_rxiqk()
2047 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d LBK RXIQC = 0x%x\n", path, in _dpk_lbk_rxiqk()
2048 rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD)); in _dpk_lbk_rxiqk()
2050 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_lbk_rxiqk()
2052 rtw89_write_rf(rtwdev, path, RR_TXIG, RFREG_MASK, rf_11); in _dpk_lbk_rxiqk()
2053 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB, cur_rxbb); in _dpk_lbk_rxiqk()
2054 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_SW, reg_81cc); in _dpk_lbk_rxiqk()
2058 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_DI, 0x1); in _dpk_lbk_rxiqk()
2060 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_lbk_rxiqk()
2064 enum rtw89_rf_path path, u8 kidx) in _dpk_rf_setting() argument
2068 if (dpk->bp[path][kidx].band == RTW89_BAND_2G) { in _dpk_rf_setting()
2069 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _dpk_rf_setting()
2071 rtw89_write_rf(rtwdev, path, RR_MOD_V1, RR_MOD_MASK, RF_DPK); in _dpk_rf_setting()
2072 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTC, 0x2); in _dpk_rf_setting()
2073 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTR, 0x4); in _dpk_rf_setting()
2074 rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_TIA, 0x1); in _dpk_rf_setting()
2075 rtw89_write_rf(rtwdev, path, RR_TIA, RR_TIA_N6, 0x1); in _dpk_rf_setting()
2079 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK), in _dpk_rf_setting()
2080 rtw89_read_rf(rtwdev, path, RR_RXBB, RFREG_MASK), in _dpk_rf_setting()
2081 rtw89_read_rf(rtwdev, path, RR_TIA, RFREG_MASK), in _dpk_rf_setting()
2082 rtw89_read_rf(rtwdev, path, RR_BTC, RFREG_MASK), in _dpk_rf_setting()
2083 rtw89_read_rf(rtwdev, path, RR_LUTDBG, RFREG_MASK), in _dpk_rf_setting()
2084 rtw89_read_rf(rtwdev, path, 0x1001a, RFREG_MASK)); in _dpk_rf_setting()
2086 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _dpk_rf_setting()
2088 rtw89_write_rf(rtwdev, path, RR_MOD_V1, RR_MOD_MASK, RF_DPK); in _dpk_rf_setting()
2090 if (dpk->bp[path][kidx].band == RTW89_BAND_6G && dpk->bp[path][kidx].ch >= 161) in _dpk_rf_setting()
2091 rtw89_write_rf(rtwdev, path, RR_IQGEN, RR_IQGEN_BIAS, 0x8); in _dpk_rf_setting()
2093 rtw89_write_rf(rtwdev, path, RR_LOGEN, RR_LOGEN_RPT, 0xd); in _dpk_rf_setting()
2094 rtw89_write_rf(rtwdev, path, RR_TXAC, RR_TXAC_IQG, 0x8); in _dpk_rf_setting()
2096 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_ATT, 0x0); in _dpk_rf_setting()
2097 rtw89_write_rf(rtwdev, path, RR_TXIQK, RR_TXIQK_ATT2, 0x3); in _dpk_rf_setting()
2098 rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_TIA, 0x1); in _dpk_rf_setting()
2099 rtw89_write_rf(rtwdev, path, RR_TIA, RR_TIA_N6, 0x1); in _dpk_rf_setting()
2101 if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_160) in _dpk_rf_setting()
2102 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_EBW, 0x0); in _dpk_rf_setting()
2106 static void _dpk_tpg_sel(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_tpg_sel() argument
2110 if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_160) { in _dpk_tpg_sel()
2113 } else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80) { in _dpk_tpg_sel()
2116 } else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40) { in _dpk_tpg_sel()
2124 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_160 ? "160M" : in _dpk_tpg_sel()
2125 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80 ? "80M" : in _dpk_tpg_sel()
2126 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40 ? "40M" : "20M"); in _dpk_tpg_sel()
2129 static bool _dpk_sync_check(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_sync_check() argument
2144 dpk->corr_idx[path][kidx] = corr_idx; in _dpk_sync_check()
2145 dpk->corr_val[path][kidx] = corr_val; in _dpk_sync_check()
2157 path, corr_idx, corr_val, dc_i, dc_q); in _dpk_sync_check()
2159 dpk->dc_i[path][kidx] = dc_i; in _dpk_sync_check()
2160 dpk->dc_q[path][kidx] = dc_q; in _dpk_sync_check()
2170 path, rxbb, in _dpk_sync_check()
2208 static void _dpk_kset_query(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_kset_query() argument
2212 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), B_KIP_RPT_SEL, 0x10); in _dpk_kset_query()
2214 rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), 0xE0000000) - 1; in _dpk_kset_query()
2218 enum rtw89_rf_path path, u8 dbm, bool set_from_bb) in _dpk_kip_set_txagc() argument
2222 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] set S%d txagc to %ddBm\n", path, dbm); in _dpk_kip_set_txagc()
2223 rtw89_phy_write32_mask(rtwdev, R_TXPWRB + (path << 13), B_TXPWRB_VAL, dbm << 2); in _dpk_kip_set_txagc()
2225 _dpk_one_shot(rtwdev, phy, path, D_TXAGC); in _dpk_kip_set_txagc()
2226 _dpk_kset_query(rtwdev, path); in _dpk_kip_set_txagc()
2230 enum rtw89_rf_path path, u8 kidx) in _dpk_gainloss() argument
2232 _dpk_one_shot(rtwdev, phy, path, D_GAIN_LOSS); in _dpk_gainloss()
2233 _dpk_kip_set_txagc(rtwdev, phy, path, 0xff, false); in _dpk_gainloss()
2235 rtw89_phy_write32_mask(rtwdev, R_DPK_GL + (path << 8), B_DPK_GL_A1, 0x0); in _dpk_gainloss()
2236 rtw89_phy_write32_mask(rtwdev, R_DPK_GL + (path << 8), B_DPK_GL_A0, 0x0); in _dpk_gainloss()
2287 enum rtw89_rf_path path, u8 kidx) in _dpk_kip_set_rxagc() argument
2289 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_kip_set_rxagc()
2291 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); in _dpk_kip_set_rxagc()
2292 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_kip_set_rxagc()
2294 _dpk_one_shot(rtwdev, phy, path, D_RXAGC); in _dpk_kip_set_rxagc()
2296 return _dpk_sync_check(rtwdev, path, kidx); in _dpk_kip_set_rxagc()
2315 static void _dpk_bypass_rxiqc(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_bypass_rxiqc() argument
2317 rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), B_DPD_LBK, 0x1); in _dpk_bypass_rxiqc()
2318 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, 0x40000002); in _dpk_bypass_rxiqc()
2324 enum rtw89_rf_path path, u8 kidx, u8 init_xdbm, u8 loss_only) in _dpk_agc() argument
2339 is_fail = _dpk_kip_set_rxagc(rtwdev, phy, path, kidx); in _dpk_agc()
2352 _dpk_one_shot(rtwdev, phy, path, D_SYNC); in _dpk_agc()
2357 if (dpk->bp[path][kidx].band == RTW89_BAND_2G) in _dpk_agc()
2358 _dpk_bypass_rxiqc(rtwdev, path); in _dpk_agc()
2360 _dpk_lbk_rxiqk(rtwdev, phy, path); in _dpk_agc()
2366 tmp_gl_idx = _dpk_gainloss(rtwdev, phy, path, kidx); in _dpk_agc()
2387 _dpk_kip_set_txagc(rtwdev, phy, path, tmp_dbm, true); in _dpk_agc()
2399 _dpk_kip_set_txagc(rtwdev, phy, path, tmp_dbm, true); in _dpk_agc()
2406 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_agc()
2407 tmp_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB); in _dpk_agc()
2413 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB, tmp_rxbb); in _dpk_agc()
2416 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_agc()
2454 enum rtw89_rf_path path, u8 kidx) in _dpk_idl_mpa() argument
2469 else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_5 || in _dpk_idl_mpa()
2470 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_10 || in _dpk_idl_mpa()
2471 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_20) in _dpk_idl_mpa()
2473 else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40 || in _dpk_idl_mpa()
2474 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80) in _dpk_idl_mpa()
2482 _dpk_one_shot(rtwdev, phy, path, D_MDPK_IDL); in _dpk_idl_mpa()
2491 _dpk_one_shot(rtwdev, phy, path, D_MDPK_IDL); in _dpk_idl_mpa()
2498 _dpk_one_shot(rtwdev, phy, path, D_MDPK_IDL); in _dpk_idl_mpa()
2503 enum rtw89_rf_path path, enum rtw89_chanctx_idx chanctx_idx) in _dpk_reload_check() argument
2514 if (cur_band != dpk->bp[path][idx].band || in _dpk_reload_check()
2515 cur_ch != dpk->bp[path][idx].ch) in _dpk_reload_check()
2518 rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), in _dpk_reload_check()
2520 dpk->cur_idx[path] = idx; in _dpk_reload_check()
2523 "[DPK] reload S%d[%d] success\n", path, idx); in _dpk_reload_check()
2536 enum rtw89_rf_path path, u8 kidx) in _dpk_kip_preset_8852c() argument
2539 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); in _dpk_kip_preset_8852c()
2543 R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_kip_preset_8852c()
2547 R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_kip_preset_8852c()
2550 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_kip_preset_8852c()
2551 rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_MDPD, kidx); in _dpk_kip_preset_8852c()
2553 _dpk_one_shot(rtwdev, phy, path, D_KIP_PRESET); in _dpk_kip_preset_8852c()
2556 static void _dpk_para_query(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_para_query() argument
2563 para = rtw89_phy_read32_mask(rtwdev, dpk_par_regs[kidx][dpk->cur_k_set] + (path << 8), in _dpk_para_query()
2566 dpk->bp[path][kidx].txagc_dpk = FIELD_GET(_DPK_PARA_TXAGC, para); in _dpk_para_query()
2567 dpk->bp[path][kidx].ther_dpk = FIELD_GET(_DPK_PARA_THER, para); in _dpk_para_query()
2570 dpk->cur_k_set, dpk->bp[path][kidx].ther_dpk, dpk->bp[path][kidx].txagc_dpk); in _dpk_para_query()
2574 enum rtw89_rf_path path, u8 kidx, bool is_execute) in _dpk_gain_normalize_8852c() argument
2579 rtw89_phy_write32_mask(rtwdev, R_DPK_GN + (path << 8), B_DPK_GN_AG, 0x200); in _dpk_gain_normalize_8852c()
2580 rtw89_phy_write32_mask(rtwdev, R_DPK_GN + (path << 8), B_DPK_GN_EN, 0x3); in _dpk_gain_normalize_8852c()
2582 _dpk_one_shot(rtwdev, phy, path, D_GAIN_NORM); in _dpk_gain_normalize_8852c()
2584 rtw89_phy_write32_mask(rtwdev, dpk_par_regs[kidx][dpk->cur_k_set] + (path << 8), in _dpk_gain_normalize_8852c()
2587 dpk->bp[path][kidx].gs = in _dpk_gain_normalize_8852c()
2588 rtw89_phy_read32_mask(rtwdev, dpk_par_regs[kidx][dpk->cur_k_set] + (path << 8), in _dpk_gain_normalize_8852c()
2621 enum rtw89_rf_path path, u8 kidx) in _dpk_on() argument
2625 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x1); in _dpk_on()
2626 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x0); in _dpk_on()
2627 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_on()
2630 dpk->bp[path][kidx].mdpd_en = BIT(dpk->cur_k_set); in _dpk_on()
2631 dpk->bp[path][kidx].path_ok = true; in _dpk_on()
2634 path, kidx, dpk->bp[path][kidx].mdpd_en); in _dpk_on()
2636 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_on()
2637 B_DPD_MEN, dpk->bp[path][kidx].mdpd_en); in _dpk_on()
2639 _dpk_gain_normalize_8852c(rtwdev, phy, path, kidx, false); in _dpk_on()
2643 enum rtw89_rf_path path, u8 gain) in _dpk_main() argument
2646 u8 kidx = dpk->cur_idx[path]; in _dpk_main()
2651 "[DPK] ========= S%d[%d] DPK Start =========\n", path, kidx); in _dpk_main()
2652 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_main()
2653 _rf_direct_cntrl(rtwdev, path, false); in _dpk_main()
2654 rtw89_write_rf(rtwdev, path, RR_BBDC, RFREG_MASK, 0x03ffd); in _dpk_main()
2655 _dpk_rf_setting(rtwdev, gain, path, kidx); in _dpk_main()
2656 _set_rx_dck(rtwdev, phy, path, false); in _dpk_main()
2658 _dpk_kip_preset_8852c(rtwdev, phy, path, kidx); in _dpk_main()
2659 _dpk_txpwr_bb_force(rtwdev, path, true); in _dpk_main()
2660 _dpk_kip_set_txagc(rtwdev, phy, path, init_xdbm, true); in _dpk_main()
2661 _dpk_tpg_sel(rtwdev, path, kidx); in _dpk_main()
2663 is_fail = _dpk_agc(rtwdev, phy, path, kidx, init_xdbm, false); in _dpk_main()
2667 _dpk_idl_mpa(rtwdev, phy, path, kidx); in _dpk_main()
2668 _dpk_para_query(rtwdev, path, kidx); in _dpk_main()
2669 _dpk_on(rtwdev, phy, path, kidx); in _dpk_main()
2672 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_main()
2673 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RF_RX); in _dpk_main()
2674 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d]_K%d %s\n", path, kidx, in _dpk_main()
2680 static void _dpk_init(struct rtw89_dev *rtwdev, u8 path) in _dpk_init() argument
2683 u8 kidx = dpk->cur_idx[path]; in _dpk_init()
2685 dpk->bp[path][kidx].path_ok = false; in _dpk_init()
2688 static void _dpk_drf_direct_cntrl(struct rtw89_dev *rtwdev, u8 path, bool is_bybb) in _dpk_drf_direct_cntrl() argument
2691 rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x1); in _dpk_drf_direct_cntrl()
2693 rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x0); in _dpk_drf_direct_cntrl()
2704 u8 path; in _dpk_cal_select() local
2710 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_cal_select()
2711 if (!(kpath & BIT(path))) in _dpk_cal_select()
2714 reloaded[path] = _dpk_reload_check(rtwdev, phy, path, in _dpk_cal_select()
2716 if (!reloaded[path] && dpk->bp[path][0].ch != 0) in _dpk_cal_select()
2717 dpk->cur_idx[path] = !dpk->cur_idx[path]; in _dpk_cal_select()
2719 _dpk_onoff(rtwdev, path, false); in _dpk_cal_select()
2722 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) in _dpk_cal_select()
2723 dpk->cur_idx[path] = 0; in _dpk_cal_select()
2726 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_cal_select()
2729 path, dpk->cur_idx[path]); in _dpk_cal_select()
2730 _dpk_bkup_kip(rtwdev, kip_reg, kip_bkup, path); in _dpk_cal_select()
2731 _rfk_backup_rf_reg(rtwdev, backup_rf_val[path], path); in _dpk_cal_select()
2732 _dpk_information(rtwdev, phy, path, chanctx_idx); in _dpk_cal_select()
2733 _dpk_init(rtwdev, path); in _dpk_cal_select()
2734 if (rtwdev->is_tssi_mode[path]) in _dpk_cal_select()
2735 _dpk_tssi_pause(rtwdev, path, true); in _dpk_cal_select()
2738 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_cal_select()
2741 path, dpk->cur_idx[path]); in _dpk_cal_select()
2742 rtw8852c_disable_rxagc(rtwdev, path, 0x0); in _dpk_cal_select()
2743 _dpk_drf_direct_cntrl(rtwdev, path, false); in _dpk_cal_select()
2744 _dpk_bb_afe_setting(rtwdev, phy, path, kpath); in _dpk_cal_select()
2745 is_fail = _dpk_main(rtwdev, phy, path, 1); in _dpk_cal_select()
2746 _dpk_onoff(rtwdev, path, is_fail); in _dpk_cal_select()
2749 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_cal_select()
2752 path, dpk->cur_idx[path]); in _dpk_cal_select()
2753 _dpk_kip_restore(rtwdev, phy, path); in _dpk_cal_select()
2754 _dpk_reload_kip(rtwdev, kip_reg, kip_bkup, path); in _dpk_cal_select()
2755 _rfk_restore_rf_reg(rtwdev, backup_rf_val[path], path); in _dpk_cal_select()
2756 _dpk_bb_afe_restore(rtwdev, path); in _dpk_cal_select()
2757 rtw8852c_disable_rxagc(rtwdev, path, 0x1); in _dpk_cal_select()
2758 if (rtwdev->is_tssi_mode[path]) in _dpk_cal_select()
2759 _dpk_tssi_pause(rtwdev, path, false); in _dpk_cal_select()
2791 u8 path, kpath; in _dpk_force_bypass() local
2795 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_force_bypass()
2796 if (kpath & BIT(path)) in _dpk_force_bypass()
2797 _dpk_onoff(rtwdev, path, true); in _dpk_force_bypass()
2819 enum rtw89_rf_path path, bool off) in _dpk_onoff() argument
2822 u8 val, kidx = dpk->cur_idx[path]; in _dpk_onoff()
2824 val = dpk->is_dpk_enable && !off && dpk->bp[path][kidx].path_ok ? in _dpk_onoff()
2825 dpk->bp[path][kidx].mdpd_en : 0; in _dpk_onoff()
2827 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_onoff()
2830 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] DPK %s !!!\n", path, in _dpk_onoff()
2837 u8 path, kidx; in _dpk_track() local
2844 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_track()
2845 kidx = dpk->cur_idx[path]; in _dpk_track()
2848 path, kidx, dpk->bp[path][kidx].ch); in _dpk_track()
2851 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), 0x0000003f); in _dpk_track()
2853 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), MASKBYTE2); in _dpk_track()
2855 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BTP + (path << 13), B_TXAGC_BTP); in _dpk_track()
2858 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), B_KIP_RPT_SEL, 0xf); in _dpk_track()
2860 rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), B_RPT_PER_TH); in _dpk_track()
2862 rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), B_RPT_PER_OF); in _dpk_track()
2864 rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), B_RPT_PER_TSSI); in _dpk_track()
2867 cur_ther = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in _dpk_track()
2872 if (dpk->bp[path][kidx].ch != 0 && cur_ther != 0) in _dpk_track()
2873 delta_ther = dpk->bp[path][kidx].ther_dpk - cur_ther; in _dpk_track()
2879 delta_ther, cur_ther, dpk->bp[path][kidx].ther_dpk); in _dpk_track()
2882 txagc_rf - dpk->bp[path][kidx].txagc_dpk, txagc_rf, in _dpk_track()
2883 dpk->bp[path][kidx].txagc_dpk); in _dpk_track()
2896 rtw89_phy_write32_mask(rtwdev, R_DPD_BND + (path << 8) + (kidx << 2), in _dpk_track()
2903 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_set_sys() argument
2923 if (path == RF_PATH_A) { in _tssi_set_sys()
2939 enum rtw89_rf_path path) in _tssi_ini_txpwr_ctrl_bb() argument
2941 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_ini_txpwr_ctrl_bb()
2948 enum rtw89_rf_path path) in _tssi_ini_txpwr_ctrl_bb_he_tb() argument
2950 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_ini_txpwr_ctrl_bb_he_tb()
2956 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_set_dck() argument
2960 if (path == RF_PATH_A) { in _tssi_set_dck()
2974 enum rtw89_rf_path path) in _tssi_set_bbgain_split() argument
2976 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_bbgain_split()
2982 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_set_tmeter_tbl() argument
3096 if (path == RF_PATH_A) { in _tssi_set_tmeter_tbl()
3200 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_slope_cal_org() argument
3204 if (path == RF_PATH_A) { in _tssi_slope_cal_org()
3216 enum rtw89_rf_path path, in _tssi_set_aligk_default() argument
3222 if (path == RF_PATH_A) { in _tssi_set_aligk_default()
3242 enum rtw89_rf_path path) in _tssi_set_slope() argument
3244 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_slope()
3250 enum rtw89_rf_path path) in _tssi_run_slope() argument
3252 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_run_slope()
3258 enum rtw89_rf_path path) in _tssi_set_track() argument
3260 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_track()
3267 enum rtw89_rf_path path) in _tssi_set_txagc_offset_mv_avg() argument
3269 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_txagc_offset_mv_avg()
3277 u32 i, path = RF_PATH_A, path_max = RF_PATH_NUM_8852C; in _tssi_enable() local
3281 path = RF_PATH_A; in _tssi_enable()
3284 path = RF_PATH_B; in _tssi_enable()
3289 for (i = path; i < path_max; i++) { in _tssi_enable()
3305 u32 i, path = RF_PATH_A, path_max = RF_PATH_NUM_8852C; in _tssi_disable() local
3309 path = RF_PATH_A; in _tssi_disable()
3312 path = RF_PATH_B; in _tssi_disable()
3317 for (i = path; i < path_max; i++) { in _tssi_disable()
3627 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_get_ofdm_de() argument
3641 "[TSSI][TRIM]: path=%d mcs group_idx=0x%x\n", in _tssi_get_ofdm_de()
3642 path, gidx); in _tssi_get_ofdm_de()
3647 de_1st = tssi_info->tssi_mcs[path][gidx_1st]; in _tssi_get_ofdm_de()
3648 de_2nd = tssi_info->tssi_mcs[path][gidx_2nd]; in _tssi_get_ofdm_de()
3652 "[TSSI][TRIM]: path=%d mcs de=%d 1st=%d 2nd=%d\n", in _tssi_get_ofdm_de()
3653 path, val, de_1st, de_2nd); in _tssi_get_ofdm_de()
3655 val = tssi_info->tssi_mcs[path][gidx]; in _tssi_get_ofdm_de()
3658 "[TSSI][TRIM]: path=%d mcs de=%d\n", path, val); in _tssi_get_ofdm_de()
3664 "[TSSI][TRIM]: path=%d mcs group_idx=0x%x\n", in _tssi_get_ofdm_de()
3665 path, gidx); in _tssi_get_ofdm_de()
3670 de_1st = tssi_info->tssi_6g_mcs[path][gidx_1st]; in _tssi_get_ofdm_de()
3671 de_2nd = tssi_info->tssi_6g_mcs[path][gidx_2nd]; in _tssi_get_ofdm_de()
3675 "[TSSI][TRIM]: path=%d mcs de=%d 1st=%d 2nd=%d\n", in _tssi_get_ofdm_de()
3676 path, val, de_1st, de_2nd); in _tssi_get_ofdm_de()
3678 val = tssi_info->tssi_6g_mcs[path][gidx]; in _tssi_get_ofdm_de()
3681 "[TSSI][TRIM]: path=%d mcs de=%d\n", path, val); in _tssi_get_ofdm_de()
3690 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_get_ofdm_trim_de() argument
3704 "[TSSI][TRIM]: path=%d mcs trim_group_idx=0x%x\n", in _tssi_get_ofdm_trim_de()
3705 path, tgidx); in _tssi_get_ofdm_trim_de()
3710 tde_1st = tssi_info->tssi_trim[path][tgidx_1st]; in _tssi_get_ofdm_trim_de()
3711 tde_2nd = tssi_info->tssi_trim[path][tgidx_2nd]; in _tssi_get_ofdm_trim_de()
3715 "[TSSI][TRIM]: path=%d mcs trim_de=%d 1st=%d 2nd=%d\n", in _tssi_get_ofdm_trim_de()
3716 path, val, tde_1st, tde_2nd); in _tssi_get_ofdm_trim_de()
3718 val = tssi_info->tssi_trim[path][tgidx]; in _tssi_get_ofdm_trim_de()
3721 "[TSSI][TRIM]: path=%d mcs trim_de=%d\n", in _tssi_get_ofdm_trim_de()
3722 path, val); in _tssi_get_ofdm_trim_de()
3728 "[TSSI][TRIM]: path=%d mcs trim_group_idx=0x%x\n", in _tssi_get_ofdm_trim_de()
3729 path, tgidx); in _tssi_get_ofdm_trim_de()
3734 tde_1st = tssi_info->tssi_trim_6g[path][tgidx_1st]; in _tssi_get_ofdm_trim_de()
3735 tde_2nd = tssi_info->tssi_trim_6g[path][tgidx_2nd]; in _tssi_get_ofdm_trim_de()
3739 "[TSSI][TRIM]: path=%d mcs trim_de=%d 1st=%d 2nd=%d\n", in _tssi_get_ofdm_trim_de()
3740 path, val, tde_1st, tde_2nd); in _tssi_get_ofdm_trim_de()
3742 val = tssi_info->tssi_trim_6g[path][tgidx]; in _tssi_get_ofdm_trim_de()
3745 "[TSSI][TRIM]: path=%d mcs trim_de=%d\n", in _tssi_get_ofdm_trim_de()
3746 path, val); in _tssi_get_ofdm_trim_de()
3762 u32 i, path = RF_PATH_A, path_max = RF_PATH_NUM_8852C; in _tssi_set_efuse_to_de() local
3769 path = RF_PATH_A; in _tssi_set_efuse_to_de()
3772 path = RF_PATH_B; in _tssi_set_efuse_to_de()
3777 for (i = path; i < path_max; i++) { in _tssi_set_efuse_to_de()
3783 "[TSSI][TRIM]: path=%d cck[%d]=0x%x trim=0x%x\n", in _tssi_set_efuse_to_de()
3800 "[TSSI][TRIM]: path=%d mcs=0x%x trim=0x%x\n", in _tssi_set_efuse_to_de()
3819 enum rtw89_rf_path path, const struct rtw89_chan *chan) in rtw8852c_tssi_cont_en() argument
3825 rtw89_phy_write32_mask(rtwdev, tssi_trk[path], BIT(30), 0x0); in rtw8852c_tssi_cont_en()
3826 rtw89_phy_write32_mask(rtwdev, tssi_en[path], BIT(31), 0x0); in rtw8852c_tssi_cont_en()
3827 if (rtwdev->dbcc_en && path == RF_PATH_B) in rtw8852c_tssi_cont_en()
3832 rtw89_phy_write32_mask(rtwdev, tssi_trk[path], BIT(30), 0x1); in rtw8852c_tssi_cont_en()
3833 rtw89_phy_write32_mask(rtwdev, tssi_en[path], BIT(31), 0x1); in rtw8852c_tssi_cont_en()
3851 static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _bw_setting() argument
3863 rf_reg18 = rtw89_read_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK); in _bw_setting()
3871 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x3); in _bw_setting()
3872 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xf); in _bw_setting()
3876 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x3); in _bw_setting()
3877 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xf); in _bw_setting()
3881 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x2); in _bw_setting()
3882 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xd); in _bw_setting()
3886 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x1); in _bw_setting()
3887 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xb); in _bw_setting()
3893 rtw89_write_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK, rf_reg18); in _bw_setting()
3900 u8 kpath, path; in _ctrl_bw() local
3906 for (path = 0; path < 2; path++) { in _ctrl_bw()
3907 if (!(kpath & BIT(path))) in _ctrl_bw()
3911 _bw_setting(rtwdev, path, bw, is_dav); in _ctrl_bw()
3913 _bw_setting(rtwdev, path, bw, is_dav); in _ctrl_bw()
3917 if (path == RF_PATH_B && rtwdev->hal.cv == CHIP_CAV) { in _ctrl_bw()
3928 static void _ch_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _ch_setting() argument
3940 rf_reg18 = rtw89_read_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK); in _ch_setting()
3960 rtw89_write_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK, rf_reg18); in _ch_setting()
3967 u8 kpath, path; in _ctrl_ch() local
3982 for (path = 0; path < 2; path++) { in _ctrl_ch()
3983 if (kpath & BIT(path)) { in _ctrl_ch()
3984 _ch_setting(rtwdev, path, central_ch, band, true); in _ctrl_ch()
3985 _ch_setting(rtwdev, path, central_ch, band, false); in _ctrl_ch()
3994 u8 path; in _rxbb_bw() local
3998 for (path = 0; path < 2; path++) { in _rxbb_bw()
3999 if (!(kpath & BIT(path))) in _rxbb_bw()
4002 rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x1); in _rxbb_bw()
4003 rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_M2, 0xa); in _rxbb_bw()
4019 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, val); in _rxbb_bw()
4020 rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x0); in _rxbb_bw()
4027 int path; in _lck_keep_thermal() local
4029 for (path = 0; path < rtwdev->chip->rf_path_num; path++) { in _lck_keep_thermal()
4030 lck->thermal[path] = in _lck_keep_thermal()
4031 ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in _lck_keep_thermal()
4033 "[LCK] path=%d thermal=0x%x", path, lck->thermal[path]); in _lck_keep_thermal()
4040 int path = rtwdev->dbcc_en ? 2 : 1; in _lck() local
4048 for (i = 0; i < path; i++) { in _lck()
4064 int path; in rtw8852c_lck_track() local
4066 for (path = 0; path < rtwdev->chip->rf_path_num; path++) { in rtw8852c_lck_track()
4068 ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in rtw8852c_lck_track()
4069 delta = abs((int)cur_thermal - lck->thermal[path]); in rtw8852c_lck_track()
4072 "[LCK] path=%d current thermal=0x%x delta=0x%x\n", in rtw8852c_lck_track()
4073 path, cur_thermal, delta); in rtw8852c_lck_track()
4145 u8 path; in rtw8852c_rck() local
4147 for (path = 0; path < 2; path++) in rtw8852c_rck()
4148 _rck(rtwdev, path); in rtw8852c_rck()
4183 u8 path, kpath; in _rx_dck() local
4193 for (path = 0; path < 2; path++) { in _rx_dck()
4194 rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); in _rx_dck()
4195 if (!(kpath & BIT(path))) in _rx_dck()
4198 if (rtwdev->is_tssi_mode[path]) in _rx_dck()
4199 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _rx_dck()
4201 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rx_dck()
4202 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); in _rx_dck()
4203 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_LO_SEL, rtwdev->dbcc_en); in _rx_dck()
4206 _set_rx_dck(rtwdev, phy, path, is_afe); in _rx_dck()
4212 _rx_dck_recover(rtwdev, path); in _rx_dck()
4216 is_fail = _rx_dck_rek_check(rtwdev, path); in _rx_dck()
4222 path, rek_cnt); in _rx_dck()
4224 rx_dck->thermal[path] = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in _rx_dck()
4225 rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); in _rx_dck()
4227 if (rtwdev->is_tssi_mode[path]) in _rx_dck()
4228 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _rx_dck()
4251 int path; in rtw8852c_rx_dck_track() local
4259 for (path = 0; path < RF_PATH_NUM_8852C; path++) { in rtw8852c_rx_dck_track()
4261 ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in rtw8852c_rx_dck_track()
4262 delta = abs((int)cur_thermal - rx_dck->thermal[path]); in rtw8852c_rx_dck_track()
4265 "[RX_DCK] path=%d current thermal=0x%x delta=0x%x\n", in rtw8852c_rx_dck_track()
4266 path, cur_thermal, delta); in rtw8852c_rx_dck_track()
4278 for (path = 0; path < RF_PATH_NUM_8852C; path++) { in rtw8852c_rx_dck_track()
4285 for (path = 0; path < RF_PATH_NUM_8852C; path++) in rtw8852c_rx_dck_track()
4325 u32 i, path = RF_PATH_A, path_max = RF_PATH_NUM_8852C; in rtw8852c_tssi() local
4331 path = RF_PATH_A; in rtw8852c_tssi()
4334 path = RF_PATH_B; in rtw8852c_tssi()
4341 for (i = path; i < path_max; i++) { in rtw8852c_tssi()
4361 u32 i, path = RF_PATH_A, path_max = RF_PATH_NUM_8852C; in rtw8852c_tssi_scan() local
4373 path = RF_PATH_A; in rtw8852c_tssi_scan()
4376 path = RF_PATH_B; in rtw8852c_tssi_scan()
4383 for (i = path; i < path_max; i++) { in rtw8852c_tssi_scan()
4455 u8 path; in rtw8852c_rfk_chanctx_cb() local
4460 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) in rtw8852c_rfk_chanctx_cb()
4461 _dpk_onoff(rtwdev, path, false); in rtw8852c_rfk_chanctx_cb()
4465 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) in rtw8852c_rfk_chanctx_cb()
4466 _dpk_onoff(rtwdev, path, false); in rtw8852c_rfk_chanctx_cb()