Lines Matching full:path
159 u8 path) in _adc_fifo_rst() argument
167 enum rtw89_rf_path path, bool is_bybb) in _rfk_rf_direct_cntrl() argument
170 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); in _rfk_rf_direct_cntrl()
172 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rfk_rf_direct_cntrl()
176 enum rtw89_rf_path path, bool is_bybb) in _rfk_drf_direct_cntrl() argument
179 rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x1); in _rfk_drf_direct_cntrl()
181 rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x0); in _rfk_drf_direct_cntrl()
184 static void _txck_force(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _txck_force() argument
187 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_ON, 0x0); in _txck_force()
192 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_VAL, ck); in _txck_force()
193 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_ON, 0x1); in _txck_force()
196 static void _rxck_force(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _rxck_force() argument
203 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x0); in _rxck_force()
207 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_VAL, ck); in _rxck_force()
208 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x1); in _rxck_force()
220 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_CTL, data[0]); in _rxck_force()
221 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_EN, data[1]); in _rxck_force()
222 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, data[2]); in _rxck_force()
223 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, data[3]); in _rxck_force()
224 rtw89_phy_write32_mask(rtwdev, R_DRCK | (path << 8), B_DRCK_MUL, data[4]); in _rxck_force()
225 rtw89_phy_write32_mask(rtwdev, R_ADCMOD | (path << 8), B_ADCMOD_LP, data[5]); in _rxck_force()
226 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 8), B_P0_RXCK_ADJ, data[6]); in _rxck_force()
232 u8 path; in _wait_rx_mode() local
235 for (path = 0; path < RF_PATH_MAX; path++) { in _wait_rx_mode()
236 if (!(kpath & BIT(path))) in _wait_rx_mode()
241 rtwdev, path, 0x00, RR_MOD_MASK); in _wait_rx_mode()
244 path, ret); in _wait_rx_mode()
248 static void _dack_reset(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dack_reset() argument
331 enum rtw89_rf_path path, u8 index) in _dack_reload_by_path() argument
344 if (path == RF_PATH_A) in _dack_reload_by_path()
357 tmp |= dack->msbk_d[path][index][i + 12] << (i * 8); in _dack_reload_by_path()
366 tmp |= dack->msbk_d[path][index][i + 8] << (i * 8); in _dack_reload_by_path()
375 tmp |= dack->msbk_d[path][index][i + 4] << (i * 8); in _dack_reload_by_path()
384 tmp |= dack->msbk_d[path][index][i] << (i * 8); in _dack_reload_by_path()
392 tmp = (dack->biask_d[path][index] << 22) | in _dack_reload_by_path()
393 (dack->dadck_d[path][index] << 14); in _dack_reload_by_path()
402 static void _dack_reload(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dack_reload() argument
407 _dack_reload_by_path(rtwdev, path, index); in _dack_reload()
587 enum rtw89_rf_path path, bool is_afe, in _rx_dck_info() argument
593 "[RX_DCK] ==== S%d RX DCK (%s / CH%d / %s / by %s)====\n", path, in _rx_dck_info()
602 static void _rxbb_ofst_swap(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 rf_mode) in _rxbb_ofst_swap() argument
606 val_i = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_S1); in _rxbb_ofst_swap()
607 val_q = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_S1); in _rxbb_ofst_swap()
611 rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_DIS, 0x1); in _rxbb_ofst_swap()
612 rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, rf_mode); in _rxbb_ofst_swap()
613 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, val); in _rxbb_ofst_swap()
614 rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_DIS, 0x0); in _rxbb_ofst_swap()
621 static void _set_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 rf_mode) in _set_rx_dck() argument
626 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); in _set_rx_dck()
627 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x1); in _set_rx_dck()
631 rtwdev, path, RR_DCK, BIT(8)); in _set_rx_dck()
633 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); in _set_rx_dck()
636 path, ret); in _set_rx_dck()
638 _rxbb_ofst_swap(rtwdev, path, rf_mode); in _set_rx_dck()
645 u8 path; in _rx_dck() local
651 for (path = 0; path < RF_PATH_NUM_8851B; path++) { in _rx_dck()
652 _rx_dck_info(rtwdev, phy, path, is_afe, chanctx_idx); in _rx_dck()
654 rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); in _rx_dck()
656 if (rtwdev->is_tssi_mode[path]) in _rx_dck()
658 R_P0_TSSI_TRK + (path << 13), in _rx_dck()
661 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rx_dck()
662 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RF_RX); in _rx_dck()
663 _set_rx_dck(rtwdev, path, RF_RX); in _rx_dck()
664 rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); in _rx_dck()
666 if (rtwdev->is_tssi_mode[path]) in _rx_dck()
668 R_P0_TSSI_TRK + (path << 13), in _rx_dck()
673 static void _iqk_sram(struct rtw89_dev *rtwdev, u8 path) in _iqk_sram() argument
703 static void _iqk_rxk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_rxk_setting() argument
705 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _iqk_rxk_setting()
706 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); in _iqk_rxk_setting()
707 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x1); in _iqk_rxk_setting()
710 static bool _iqk_check_cal(struct rtw89_dev *rtwdev, u8 path) in _iqk_check_cal() argument
741 path, ret, fail1 || fail2, fail1, fail2); in _iqk_check_cal()
747 u8 path, u8 ktype) in _iqk_one_shot() argument
756 "[IQK]============ S%d ID_A_FLOK_COARSE ============\n", path); in _iqk_one_shot()
758 iqk_cmd = 0x108 | (1 << (4 + path)); in _iqk_one_shot()
762 "[IQK]============ S%d ID_G_FLOK_COARSE ============\n", path); in _iqk_one_shot()
764 iqk_cmd = 0x108 | (1 << (4 + path)); in _iqk_one_shot()
768 "[IQK]============ S%d ID_A_FLOK_FINE ============\n", path); in _iqk_one_shot()
770 iqk_cmd = 0x308 | (1 << (4 + path)); in _iqk_one_shot()
774 "[IQK]============ S%d ID_G_FLOK_FINE ============\n", path); in _iqk_one_shot()
776 iqk_cmd = 0x308 | (1 << (4 + path)); in _iqk_one_shot()
780 "[IQK]============ S%d ID_TXK ============\n", path); in _iqk_one_shot()
782 iqk_cmd = 0x008 | (1 << (path + 4)) | in _iqk_one_shot()
783 (((0x8 + iqk_info->iqk_bw[path]) & 0xf) << 8); in _iqk_one_shot()
787 "[IQK]============ S%d ID_RXAGC ============\n", path); in _iqk_one_shot()
789 iqk_cmd = 0x708 | (1 << (4 + path)) | (path << 1); in _iqk_one_shot()
793 "[IQK]============ S%d ID_RXK ============\n", path); in _iqk_one_shot()
795 iqk_cmd = 0x008 | (1 << (path + 4)) | in _iqk_one_shot()
796 (((0xc + iqk_info->iqk_bw[path]) & 0xf) << 8); in _iqk_one_shot()
800 "[IQK]============ S%d ID_NBTXK ============\n", path); in _iqk_one_shot()
804 iqk_cmd = 0x408 | (1 << (4 + path)); in _iqk_one_shot()
808 "[IQK]============ S%d ID_NBRXK ============\n", path); in _iqk_one_shot()
812 iqk_cmd = 0x608 | (1 << (4 + path)); in _iqk_one_shot()
819 notready = _iqk_check_cal(rtwdev, path); in _iqk_one_shot()
822 _iqk_sram(rtwdev, path); in _iqk_one_shot()
827 path, ktype, iqk_cmd + 1, notready); in _iqk_one_shot()
833 enum rtw89_phy_idx phy_idx, u8 path) in _rxk_2g_group_sel() argument
844 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, gp = %x\n", path, gp); in _rxk_2g_group_sel()
846 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RGM, g_idxrxgain[gp]); in _rxk_2g_group_sel()
847 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C2, g_idxattc2[gp]); in _rxk_2g_group_sel()
852 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80013); in _rxk_2g_group_sel()
854 rf_0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); in _rxk_2g_group_sel()
859 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXAGC); in _rxk_2g_group_sel()
862 "[IQK]S%x, RXAGC 0x8008 = 0x%x, rxbb = %x\n", path, in _rxk_2g_group_sel()
864 rtw89_read_rf(rtwdev, path, RR_MOD, 0x003e0)); in _rxk_2g_group_sel()
866 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); in _rxk_2g_group_sel()
868 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); in _rxk_2g_group_sel()
869 iqk_info->nb_rxcfir[path] = in _rxk_2g_group_sel()
872 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); in _rxk_2g_group_sel()
875 "[IQK]S%x, WBRXK 0x8008 = 0x%x\n", path, in _rxk_2g_group_sel()
883 _iqk_sram(rtwdev, path); in _rxk_2g_group_sel()
886 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), in _rxk_2g_group_sel()
887 MASKDWORD, iqk_info->nb_rxcfir[path] | 0x2); in _rxk_2g_group_sel()
888 iqk_info->is_wb_txiqk[path] = false; in _rxk_2g_group_sel()
890 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), in _rxk_2g_group_sel()
892 iqk_info->is_wb_txiqk[path] = true; in _rxk_2g_group_sel()
896 "[IQK]S%x, kfail = 0x%x, 0x8%x3c = 0x%x\n", path, kfail, in _rxk_2g_group_sel()
897 1 << path, iqk_info->nb_rxcfir[path]); in _rxk_2g_group_sel()
902 enum rtw89_phy_idx phy_idx, u8 path) in _rxk_5g_group_sel() argument
916 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, gp = %x\n", path, gp); in _rxk_5g_group_sel()
925 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80013); in _rxk_5g_group_sel()
927 rf_0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); in _rxk_5g_group_sel()
931 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXAGC); in _rxk_5g_group_sel()
934 "[IQK]S%x, RXAGC 0x8008 = 0x%x, rxbb = %x\n", path, in _rxk_5g_group_sel()
936 rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_RXB)); in _rxk_5g_group_sel()
938 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); in _rxk_5g_group_sel()
940 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); in _rxk_5g_group_sel()
941 iqk_info->nb_rxcfir[path] = in _rxk_5g_group_sel()
945 "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, in _rxk_5g_group_sel()
948 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); in _rxk_5g_group_sel()
951 "[IQK]S%x, WBRXK 0x8008 = 0x%x\n", path, in _rxk_5g_group_sel()
959 _iqk_sram(rtwdev, path); in _rxk_5g_group_sel()
962 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, in _rxk_5g_group_sel()
963 iqk_info->nb_rxcfir[path] | 0x2); in _rxk_5g_group_sel()
964 iqk_info->is_wb_txiqk[path] = false; in _rxk_5g_group_sel()
966 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, in _rxk_5g_group_sel()
968 iqk_info->is_wb_txiqk[path] = true; in _rxk_5g_group_sel()
972 "[IQK]S%x, kfail = 0x%x, 0x8%x3c = 0x%x\n", path, kfail, in _rxk_5g_group_sel()
973 1 << path, iqk_info->nb_rxcfir[path]); in _rxk_5g_group_sel()
978 u8 path) in _iqk_5g_nbrxk() argument
990 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, gp = %x\n", path, gp); in _iqk_5g_nbrxk()
999 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80013); in _iqk_5g_nbrxk()
1001 rf_0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); in _iqk_5g_nbrxk()
1005 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXAGC); in _iqk_5g_nbrxk()
1008 "[IQK]S%x, RXAGC 0x8008 = 0x%x, rxbb = %x\n", path, in _iqk_5g_nbrxk()
1010 rtw89_read_rf(rtwdev, path, RR_MOD, 0x003e0)); in _iqk_5g_nbrxk()
1012 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); in _iqk_5g_nbrxk()
1014 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); in _iqk_5g_nbrxk()
1015 iqk_info->nb_rxcfir[path] = in _iqk_5g_nbrxk()
1019 "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, in _iqk_5g_nbrxk()
1023 path, rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); in _iqk_5g_nbrxk()
1029 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), in _iqk_5g_nbrxk()
1031 iqk_info->is_wb_rxiqk[path] = false; in _iqk_5g_nbrxk()
1033 iqk_info->is_wb_rxiqk[path] = false; in _iqk_5g_nbrxk()
1037 "[IQK]S%x, kfail = 0x%x, 0x8%x3c = 0x%x\n", path, kfail, in _iqk_5g_nbrxk()
1038 1 << path, iqk_info->nb_rxcfir[path]); in _iqk_5g_nbrxk()
1044 u8 path) in _iqk_2g_nbrxk() argument
1053 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, gp = %x\n", path, gp); in _iqk_2g_nbrxk()
1055 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RGM, g_idxrxgain[gp]); in _iqk_2g_nbrxk()
1056 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C2, g_idxattc2[gp]); in _iqk_2g_nbrxk()
1061 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80013); in _iqk_2g_nbrxk()
1063 rf_0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); in _iqk_2g_nbrxk()
1067 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXAGC); in _iqk_2g_nbrxk()
1071 path, rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD), in _iqk_2g_nbrxk()
1072 rtw89_read_rf(rtwdev, path, RR_MOD, 0x003e0)); in _iqk_2g_nbrxk()
1074 rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); in _iqk_2g_nbrxk()
1076 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); in _iqk_2g_nbrxk()
1077 iqk_info->nb_rxcfir[path] = in _iqk_2g_nbrxk()
1081 "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, in _iqk_2g_nbrxk()
1085 path, rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); in _iqk_2g_nbrxk()
1091 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), in _iqk_2g_nbrxk()
1093 iqk_info->is_wb_rxiqk[path] = false; in _iqk_2g_nbrxk()
1095 iqk_info->is_wb_rxiqk[path] = false; in _iqk_2g_nbrxk()
1099 "[IQK]S%x, kfail = 0x%x, 0x8%x3c = 0x%x\n", path, kfail, in _iqk_2g_nbrxk()
1100 1 << path, iqk_info->nb_rxcfir[path]); in _iqk_2g_nbrxk()
1104 static void _iqk_rxclk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_rxclk_setting() argument
1108 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1); in _iqk_rxclk_setting()
1110 if (iqk_info->iqk_bw[path] == RTW89_CHANNEL_WIDTH_80) { in _iqk_rxclk_setting()
1114 _rxck_force(rtwdev, path, true, ADC_960M); in _iqk_rxclk_setting()
1121 _rxck_force(rtwdev, path, true, ADC_960M); in _iqk_rxclk_setting()
1126 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, (2)before RXK IQK\n", path); in _iqk_rxclk_setting()
1127 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x%x[07:10] = 0x%x\n", path, in _iqk_rxclk_setting()
1129 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x%x[11:14] = 0x%x\n", path, in _iqk_rxclk_setting()
1131 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x%x[26:27] = 0x%x\n", path, in _iqk_rxclk_setting()
1133 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x%x[05:08] = 0x%x\n", path, in _iqk_rxclk_setting()
1135 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x%x[17:21] = 0x%x\n", path, in _iqk_rxclk_setting()
1137 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x%x[16:31] = 0x%x\n", path, in _iqk_rxclk_setting()
1139 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x%x[04:05] = 0x%x\n", path, in _iqk_rxclk_setting()
1141 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x%x[23:31] = 0x%x\n", path, in _iqk_rxclk_setting()
1143 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x%x[13:14] = 0x%x\n", path, in _iqk_rxclk_setting()
1145 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x%x[16:23] = 0x%x\n", path, in _iqk_rxclk_setting()
1150 enum rtw89_phy_idx phy_idx, u8 path) in _txk_5g_group_sel() argument
1160 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, a_power_range[gp]); in _txk_5g_group_sel()
1161 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, a_track_range[gp]); in _txk_5g_group_sel()
1162 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, a_gain_bb[gp]); in _txk_5g_group_sel()
1171 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); in _txk_5g_group_sel()
1172 iqk_info->nb_txcfir[path] = in _txk_5g_group_sel()
1175 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _txk_5g_group_sel()
1177 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_TXK); in _txk_5g_group_sel()
1184 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), in _txk_5g_group_sel()
1185 MASKDWORD, iqk_info->nb_txcfir[path] | 0x2); in _txk_5g_group_sel()
1186 iqk_info->is_wb_txiqk[path] = false; in _txk_5g_group_sel()
1188 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), in _txk_5g_group_sel()
1190 iqk_info->is_wb_txiqk[path] = true; in _txk_5g_group_sel()
1194 "[IQK]S%x, kfail = 0x%x, 0x8%x38 = 0x%x\n", path, kfail, in _txk_5g_group_sel()
1195 1 << path, iqk_info->nb_txcfir[path]); in _txk_5g_group_sel()
1200 enum rtw89_phy_idx phy_idx, u8 path) in _txk_2g_group_sel() argument
1210 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, g_power_range[gp]); in _txk_2g_group_sel()
1211 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, g_track_range[gp]); in _txk_2g_group_sel()
1212 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, g_gain_bb[gp]); in _txk_2g_group_sel()
1221 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); in _txk_2g_group_sel()
1222 iqk_info->nb_txcfir[path] = in _txk_2g_group_sel()
1225 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _txk_2g_group_sel()
1227 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_TXK); in _txk_2g_group_sel()
1234 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), in _txk_2g_group_sel()
1235 MASKDWORD, iqk_info->nb_txcfir[path] | 0x2); in _txk_2g_group_sel()
1236 iqk_info->is_wb_txiqk[path] = false; in _txk_2g_group_sel()
1238 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), in _txk_2g_group_sel()
1240 iqk_info->is_wb_txiqk[path] = true; in _txk_2g_group_sel()
1244 "[IQK]S%x, kfail = 0x%x, 0x8%x38 = 0x%x\n", path, kfail, in _txk_2g_group_sel()
1245 1 << path, iqk_info->nb_txcfir[path]); in _txk_2g_group_sel()
1250 u8 path) in _iqk_5g_nbtxk() argument
1260 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, a_power_range[gp]); in _iqk_5g_nbtxk()
1261 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, a_track_range[gp]); in _iqk_5g_nbtxk()
1262 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, a_gain_bb[gp]); in _iqk_5g_nbtxk()
1271 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); in _iqk_5g_nbtxk()
1272 iqk_info->nb_txcfir[path] = in _iqk_5g_nbtxk()
1280 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), in _iqk_5g_nbtxk()
1282 iqk_info->is_wb_rxiqk[path] = false; in _iqk_5g_nbtxk()
1284 iqk_info->is_wb_rxiqk[path] = false; in _iqk_5g_nbtxk()
1288 "[IQK]S%x, kfail = 0x%x, 0x8%x38 = 0x%x\n", path, kfail, in _iqk_5g_nbtxk()
1289 1 << path, iqk_info->nb_txcfir[path]); in _iqk_5g_nbtxk()
1294 u8 path) in _iqk_2g_nbtxk() argument
1304 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, g_power_range[gp]); in _iqk_2g_nbtxk()
1305 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, g_track_range[gp]); in _iqk_2g_nbtxk()
1306 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, g_gain_bb[gp]); in _iqk_2g_nbtxk()
1315 notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); in _iqk_2g_nbtxk()
1316 iqk_info->nb_txcfir[path] = in _iqk_2g_nbtxk()
1317 rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), in _iqk_2g_nbtxk()
1325 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), in _iqk_2g_nbtxk()
1327 iqk_info->is_wb_rxiqk[path] = false; in _iqk_2g_nbtxk()
1329 iqk_info->is_wb_rxiqk[path] = false; in _iqk_2g_nbtxk()
1333 "[IQK]S%x, kfail = 0x%x, 0x8%x38 = 0x%x\n", path, kfail, in _iqk_2g_nbtxk()
1334 1 << path, iqk_info->nb_txcfir[path]); in _iqk_2g_nbtxk()
1339 u8 path) in _iqk_2g_lok() argument
1363 0x00000109 | (1 << (4 + path))); in _iqk_2g_lok()
1364 fail |= _iqk_check_cal(rtwdev, path); in _iqk_2g_lok()
1369 0x00000309 | (1 << (4 + path))); in _iqk_2g_lok()
1370 fail |= _iqk_check_cal(rtwdev, path); in _iqk_2g_lok()
1392 u8 path) in _iqk_5g_lok() argument
1416 0x00000109 | (1 << (4 + path))); in _iqk_5g_lok()
1417 fail |= _iqk_check_cal(rtwdev, path); in _iqk_5g_lok()
1423 0x00000309 | (1 << (4 + path))); in _iqk_5g_lok()
1424 fail |= _iqk_check_cal(rtwdev, path); in _iqk_5g_lok()
1445 static void _iqk_txk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_txk_setting() argument
1449 switch (iqk_info->iqk_band[path]) { in _iqk_txk_setting()
1466 u8 path) in _iqk_by_path() argument
1475 _iqk_txk_setting(rtwdev, path); in _iqk_by_path()
1476 if (iqk_info->iqk_band[path] == RTW89_BAND_2G) in _iqk_by_path()
1477 lok_is_fail = _iqk_2g_lok(rtwdev, phy_idx, path); in _iqk_by_path()
1479 lok_is_fail = _iqk_5g_lok(rtwdev, phy_idx, path); in _iqk_by_path()
1486 if (iqk_info->iqk_band[path] == RTW89_BAND_2G) in _iqk_by_path()
1487 iqk_info->iqk_tx_fail[0][path] = in _iqk_by_path()
1488 _iqk_2g_nbtxk(rtwdev, phy_idx, path); in _iqk_by_path()
1490 iqk_info->iqk_tx_fail[0][path] = in _iqk_by_path()
1491 _iqk_5g_nbtxk(rtwdev, phy_idx, path); in _iqk_by_path()
1493 if (iqk_info->iqk_band[path] == RTW89_BAND_2G) in _iqk_by_path()
1494 iqk_info->iqk_tx_fail[0][path] = in _iqk_by_path()
1495 _txk_2g_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1497 iqk_info->iqk_tx_fail[0][path] = in _iqk_by_path()
1498 _txk_5g_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1501 _iqk_rxclk_setting(rtwdev, path); in _iqk_by_path()
1502 _iqk_rxk_setting(rtwdev, path); in _iqk_by_path()
1503 _adc_fifo_rst(rtwdev, phy_idx, path); in _iqk_by_path()
1506 if (iqk_info->iqk_band[path] == RTW89_BAND_2G) in _iqk_by_path()
1507 iqk_info->iqk_rx_fail[0][path] = in _iqk_by_path()
1508 _iqk_2g_nbrxk(rtwdev, phy_idx, path); in _iqk_by_path()
1510 iqk_info->iqk_rx_fail[0][path] = in _iqk_by_path()
1511 _iqk_5g_nbrxk(rtwdev, phy_idx, path); in _iqk_by_path()
1513 if (iqk_info->iqk_band[path] == RTW89_BAND_2G) in _iqk_by_path()
1514 iqk_info->iqk_rx_fail[0][path] = in _iqk_by_path()
1515 _rxk_2g_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1517 iqk_info->iqk_rx_fail[0][path] = in _iqk_by_path()
1518 _rxk_5g_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1582 u8 path, enum rtw89_chanctx_idx chanctx_idx) in _iqk_get_ch_info() argument
1588 iqk_info->iqk_band[path] = chan->band_type; in _iqk_get_ch_info()
1589 iqk_info->iqk_bw[path] = chan->band_width; in _iqk_get_ch_info()
1590 iqk_info->iqk_ch[path] = chan->channel; in _iqk_get_ch_info()
1591 iqk_info->iqk_table_idx[path] = idx; in _iqk_get_ch_info()
1594 path, phy, rtwdev->dbcc_en ? "on" : "off", in _iqk_get_ch_info()
1595 iqk_info->iqk_band[path] == 0 ? "2G" : in _iqk_get_ch_info()
1596 iqk_info->iqk_band[path] == 1 ? "5G" : "6G", in _iqk_get_ch_info()
1597 iqk_info->iqk_ch[path], in _iqk_get_ch_info()
1598 iqk_info->iqk_bw[path] == 0 ? "20M" : in _iqk_get_ch_info()
1599 iqk_info->iqk_bw[path] == 1 ? "40M" : "80M"); in _iqk_get_ch_info()
1603 path, iqk_info->syn1to2); in _iqk_get_ch_info()
1607 u8 path) in _iqk_start_iqk() argument
1609 _iqk_by_path(rtwdev, phy_idx, path); in _iqk_start_iqk()
1612 static void _iqk_restore(struct rtw89_dev *rtwdev, u8 path) in _iqk_restore() argument
1620 fail = _iqk_check_cal(rtwdev, path); in _iqk_restore()
1632 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_afebb_restore() argument
1637 static void _iqk_preset(struct rtw89_dev *rtwdev, u8 path) in _iqk_preset() argument
1641 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _iqk_preset()
1647 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_macbb_setting() argument
1653 _txck_force(rtwdev, path, true, DAC_960M); in _iqk_macbb_setting()
1657 _rxck_force(rtwdev, path, true, ADC_1920M); in _iqk_macbb_setting()
1665 u8 idx, path; in _iqk_init() local
1684 for (path = 0; path < RF_PATH_NUM_8851B; path++) { in _iqk_init()
1685 iqk_info->lok_cor_fail[idx][path] = false; in _iqk_init()
1686 iqk_info->lok_fin_fail[idx][path] = false; in _iqk_init()
1687 iqk_info->iqk_tx_fail[idx][path] = false; in _iqk_init()
1688 iqk_info->iqk_rx_fail[idx][path] = false; in _iqk_init()
1689 iqk_info->iqk_table_idx[path] = 0x0; in _iqk_init()
1695 enum rtw89_phy_idx phy_idx, u8 path, in _doiqk() argument
1712 _iqk_get_ch_info(rtwdev, phy_idx, path, chanctx_idx); in _doiqk()
1715 _rfk_backup_rf_reg(rtwdev, &backup_rf_val[path][0], path); in _doiqk()
1716 _iqk_macbb_setting(rtwdev, phy_idx, path); in _doiqk()
1717 _iqk_preset(rtwdev, path); in _doiqk()
1718 _iqk_start_iqk(rtwdev, phy_idx, path); in _doiqk()
1719 _iqk_restore(rtwdev, path); in _doiqk()
1720 _iqk_afebb_restore(rtwdev, phy_idx, path); in _doiqk()
1722 _rfk_restore_rf_reg(rtwdev, &backup_rf_val[path][0], path); in _doiqk()
1735 u32 reg_bkup[][DPK_KIP_REG_NUM_8851B], u8 path) in _dpk_bkup_kip() argument
1740 reg_bkup[path][i] = in _dpk_bkup_kip()
1741 rtw89_phy_read32_mask(rtwdev, reg[i] + (path << 8), MASKDWORD); in _dpk_bkup_kip()
1744 reg[i] + (path << 8), reg_bkup[path][i]); in _dpk_bkup_kip()
1749 u32 rf_bkup[][DPK_RF_REG_NUM_8851B], u8 path) in _dpk_bkup_rf() argument
1754 rf_bkup[path][i] = rtw89_read_rf(rtwdev, path, rf_reg[i], RFREG_MASK); in _dpk_bkup_rf()
1757 path, rf_reg[i], rf_bkup[path][i]); in _dpk_bkup_rf()
1762 u32 reg_bkup[][DPK_KIP_REG_NUM_8851B], u8 path) in _dpk_reload_kip() argument
1767 rtw89_phy_write32_mask(rtwdev, reg[i] + (path << 8), MASKDWORD, in _dpk_reload_kip()
1768 reg_bkup[path][i]); in _dpk_reload_kip()
1772 reg[i] + (path << 8), reg_bkup[path][i]); in _dpk_reload_kip()
1777 u32 rf_bkup[][DPK_RF_REG_NUM_8851B], u8 path) in _dpk_reload_rf() argument
1782 rtw89_write_rf(rtwdev, path, rf_reg[i], RFREG_MASK, rf_bkup[path][i]); in _dpk_reload_rf()
1785 "[DPK] Reload RF S%d 0x%x = %x\n", path, in _dpk_reload_rf()
1786 rf_reg[i], rf_bkup[path][i]); in _dpk_reload_rf()
1791 enum rtw89_rf_path path, enum dpk_id id) in _dpk_one_shot() argument
1797 dpk_cmd = ((id << 8) | (0x19 + path * 0x12)); in _dpk_one_shot()
1830 static void _dpk_onoff(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _dpk_onoff() argument
1834 u8 kidx = dpk->cur_idx[path]; in _dpk_onoff()
1838 val = dpk->is_dpk_enable * off_reverse * dpk->bp[path][kidx].path_ok; in _dpk_onoff()
1840 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_onoff()
1843 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] DPK %s !!!\n", path, in _dpk_onoff()
1847 static void _dpk_init(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_init() argument
1851 u8 kidx = dpk->cur_idx[path]; in _dpk_init()
1853 dpk->bp[path][kidx].path_ok = 0; in _dpk_init()
1857 enum rtw89_rf_path path, enum rtw89_chanctx_idx chanctx_idx) in _dpk_information() argument
1862 u8 kidx = dpk->cur_idx[path]; in _dpk_information()
1864 dpk->bp[path][kidx].band = chan->band_type; in _dpk_information()
1865 dpk->bp[path][kidx].ch = chan->band_width; in _dpk_information()
1866 dpk->bp[path][kidx].bw = chan->channel; in _dpk_information()
1870 path, dpk->cur_idx[path], phy, in _dpk_information()
1871 rtwdev->is_tssi_mode[path] ? "on" : "off", in _dpk_information()
1873 dpk->bp[path][kidx].band == 0 ? "2G" : in _dpk_information()
1874 dpk->bp[path][kidx].band == 1 ? "5G" : "6G", in _dpk_information()
1875 dpk->bp[path][kidx].ch, in _dpk_information()
1876 dpk->bp[path][kidx].bw == 0 ? "20M" : in _dpk_information()
1877 dpk->bp[path][kidx].bw == 1 ? "40M" : in _dpk_information()
1878 dpk->bp[path][kidx].bw == 2 ? "80M" : "160M"); in _dpk_information()
1881 static void _dpk_rxagc_onoff(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _dpk_rxagc_onoff() argument
1884 if (path == RF_PATH_A) in _dpk_rxagc_onoff()
1889 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d RXAGC is %s\n", path, in _dpk_rxagc_onoff()
1893 static void _dpk_bb_afe_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_bb_afe_setting() argument
1895 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(16 + path), 0x1); in _dpk_bb_afe_setting()
1896 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(20 + path), 0x0); in _dpk_bb_afe_setting()
1897 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(24 + path), 0x1); in _dpk_bb_afe_setting()
1898 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(28 + path), 0x0); in _dpk_bb_afe_setting()
1899 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), MASKDWORD, 0xd801dffd); in _dpk_bb_afe_setting()
1901 _txck_force(rtwdev, path, true, DAC_960M); in _dpk_bb_afe_setting()
1902 _rxck_force(rtwdev, path, true, ADC_1920M); in _dpk_bb_afe_setting()
1917 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(20 + path), 0x1); in _dpk_bb_afe_setting()
1918 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(28 + path), 0x1); in _dpk_bb_afe_setting()
1920 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d BB/AFE setting\n", path); in _dpk_bb_afe_setting()
1923 static void _dpk_bb_afe_restore(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_bb_afe_restore() argument
1925 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x0); in _dpk_bb_afe_restore()
1926 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(16 + path), 0x1); in _dpk_bb_afe_restore()
1927 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(20 + path), 0x0); in _dpk_bb_afe_restore()
1928 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(24 + path), 0x1); in _dpk_bb_afe_restore()
1929 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(28 + path), 0x0); in _dpk_bb_afe_restore()
1930 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), MASKDWORD, 0x00000000); in _dpk_bb_afe_restore()
1931 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), B_P0_TXCK_ALL, 0x00); in _dpk_bb_afe_restore()
1932 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(16 + path), 0x0); in _dpk_bb_afe_restore()
1933 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(24 + path), 0x0); in _dpk_bb_afe_restore()
1935 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d BB/AFE restore\n", path); in _dpk_bb_afe_restore()
1938 static void _dpk_tssi_pause(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _dpk_tssi_pause() argument
1941 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _dpk_tssi_pause()
1944 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d TSSI %s\n", path, in _dpk_tssi_pause()
1949 void _dpk_tssi_slope_k_onoff(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _dpk_tssi_slope_k_onoff() argument
1952 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_SLOPE_CAL + (path << 13), in _dpk_tssi_slope_k_onoff()
1955 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d TSSI slpoe_k %s\n", path, in _dpk_tssi_slope_k_onoff()
1959 static void _dpk_tpg_sel(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_tpg_sel() argument
1963 if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80) { in _dpk_tpg_sel()
1966 } else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40) { in _dpk_tpg_sel()
1975 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80 ? "80M" : in _dpk_tpg_sel()
1976 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40 ? "40M" : "20M"); in _dpk_tpg_sel()
1980 enum rtw89_rf_path path, bool force) in _dpk_txpwr_bb_force() argument
1982 rtw89_phy_write32_mask(rtwdev, R_TXPWRB + (path << 13), B_TXPWRB_ON, force); in _dpk_txpwr_bb_force()
1983 rtw89_phy_write32_mask(rtwdev, R_TXPWRB_H + (path << 13), B_TXPWRB_RDY, force); in _dpk_txpwr_bb_force()
1986 path, force ? "on" : "off"); in _dpk_txpwr_bb_force()
2002 enum rtw89_rf_path path, bool ctrl_by_kip) in _dpk_kip_control_rfc() argument
2004 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), in _dpk_kip_control_rfc()
2009 enum rtw89_rf_path path, u8 kidx) in _dpk_kip_preset() argument
2012 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); in _dpk_kip_preset()
2013 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_kip_preset()
2016 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_kip_preset()
2017 _dpk_one_shot(rtwdev, phy, path, D_KIP_PRESET); in _dpk_kip_preset()
2021 enum rtw89_rf_path path) in _dpk_kip_restore() argument
2023 _dpk_one_shot(rtwdev, phy, path, D_KIP_RESTORE); in _dpk_kip_restore()
2024 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_kip_restore()
2025 _dpk_txpwr_bb_force(rtwdev, path, false); in _dpk_kip_restore()
2027 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d restore KIP\n", path); in _dpk_kip_restore()
2030 static void _dpk_kset_query(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_kset_query() argument
2034 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), B_KIP_RPT_SEL, 0x10); in _dpk_kset_query()
2037 rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), B_RPT_PER_KSET) - 1; in _dpk_kset_query()
2040 static void _dpk_para_query(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_para_query() argument
2055 para = rtw89_phy_read32_mask(rtwdev, reg[kidx][cur_k_set] + (path << 8), in _dpk_para_query()
2058 dpk->bp[path][kidx].txagc_dpk = (para >> 10) & 0x3f; in _dpk_para_query()
2059 dpk->bp[path][kidx].ther_dpk = (para >> 26) & 0x3f; in _dpk_para_query()
2063 dpk->cur_k_set, dpk->bp[path][kidx].ther_dpk, in _dpk_para_query()
2064 dpk->bp[path][kidx].txagc_dpk); in _dpk_para_query()
2067 static bool _dpk_sync_check(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_sync_check() argument
2078 dpk->corr_idx[path][kidx] = corr_idx; in _dpk_sync_check()
2079 dpk->corr_val[path][kidx] = corr_val; in _dpk_sync_check()
2091 path, corr_idx, corr_val, dc_i, dc_q); in _dpk_sync_check()
2093 dpk->dc_i[path][kidx] = dc_i; in _dpk_sync_check()
2094 dpk->dc_q[path][kidx] = dc_q; in _dpk_sync_check()
2104 path, rxbb, in _dpk_sync_check()
2115 enum rtw89_rf_path path, u8 dbm, in _dpk_kip_set_txagc() argument
2122 "[DPK] set S%d txagc to %ddBm\n", path, dbm); in _dpk_kip_set_txagc()
2123 rtw89_phy_write32_mask(rtwdev, R_TXPWRB + (path << 13), in _dpk_kip_set_txagc()
2127 _dpk_one_shot(rtwdev, phy, path, D_TXAGC); in _dpk_kip_set_txagc()
2128 _dpk_kset_query(rtwdev, path); in _dpk_kip_set_txagc()
2132 enum rtw89_rf_path path, u8 kidx) in _dpk_kip_set_rxagc() argument
2134 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_kip_set_rxagc()
2136 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); in _dpk_kip_set_rxagc()
2137 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_kip_set_rxagc()
2139 _dpk_one_shot(rtwdev, phy, path, D_RXAGC); in _dpk_kip_set_rxagc()
2140 return _dpk_sync_check(rtwdev, path, kidx); in _dpk_kip_set_rxagc()
2144 enum rtw89_rf_path path) in _dpk_lbk_rxiqk() argument
2149 rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), B_DPD_LBK, 0x1); in _dpk_lbk_rxiqk()
2152 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_lbk_rxiqk()
2154 cur_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_RXB); in _dpk_lbk_rxiqk()
2155 rf_11 = rtw89_read_rf(rtwdev, path, RR_TXIG, RFREG_MASK); in _dpk_lbk_rxiqk()
2156 reg_81cc = rtw89_phy_read32_mask(rtwdev, R_KIP_IQP + (path << 8), in _dpk_lbk_rxiqk()
2159 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); in _dpk_lbk_rxiqk()
2160 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x3); in _dpk_lbk_rxiqk()
2161 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0xd); in _dpk_lbk_rxiqk()
2162 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RXB, 0x1f); in _dpk_lbk_rxiqk()
2164 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_IQSW, 0x12); in _dpk_lbk_rxiqk()
2165 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_SW, 0x3); in _dpk_lbk_rxiqk()
2167 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_lbk_rxiqk()
2171 _dpk_one_shot(rtwdev, phy, path, LBK_RXIQK); in _dpk_lbk_rxiqk()
2173 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d LBK RXIQC = 0x%x\n", path, in _dpk_lbk_rxiqk()
2174 rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD)); in _dpk_lbk_rxiqk()
2176 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_lbk_rxiqk()
2178 rtw89_write_rf(rtwdev, path, RR_TXIG, RFREG_MASK, rf_11); in _dpk_lbk_rxiqk()
2179 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RXB, cur_rxbb); in _dpk_lbk_rxiqk()
2180 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_SW, reg_81cc); in _dpk_lbk_rxiqk()
2184 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_DI, 0x1); in _dpk_lbk_rxiqk()
2186 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_lbk_rxiqk()
2189 static void _dpk_rf_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_rf_setting() argument
2193 if (dpk->bp[path][kidx].band == RTW89_BAND_2G) { in _dpk_rf_setting()
2194 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, 0x50521); in _dpk_rf_setting()
2195 rtw89_write_rf(rtwdev, path, RR_MOD_V1, RR_MOD_MASK, RF_DPK); in _dpk_rf_setting()
2196 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTC, 0x0); in _dpk_rf_setting()
2197 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTR, 0x7); in _dpk_rf_setting()
2199 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _dpk_rf_setting()
2201 rtw89_write_rf(rtwdev, path, RR_MOD_V1, RR_MOD_MASK, RF_DPK); in _dpk_rf_setting()
2202 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RAA2_SATT, 0x3); in _dpk_rf_setting()
2205 rtw89_write_rf(rtwdev, path, RR_RCKD, RR_RCKD_BW, 0x1); in _dpk_rf_setting()
2206 rtw89_write_rf(rtwdev, path, RR_BTC, RR_BTC_TXBB, dpk->bp[path][kidx].bw + 1); in _dpk_rf_setting()
2207 rtw89_write_rf(rtwdev, path, RR_BTC, RR_BTC_RXBB, 0x0); in _dpk_rf_setting()
2208 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_EBW, 0x0); in _dpk_rf_setting()
2211 static void _dpk_bypass_rxiqc(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_bypass_rxiqc() argument
2213 rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), B_DPD_LBK, 0x1); in _dpk_bypass_rxiqc()
2214 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, 0x40000002); in _dpk_bypass_rxiqc()
2245 enum rtw89_rf_path path, u8 kidx) in _dpk_gainloss() argument
2247 _dpk_one_shot(rtwdev, phy, path, D_GAIN_LOSS); in _dpk_gainloss()
2248 _dpk_kip_set_txagc(rtwdev, phy, path, 0xff, false); in _dpk_gainloss()
2250 rtw89_phy_write32_mask(rtwdev, R_DPK_GL + (path << 8), B_DPK_GL_A1, 0xf078); in _dpk_gainloss()
2251 rtw89_phy_write32_mask(rtwdev, R_DPK_GL + (path << 8), B_DPK_GL_A0, 0x0); in _dpk_gainloss()
2303 enum rtw89_rf_path path, u8 kidx, u8 init_xdbm, u8 loss_only) in _dpk_agc() argument
2317 is_fail = _dpk_kip_set_rxagc(rtwdev, phy, path, kidx); in _dpk_agc()
2327 _dpk_one_shot(rtwdev, phy, path, D_SYNC); in _dpk_agc()
2332 if (dpk->bp[path][kidx].band == RTW89_BAND_2G) in _dpk_agc()
2333 _dpk_bypass_rxiqc(rtwdev, path); in _dpk_agc()
2335 _dpk_lbk_rxiqk(rtwdev, phy, path); in _dpk_agc()
2341 tmp_gl_idx = _dpk_gainloss(rtwdev, phy, path, kidx); in _dpk_agc()
2361 _dpk_kip_set_txagc(rtwdev, phy, path, tmp_dbm, true); in _dpk_agc()
2374 _dpk_kip_set_txagc(rtwdev, phy, path, tmp_dbm, true); in _dpk_agc()
2381 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_agc()
2382 tmp_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_RXB); in _dpk_agc()
2385 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RXB, tmp_rxbb); in _dpk_agc()
2390 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_agc()
2442 enum rtw89_rf_path path, u8 kidx) in _dpk_idl_mpa() argument
2454 _dpk_one_shot(rtwdev, phy, path, D_MDPK_IDL); in _dpk_idl_mpa()
2485 enum rtw89_rf_path path, u8 kidx, bool is_execute) in _dpk_gain_normalize() argument
2500 rtw89_phy_write32_mask(rtwdev, R_DPK_GN + (path << 8), in _dpk_gain_normalize()
2502 rtw89_phy_write32_mask(rtwdev, R_DPK_GN + (path << 8), in _dpk_gain_normalize()
2505 _dpk_one_shot(rtwdev, phy, path, D_GAIN_NORM); in _dpk_gain_normalize()
2507 rtw89_phy_write32_mask(rtwdev, reg[kidx][cur_k_set] + (path << 8), in _dpk_gain_normalize()
2511 dpk->bp[path][kidx].gs = in _dpk_gain_normalize()
2512 rtw89_phy_read32_mask(rtwdev, reg[kidx][cur_k_set] + (path << 8), in _dpk_gain_normalize()
2517 enum rtw89_rf_path path, u8 kidx) in _dpk_on() argument
2521 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x1); in _dpk_on()
2522 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x0); in _dpk_on()
2523 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_on()
2526 dpk->bp[path][kidx].path_ok = in _dpk_on()
2527 dpk->bp[path][kidx].path_ok | BIT(dpk->cur_k_set); in _dpk_on()
2530 path, kidx, dpk->bp[path][kidx].path_ok); in _dpk_on()
2532 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_on()
2533 B_DPD_MEN, dpk->bp[path][kidx].path_ok); in _dpk_on()
2535 _dpk_gain_normalize(rtwdev, phy, path, kidx, false); in _dpk_on()
2539 enum rtw89_rf_path path) in _dpk_main() argument
2542 u8 kidx = dpk->cur_idx[path]; in _dpk_main()
2546 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_main()
2547 _rfk_rf_direct_cntrl(rtwdev, path, false); in _dpk_main()
2548 rtw89_write_rf(rtwdev, path, RR_BBDC, RFREG_MASK, 0x03ffd); in _dpk_main()
2550 _dpk_rf_setting(rtwdev, path, kidx); in _dpk_main()
2551 _set_rx_dck(rtwdev, path, RF_DPK); in _dpk_main()
2554 _dpk_kip_preset(rtwdev, phy, path, kidx); in _dpk_main()
2555 _dpk_txpwr_bb_force(rtwdev, path, true); in _dpk_main()
2556 _dpk_kip_set_txagc(rtwdev, phy, path, init_xdbm, true); in _dpk_main()
2557 _dpk_tpg_sel(rtwdev, path, kidx); in _dpk_main()
2558 is_fail = _dpk_agc(rtwdev, phy, path, kidx, init_xdbm, false); in _dpk_main()
2562 _dpk_idl_mpa(rtwdev, phy, path, kidx); in _dpk_main()
2563 _dpk_para_query(rtwdev, path, kidx); in _dpk_main()
2565 _dpk_on(rtwdev, phy, path, kidx); in _dpk_main()
2567 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_main()
2568 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RF_RX); in _dpk_main()
2570 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d]_K%d %s\n", path, kidx, in _dpk_main()
2584 u8 path; in _dpk_cal_select() local
2586 for (path = 0; path < RF_PATH_NUM_8851B; path++) in _dpk_cal_select()
2587 dpk->cur_idx[path] = 0; in _dpk_cal_select()
2589 for (path = 0; path < RF_PATH_NUM_8851B; path++) { in _dpk_cal_select()
2590 if (!(kpath & BIT(path))) in _dpk_cal_select()
2592 _dpk_bkup_kip(rtwdev, dpk_kip_reg, kip_bkup, path); in _dpk_cal_select()
2593 _dpk_bkup_rf(rtwdev, dpk_rf_reg, rf_bkup, path); in _dpk_cal_select()
2594 _dpk_information(rtwdev, phy, path, chanctx_idx); in _dpk_cal_select()
2595 _dpk_init(rtwdev, path); in _dpk_cal_select()
2597 if (rtwdev->is_tssi_mode[path]) in _dpk_cal_select()
2598 _dpk_tssi_pause(rtwdev, path, true); in _dpk_cal_select()
2601 for (path = 0; path < RF_PATH_NUM_8851B; path++) { in _dpk_cal_select()
2602 if (!(kpath & BIT(path))) in _dpk_cal_select()
2607 path, dpk->cur_idx[path]); in _dpk_cal_select()
2609 _dpk_tssi_slope_k_onoff(rtwdev, path, false); in _dpk_cal_select()
2610 _dpk_rxagc_onoff(rtwdev, path, false); in _dpk_cal_select()
2611 _rfk_drf_direct_cntrl(rtwdev, path, false); in _dpk_cal_select()
2612 _dpk_bb_afe_setting(rtwdev, path); in _dpk_cal_select()
2614 is_fail = _dpk_main(rtwdev, phy, path); in _dpk_cal_select()
2615 _dpk_onoff(rtwdev, path, is_fail); in _dpk_cal_select()
2618 for (path = 0; path < RF_PATH_NUM_8851B; path++) { in _dpk_cal_select()
2619 if (!(kpath & BIT(path))) in _dpk_cal_select()
2622 _dpk_kip_restore(rtwdev, phy, path); in _dpk_cal_select()
2623 _dpk_reload_kip(rtwdev, dpk_kip_reg, kip_bkup, path); in _dpk_cal_select()
2624 _dpk_reload_rf(rtwdev, dpk_rf_reg, rf_bkup, path); in _dpk_cal_select()
2625 _dpk_bb_afe_restore(rtwdev, path); in _dpk_cal_select()
2626 _dpk_rxagc_onoff(rtwdev, path, true); in _dpk_cal_select()
2627 _dpk_tssi_slope_k_onoff(rtwdev, path, true); in _dpk_cal_select()
2628 if (rtwdev->is_tssi_mode[path]) in _dpk_cal_select()
2629 _dpk_tssi_pause(rtwdev, path, false); in _dpk_cal_select()
2651 u8 path, kidx; in _dpk_track() local
2655 for (path = 0; path < RF_PATH_NUM_8851B; path++) { in _dpk_track()
2656 kidx = dpk->cur_idx[path]; in _dpk_track()
2660 path, kidx, dpk->bp[path][kidx].ch); in _dpk_track()
2662 txagc_rf = rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), in _dpk_track()
2664 txagc_bb = rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), in _dpk_track()
2666 txagc_bb_tp = rtw89_phy_read32_mask(rtwdev, R_TXAGC_BTP + (path << 13), in _dpk_track()
2669 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), in _dpk_track()
2671 cur_ther = rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), in _dpk_track()
2673 txagc_ofst = rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), in _dpk_track()
2675 pwsf_tssi_ofst = rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), in _dpk_track()
2679 delta_ther = cur_ther - dpk->bp[path][kidx].ther_dpk; in _dpk_track()
2685 delta_ther, cur_ther, dpk->bp[path][kidx].ther_dpk); in _dpk_track()
2689 txagc_rf - dpk->bp[path][kidx].txagc_dpk, in _dpk_track()
2690 txagc_rf, dpk->bp[path][kidx].txagc_dpk); in _dpk_track()
2706 R_DPD_BND + (path << 8) + (kidx << 2), in _dpk_track()
2712 static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _rck() argument
2719 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] ====== S%d RCK ======\n", path); in _rck()
2721 rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); in _rck()
2723 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rck()
2724 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); in _rck()
2727 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); in _rck()
2730 rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, 0x00240); in _rck()
2733 false, rtwdev, path, RR_RCKS, BIT(3)); in _rck()
2735 rck_val = rtw89_read_rf(rtwdev, path, RR_RCKC, RR_RCKC_CA); in _rck()
2740 rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, rck_val); in _rck()
2741 rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); in _rck()
2744 rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK)); in _rck()
2748 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_set_sys() argument
2761 enum rtw89_rf_path path) in _tssi_ini_txpwr_ctrl_bb() argument
2768 enum rtw89_rf_path path) in _tssi_ini_txpwr_ctrl_bb_he_tb() argument
2774 enum rtw89_rf_path path) in _tssi_set_dck() argument
2780 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_set_tmeter_tbl() argument
2823 if (path == RF_PATH_A) { in _tssi_set_tmeter_tbl()
2878 enum rtw89_rf_path path) in _tssi_set_dac_gain_tbl() argument
2884 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_slope_cal_org() argument
2894 enum rtw89_rf_path path, bool all, in _tssi_alignment_default() argument
2905 enum rtw89_rf_path path) in _tssi_set_tssi_slope() argument
2911 enum rtw89_rf_path path) in _tssi_set_tssi_track() argument
2918 enum rtw89_rf_path path) in _tssi_set_txagc_offset_mv_avg() argument
3072 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_get_ofdm_de() argument
3084 "[TSSI][TRIM]: path=%d mcs group_idx=0x%x\n", path, gidx); in _tssi_get_ofdm_de()
3089 de_1st = tssi_info->tssi_mcs[path][gidx_1st]; in _tssi_get_ofdm_de()
3090 de_2nd = tssi_info->tssi_mcs[path][gidx_2nd]; in _tssi_get_ofdm_de()
3094 "[TSSI][TRIM]: path=%d mcs de=%d 1st=%d 2nd=%d\n", in _tssi_get_ofdm_de()
3095 path, val, de_1st, de_2nd); in _tssi_get_ofdm_de()
3097 val = tssi_info->tssi_mcs[path][gidx]; in _tssi_get_ofdm_de()
3100 "[TSSI][TRIM]: path=%d mcs de=%d\n", path, val); in _tssi_get_ofdm_de()
3107 enum rtw89_rf_path path, const struct rtw89_chan *chan) in _tssi_get_ofdm_trim_de() argument
3119 "[TSSI][TRIM]: path=%d mcs trim_group_idx=0x%x\n", in _tssi_get_ofdm_trim_de()
3120 path, tgidx); in _tssi_get_ofdm_trim_de()
3125 tde_1st = tssi_info->tssi_trim[path][tgidx_1st]; in _tssi_get_ofdm_trim_de()
3126 tde_2nd = tssi_info->tssi_trim[path][tgidx_2nd]; in _tssi_get_ofdm_trim_de()
3130 "[TSSI][TRIM]: path=%d mcs trim_de=%d 1st=%d 2nd=%d\n", in _tssi_get_ofdm_trim_de()
3131 path, val, tde_1st, tde_2nd); in _tssi_get_ofdm_trim_de()
3133 val = tssi_info->tssi_trim[path][tgidx]; in _tssi_get_ofdm_trim_de()
3136 "[TSSI][TRIM]: path=%d mcs trim_de=%d\n", in _tssi_get_ofdm_trim_de()
3137 path, val); in _tssi_get_ofdm_trim_de()
3163 "[TSSI][TRIM]: path=%d cck[%d]=0x%x trim=0x%x\n", in _tssi_set_efuse_to_de()
3180 "[TSSI][TRIM]: path=%d mcs=0x%x trim=0x%x\n", in _tssi_set_efuse_to_de()
3198 static void _tssi_alimentk_dump_result(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _tssi_alimentk_dump_result() argument
3203 R_TSSI_PA_K1 + (path << 13), in _tssi_alimentk_dump_result()
3204 rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K1 + (path << 13), MASKDWORD), in _tssi_alimentk_dump_result()
3205 R_TSSI_PA_K2 + (path << 13), in _tssi_alimentk_dump_result()
3206 rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K2 + (path << 13), MASKDWORD), in _tssi_alimentk_dump_result()
3207 R_P0_TSSI_ALIM1 + (path << 13), in _tssi_alimentk_dump_result()
3208 rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD), in _tssi_alimentk_dump_result()
3209 R_P0_TSSI_ALIM3 + (path << 13), in _tssi_alimentk_dump_result()
3210 rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD), in _tssi_alimentk_dump_result()
3211 R_TSSI_PA_K5 + (path << 13), in _tssi_alimentk_dump_result()
3212 rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K5 + (path << 13), MASKDWORD), in _tssi_alimentk_dump_result()
3213 R_P0_TSSI_ALIM2 + (path << 13), in _tssi_alimentk_dump_result()
3214 rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD), in _tssi_alimentk_dump_result()
3215 R_P0_TSSI_ALIM4 + (path << 13), in _tssi_alimentk_dump_result()
3216 rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD), in _tssi_alimentk_dump_result()
3217 R_TSSI_PA_K8 + (path << 13), in _tssi_alimentk_dump_result()
3218 rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K8 + (path << 13), MASKDWORD)); in _tssi_alimentk_dump_result()
3222 enum rtw89_phy_idx phy, enum rtw89_rf_path path, in _tssi_alimentk_done() argument
3230 "======>%s phy=%d path=%d\n", __func__, phy, path); in _tssi_alimentk_done()
3243 if (tssi_info->alignment_done[path][band]) { in _tssi_alimentk_done()
3244 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD, in _tssi_alimentk_done()
3245 tssi_info->alignment_value[path][band][0]); in _tssi_alimentk_done()
3246 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD, in _tssi_alimentk_done()
3247 tssi_info->alignment_value[path][band][1]); in _tssi_alimentk_done()
3248 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD, in _tssi_alimentk_done()
3249 tssi_info->alignment_value[path][band][2]); in _tssi_alimentk_done()
3250 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD, in _tssi_alimentk_done()
3251 tssi_info->alignment_value[path][band][3]); in _tssi_alimentk_done()
3254 _tssi_alimentk_dump_result(rtwdev, path); in _tssi_alimentk_done()
3320 "[LCK] path=%d thermal=0x%x", RF_PATH_A, lck->thermal[RF_PATH_A]); in _lck_keep_thermal()
3357 "[LCK] path=%d current thermal=0x%x delta=0x%x\n", in rtw8851b_lck_track()
3532 static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _bw_setting() argument
3540 rf_reg18 = rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK); in _bw_setting()
3543 "[RFK]Invalid RF_0x18 for Path-%d\n", path); in _bw_setting()
3567 rtw89_write_rf(rtwdev, path, reg18_addr, RFREG_MASK, rf_reg18); in _bw_setting()
3569 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK] set %x at path%d, %x =0x%x\n", in _bw_setting()
3570 bw, path, reg18_addr, in _bw_setting()
3571 rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK)); in _bw_setting()
3658 static void _ch_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _ch_setting() argument
3667 rf_reg18 = rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK); in _ch_setting()
3680 if (path == RF_PATH_A && dav) in _ch_setting()
3683 rtw89_write_rf(rtwdev, path, reg18_addr, RFREG_MASK, rf_reg18); in _ch_setting()
3685 rtw89_write_rf(rtwdev, path, RR_LCKST, RR_LCKST_BIN, 0); in _ch_setting()
3686 rtw89_write_rf(rtwdev, path, RR_LCKST, RR_LCKST_BIN, 1); in _ch_setting()
3689 "[RFK]CH: %d for Path-%d, reg0x%x = 0x%x\n", in _ch_setting()
3690 central_ch, path, reg18_addr, in _ch_setting()
3691 rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK)); in _ch_setting()
3701 enum rtw89_rf_path path) in _set_rxbb_bw() argument
3703 rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x1); in _set_rxbb_bw()
3704 rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_M2, 0x12); in _set_rxbb_bw()
3707 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0x1b); in _set_rxbb_bw()
3709 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0x13); in _set_rxbb_bw()
3711 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0xb); in _set_rxbb_bw()
3713 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0x3); in _set_rxbb_bw()
3715 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK] set S%d RXBB BW 0x3F = 0x%x\n", path, in _set_rxbb_bw()
3716 rtw89_read_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB)); in _set_rxbb_bw()
3718 rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x0); in _set_rxbb_bw()
3724 u8 kpath, path; in _rxbb_bw() local
3728 for (path = 0; path < RF_PATH_NUM_8851B; path++) { in _rxbb_bw()
3729 if (!(kpath & BIT(path))) in _rxbb_bw()
3732 _set_rxbb_bw(rtwdev, bw, path); in _rxbb_bw()