Lines Matching +full:csi +full:- +full:no +full:- +full:ss
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
19 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy0_phy1_offset()
21 return phy->phy0_phy1_offset(rtwdev, addr); in rtw89_phy0_phy1_offset()
27 u32 bit_rate = report->bit_rate; in get_max_amsdu_len()
34 if (report->might_fallback_legacy) in get_max_amsdu_len()
37 /* lower than 20M vht 2ss mcs8, make it small */ in get_max_amsdu_len()
41 /* lower than 40M vht 2ss mcs9, make it medium */ in get_max_amsdu_len()
45 /* not yet 80M vht 2ss mcs8/9, make it twice regular packet size */ in get_max_amsdu_len()
49 return rtwdev->chip->max_amsdu_limit; in get_max_amsdu_len()
65 ra_mask |= GENMASK_ULL(highest_mcs - gap, 0) << nss; in get_mcs_ra_mask()
68 ra_mask |= GENMASK_ULL(highest_mcs - gap * 2, 0) << nss; in get_mcs_ra_mask()
80 struct ieee80211_sta_he_cap cap = link_sta->he_cap; in get_he_ra_mask()
83 switch (link_sta->bandwidth) { in get_he_ra_mask()
123 struct ieee80211_sta_eht_cap *eht_cap = &link_sta->eht_cap; in get_eht_ra_mask()
126 u8 *he_phy_cap = link_sta->he_cap.he_cap_elem.phy_cap_info; in get_eht_ra_mask()
128 switch (link_sta->bandwidth) { in get_eht_ra_mask()
130 mcs_nss = &eht_cap->eht_mcs_nss_supp.bw._320; in get_eht_ra_mask()
132 return get_eht_mcs_ra_mask(mcs_nss->rx_tx_max_nss, 9, 3); in get_eht_ra_mask()
134 mcs_nss = &eht_cap->eht_mcs_nss_supp.bw._160; in get_eht_ra_mask()
136 return get_eht_mcs_ra_mask(mcs_nss->rx_tx_max_nss, 9, 3); in get_eht_ra_mask()
140 mcs_nss_20mhz = &eht_cap->eht_mcs_nss_supp.only_20mhz; in get_eht_ra_mask()
142 return get_eht_mcs_ra_mask(mcs_nss_20mhz->rx_tx_max_nss, 7, 4); in get_eht_ra_mask()
147 mcs_nss = &eht_cap->eht_mcs_nss_supp.bw._80; in get_eht_ra_mask()
149 return get_eht_mcs_ra_mask(mcs_nss->rx_tx_max_nss, 9, 3); in get_eht_ra_mask()
203 struct cfg80211_bitrate_mask *mask = &rtwsta_link->mask; in rtw89_phy_ra_mask_cfg()
207 if (!rtwsta_link->use_cfg_mask) in rtw89_phy_ra_mask_cfg()
208 return -1; in rtw89_phy_ra_mask_cfg()
210 switch (chan->band_type) { in rtw89_phy_ra_mask_cfg()
213 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_2GHZ].legacy, in rtw89_phy_ra_mask_cfg()
218 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_5GHZ].legacy, in rtw89_phy_ra_mask_cfg()
223 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_6GHZ].legacy, in rtw89_phy_ra_mask_cfg()
227 rtw89_warn(rtwdev, "unhandled band type %d\n", chan->band_type); in rtw89_phy_ra_mask_cfg()
228 return -1; in rtw89_phy_ra_mask_cfg()
231 if (link_sta->he_cap.has_he) { in rtw89_phy_ra_mask_cfg()
232 cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[0], in rtw89_phy_ra_mask_cfg()
234 cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[1], in rtw89_phy_ra_mask_cfg()
236 } else if (link_sta->vht_cap.vht_supported) { in rtw89_phy_ra_mask_cfg()
237 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0], in rtw89_phy_ra_mask_cfg()
239 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1], in rtw89_phy_ra_mask_cfg()
241 } else if (link_sta->ht_cap.ht_supported) { in rtw89_phy_ra_mask_cfg()
242 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0], in rtw89_phy_ra_mask_cfg()
244 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1], in rtw89_phy_ra_mask_cfg()
269 struct cfg80211_bitrate_mask *mask = &rtwsta_link->mask; in rtw89_phy_ra_gi_ltf()
270 u8 band = chan->band_type; in rtw89_phy_ra_gi_ltf()
272 u8 he_gi = mask->control[nl_band].he_gi; in rtw89_phy_ra_gi_ltf()
273 u8 he_ltf = mask->control[nl_band].he_ltf; in rtw89_phy_ra_gi_ltf()
275 if (!rtwsta_link->use_cfg_mask) in rtw89_phy_ra_gi_ltf()
302 bool p2p, bool csi) in rtw89_phy_ra_sta_update() argument
304 struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif_link->rate_pattern; in rtw89_phy_ra_sta_update()
305 struct rtw89_ra_info *ra = &rtwsta_link->ra; in rtw89_phy_ra_sta_update()
307 rtwvif_link->chanctx_idx); in rtw89_phy_ra_sta_update()
309 u8 rssi = ewma_rssi_read(&rtwsta_link->avg_rssi); in rtw89_phy_ra_sta_update()
324 if (link_sta->eht_cap.has_eht) { in rtw89_phy_ra_sta_update()
328 } else if (link_sta->he_cap.has_he) { in rtw89_phy_ra_sta_update()
333 if (link_sta->he_cap.he_cap_elem.phy_cap_info[2] & in rtw89_phy_ra_sta_update()
336 if (link_sta->he_cap.he_cap_elem.phy_cap_info[1] & in rtw89_phy_ra_sta_update()
340 } else if (link_sta->vht_cap.vht_supported) { in rtw89_phy_ra_sta_update()
341 u16 mcs_map = le16_to_cpu(link_sta->vht_cap.vht_mcs.rx_mcs_map); in rtw89_phy_ra_sta_update()
345 /* MCS9 (non-20MHz), MCS8, MCS7 */ in rtw89_phy_ra_sta_update()
346 if (link_sta->bandwidth == IEEE80211_STA_RX_BW_20) in rtw89_phy_ra_sta_update()
351 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) in rtw89_phy_ra_sta_update()
353 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) in rtw89_phy_ra_sta_update()
355 } else if (link_sta->ht_cap.ht_supported) { in rtw89_phy_ra_sta_update()
358 ra_mask |= ((u64)link_sta->ht_cap.mcs.rx_mask[3] << 48) | in rtw89_phy_ra_sta_update()
359 ((u64)link_sta->ht_cap.mcs.rx_mask[2] << 36) | in rtw89_phy_ra_sta_update()
360 ((u64)link_sta->ht_cap.mcs.rx_mask[1] << 24) | in rtw89_phy_ra_sta_update()
361 ((u64)link_sta->ht_cap.mcs.rx_mask[0] << 12); in rtw89_phy_ra_sta_update()
363 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) in rtw89_phy_ra_sta_update()
365 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING) in rtw89_phy_ra_sta_update()
369 switch (chan->band_type) { in rtw89_phy_ra_sta_update()
371 ra_mask |= link_sta->supp_rates[NL80211_BAND_2GHZ]; in rtw89_phy_ra_sta_update()
372 if (link_sta->supp_rates[NL80211_BAND_2GHZ] & 0xf) in rtw89_phy_ra_sta_update()
374 if (link_sta->supp_rates[NL80211_BAND_2GHZ] & 0xff0) in rtw89_phy_ra_sta_update()
378 ra_mask |= (u64)link_sta->supp_rates[NL80211_BAND_5GHZ] << 4; in rtw89_phy_ra_sta_update()
382 ra_mask |= (u64)link_sta->supp_rates[NL80211_BAND_6GHZ] << 4; in rtw89_phy_ra_sta_update()
394 for (i = 0; i < rtwdev->hal.tx_nss; i++) in rtw89_phy_ra_sta_update()
411 switch (link_sta->bandwidth) { in rtw89_phy_ra_sta_update()
414 sgi = link_sta->vht_cap.vht_supported && in rtw89_phy_ra_sta_update()
415 (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160); in rtw89_phy_ra_sta_update()
419 sgi = link_sta->vht_cap.vht_supported && in rtw89_phy_ra_sta_update()
420 (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80); in rtw89_phy_ra_sta_update()
424 sgi = link_sta->ht_cap.ht_supported && in rtw89_phy_ra_sta_update()
425 (link_sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40); in rtw89_phy_ra_sta_update()
429 sgi = link_sta->ht_cap.ht_supported && in rtw89_phy_ra_sta_update()
430 (link_sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20); in rtw89_phy_ra_sta_update()
434 if (link_sta->he_cap.he_cap_elem.phy_cap_info[3] & in rtw89_phy_ra_sta_update()
436 ra->dcm_cap = 1; in rtw89_phy_ra_sta_update()
438 if (rate_pattern->enable && !p2p) { in rtw89_phy_ra_sta_update()
440 ra_mask &= rate_pattern->ra_mask; in rtw89_phy_ra_sta_update()
441 mode = rate_pattern->ra_mode; in rtw89_phy_ra_sta_update()
444 ra->bw_cap = bw_mode; in rtw89_phy_ra_sta_update()
445 ra->er_cap = rtwsta_link->er_cap; in rtw89_phy_ra_sta_update()
446 ra->mode_ctrl = mode; in rtw89_phy_ra_sta_update()
447 ra->macid = rtwsta_link->mac_id; in rtw89_phy_ra_sta_update()
448 ra->stbc_cap = stbc_en; in rtw89_phy_ra_sta_update()
449 ra->ldpc_cap = ldpc_en; in rtw89_phy_ra_sta_update()
450 ra->ss_num = min(link_sta->rx_nss, rtwdev->hal.tx_nss) - 1; in rtw89_phy_ra_sta_update()
451 ra->en_sgi = sgi; in rtw89_phy_ra_sta_update()
452 ra->ra_mask = ra_mask; in rtw89_phy_ra_sta_update()
453 ra->fix_giltf_en = fix_giltf_en; in rtw89_phy_ra_sta_update()
454 ra->fix_giltf = fix_giltf; in rtw89_phy_ra_sta_update()
456 if (!csi) in rtw89_phy_ra_sta_update()
459 ra->fixed_csi_rate_en = false; in rtw89_phy_ra_sta_update()
460 ra->ra_csi_rate_en = true; in rtw89_phy_ra_sta_update()
461 ra->cr_tbl_sel = false; in rtw89_phy_ra_sta_update()
462 ra->band_num = rtwvif_link->phy_idx; in rtw89_phy_ra_sta_update()
463 ra->csi_bw = bw_mode; in rtw89_phy_ra_sta_update()
464 ra->csi_gi_ltf = RTW89_GILTF_LGI_4XHE32; in rtw89_phy_ra_sta_update()
465 ra->csi_mcs_ss_idx = 5; in rtw89_phy_ra_sta_update()
466 ra->csi_mode = csi_mode; in rtw89_phy_ra_sta_update()
475 struct rtw89_ra_info *ra = &rtwsta_link->ra; in __rtw89_phy_ra_update_sta()
482 link_sta, vif->p2p, false); in __rtw89_phy_ra_update_sta()
487 ra->upd_mask = 1; in __rtw89_phy_ra_update_sta()
489 ra->upd_bw_nss_mask = 1; in __rtw89_phy_ra_update_sta()
493 ra->macid, in __rtw89_phy_ra_update_sta()
494 ra->bw_cap, in __rtw89_phy_ra_update_sta()
495 ra->ss_num, in __rtw89_phy_ra_update_sta()
496 ra->en_sgi, in __rtw89_phy_ra_update_sta()
497 ra->giltf); in __rtw89_phy_ra_update_sta()
511 rtwvif_link = rtwsta_link->rtwvif_link; in rtw89_phy_ra_update_sta()
532 if (next->enable) in __check_rate_pattern()
536 next->rate = rate_base + c; in __check_rate_pattern()
537 next->ra_mode = ra_mode; in __check_rate_pattern()
538 next->ra_mask = ra_mask; in __check_rate_pattern()
539 next->enable = true; in __check_rate_pattern()
558 rtwvif_link->chanctx_idx); in __rtw89_phy_rate_pattern_vif()
577 u8 band = chan->band_type; in __rtw89_phy_rate_pattern_vif()
579 enum rtw89_chip_gen chip_gen = rtwdev->chip->chip_gen; in __rtw89_phy_rate_pattern_vif()
580 u8 tx_nss = rtwdev->hal.tx_nss; in __rtw89_phy_rate_pattern_vif()
586 mask->control[nl_band].he_mcs[i], in __rtw89_phy_rate_pattern_vif()
593 mask->control[nl_band].vht_mcs[i], in __rtw89_phy_rate_pattern_vif()
600 mask->control[nl_band].ht_mcs[i], in __rtw89_phy_rate_pattern_vif()
608 sband = rtwdev->hw->wiphy->bands[nl_band]; in __rtw89_phy_rate_pattern_vif()
613 mask->control[nl_band].legacy, in __rtw89_phy_rate_pattern_vif()
614 BIT(sband->n_bitrates) - 1, false)) in __rtw89_phy_rate_pattern_vif()
619 mask->control[nl_band].legacy, in __rtw89_phy_rate_pattern_vif()
620 BIT(sband->n_bitrates) - 1, false)) in __rtw89_phy_rate_pattern_vif()
627 rtwvif_link->rate_pattern = next_pattern; in __rtw89_phy_rate_pattern_vif()
636 rtwvif_link->rate_pattern.enable = false; in __rtw89_phy_rate_pattern_vif()
661 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_ra_update()
668 struct rtw89_vif_link *rtwvif_link = rtwsta_link->rtwvif_link; in rtw89_phy_ra_assoc()
670 struct rtw89_ra_info *ra = &rtwsta_link->ra; in rtw89_phy_ra_assoc()
671 u8 rssi = ewma_rssi_read(&rtwsta_link->avg_rssi) >> RSSI_FACTOR; in rtw89_phy_ra_assoc()
673 bool csi; in rtw89_phy_ra_assoc() local
678 csi = rtw89_sta_has_beamformer_cap(link_sta); in rtw89_phy_ra_assoc()
681 link_sta, vif->p2p, csi); in rtw89_phy_ra_assoc()
686 ra->init_rate_lv = 1; in rtw89_phy_ra_assoc()
688 ra->init_rate_lv = 2; in rtw89_phy_ra_assoc()
690 ra->init_rate_lv = 3; in rtw89_phy_ra_assoc()
692 ra->init_rate_lv = 0; in rtw89_phy_ra_assoc()
693 ra->upd_all = 1; in rtw89_phy_ra_assoc()
696 ra->macid, in rtw89_phy_ra_assoc()
697 ra->mode_ctrl, in rtw89_phy_ra_assoc()
698 ra->bw_cap, in rtw89_phy_ra_assoc()
699 ra->ss_num, in rtw89_phy_ra_assoc()
700 ra->init_rate_lv); in rtw89_phy_ra_assoc()
703 ra->dcm_cap, in rtw89_phy_ra_assoc()
704 ra->er_cap, in rtw89_phy_ra_assoc()
705 ra->ldpc_cap, in rtw89_phy_ra_assoc()
706 ra->stbc_cap, in rtw89_phy_ra_assoc()
707 ra->en_sgi, in rtw89_phy_ra_assoc()
708 ra->giltf); in rtw89_phy_ra_assoc()
710 rtw89_fw_h2c_ra(rtwdev, ra, csi); in rtw89_phy_ra_assoc()
717 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_get_txsc()
718 u8 pri_ch = chan->primary_channel; in rtw89_phy_get_txsc()
719 u8 central_ch = chan->channel; in rtw89_phy_get_txsc()
733 txsc_idx = (pri_ch - central_ch) >> 1; in rtw89_phy_get_txsc()
735 txsc_idx = ((central_ch - pri_ch) >> 1) + 1; in rtw89_phy_get_txsc()
742 tmp = (pri_ch - central_ch) >> 1; in rtw89_phy_get_txsc()
744 tmp = ((central_ch - pri_ch) >> 1) + 1; in rtw89_phy_get_txsc()
766 txsc_idx = (10 - (pri_ch - central_ch)) >> 1; in rtw89_phy_get_txsc()
768 txsc_idx = ((central_ch - pri_ch) >> 1) + 5; in rtw89_phy_get_txsc()
786 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_get_txsb()
787 u8 pri_ch = chan->primary_channel; in rtw89_phy_get_txsb()
788 u8 central_ch = chan->channel; in rtw89_phy_get_txsb()
800 txsb_idx = (pri_ch - central_ch + 6) / 4; in rtw89_phy_get_txsb()
806 txsb_idx = (pri_ch - central_ch + 14) / 4; in rtw89_phy_get_txsb()
808 txsb_idx = (pri_ch - central_ch + 12) / 8; in rtw89_phy_get_txsb()
814 txsb_idx = (pri_ch - central_ch + 30) / 4; in rtw89_phy_get_txsb()
816 txsb_idx = (pri_ch - central_ch + 28) / 8; in rtw89_phy_get_txsb()
818 txsb_idx = (pri_ch - central_ch + 24) / 16; in rtw89_phy_get_txsb()
839 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_read_rf()
840 const u32 *base_addr = chip->rf_base_addr; in rtw89_phy_read_rf()
843 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf()
896 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf_v1()
961 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf_v2()
976 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_write_rf()
977 const u32 *base_addr = chip->rf_base_addr; in rtw89_phy_write_rf()
980 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf()
1040 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf_v1()
1100 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf_v2()
1114 return rtwdev->chip->ops->write_rf == rtw89_phy_write_rf_v1; in rtw89_chip_rf_v1()
1120 const struct rtw89_chip_info *chip = rtwdev->chip; in __rtw89_phy_bb_reset()
1122 chip->ops->bb_reset(rtwdev, phy_idx); in __rtw89_phy_bb_reset()
1128 if (rtwdev->dbcc_en) in rtw89_phy_bb_reset()
1139 if (reg->addr == 0xfe) { in rtw89_phy_config_bb_reg()
1141 } else if (reg->addr == 0xfd) { in rtw89_phy_config_bb_reg()
1143 } else if (reg->addr == 0xfc) { in rtw89_phy_config_bb_reg()
1145 } else if (reg->addr == 0xfb) { in rtw89_phy_config_bb_reg()
1147 } else if (reg->addr == 0xfa) { in rtw89_phy_config_bb_reg()
1149 } else if (reg->addr == 0xf9) { in rtw89_phy_config_bb_reg()
1151 } else if (reg->data == BYPASS_CR_DATA) { in rtw89_phy_config_bb_reg()
1152 rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "Bypass CR 0x%x\n", reg->addr); in rtw89_phy_config_bb_reg()
1154 addr = reg->addr; in rtw89_phy_config_bb_reg()
1157 addr += rtw89_phy0_phy1_offset(rtwdev, reg->addr); in rtw89_phy_config_bb_reg()
1159 rtw89_phy_write32(rtwdev, addr, reg->data); in rtw89_phy_config_bb_reg()
1183 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_gain_error()
1192 gain->lna_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
1196 gain->lna_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
1200 gain->tia_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
1222 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_rpl_ofst()
1233 gain->rpl_ofst_20[gband][path] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1237 gain->rpl_ofst_40[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1242 gain->rpl_ofst_40[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1248 gain->rpl_ofst_80[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1253 gain->rpl_ofst_80[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1259 gain->rpl_ofst_80[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1265 gain->rpl_ofst_160[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1270 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1276 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1282 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1288 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1304 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_gain_bypass()
1313 gain->lna_gain_bypass[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_bypass()
1317 gain->lna_gain_bypass[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_bypass()
1331 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_gain_op1db()
1340 gain->lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1344 gain->lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1348 gain->tia_lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1352 gain->tia_lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1367 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_config_bb_gain_ax()
1368 union rtw89_phy_bb_gain_arg arg = { .addr = reg->addr }; in rtw89_phy_config_bb_gain_ax()
1369 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw89_phy_config_bb_gain_ax()
1374 if (arg.path >= chip->rf_path_num) in rtw89_phy_config_bb_gain_ax()
1384 rtw89_phy_cfg_bb_gain_error(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1387 rtw89_phy_cfg_bb_rpl_ofst(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1390 rtw89_phy_cfg_bb_gain_bypass(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1393 rtw89_phy_cfg_bb_gain_op1db(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1397 if (efuse->rfe_type < 50) in rtw89_phy_config_bb_gain_ax()
1403 arg.addr, reg->data, arg.cfg_type); in rtw89_phy_config_bb_gain_ax()
1414 u16 idx = info->curr_idx % RTW89_H2C_RF_PAGE_SIZE; in rtw89_phy_cofig_rf_reg_store()
1415 u8 page = info->curr_idx / RTW89_H2C_RF_PAGE_SIZE; in rtw89_phy_cofig_rf_reg_store()
1419 rf_path, info->curr_idx); in rtw89_phy_cofig_rf_reg_store()
1423 info->rtw89_phy_config_rf_h2c[page][idx] = in rtw89_phy_cofig_rf_reg_store()
1424 cpu_to_le32((reg->addr << 20) | reg->data); in rtw89_phy_cofig_rf_reg_store()
1425 info->curr_idx++; in rtw89_phy_cofig_rf_reg_store()
1431 u16 remain = info->curr_idx; in rtw89_phy_config_rf_reg_fw()
1440 ret = -EINVAL; in rtw89_phy_config_rf_reg_fw()
1444 for (i = 0; i < RTW89_H2C_RF_PAGE_NUM && remain; i++, remain -= len) { in rtw89_phy_config_rf_reg_fw()
1451 info->curr_idx = 0; in rtw89_phy_config_rf_reg_fw()
1461 u32 addr = reg->addr; in rtw89_phy_config_rf_reg_noio()
1479 if (reg->addr == 0xfe) { in rtw89_phy_config_rf_reg()
1481 } else if (reg->addr == 0xfd) { in rtw89_phy_config_rf_reg()
1483 } else if (reg->addr == 0xfc) { in rtw89_phy_config_rf_reg()
1485 } else if (reg->addr == 0xfb) { in rtw89_phy_config_rf_reg()
1487 } else if (reg->addr == 0xfa) { in rtw89_phy_config_rf_reg()
1489 } else if (reg->addr == 0xf9) { in rtw89_phy_config_rf_reg()
1492 rtw89_write_rf(rtwdev, rf_path, reg->addr, 0xfffff, reg->data); in rtw89_phy_config_rf_reg()
1503 rtw89_write_rf(rtwdev, rf_path, reg->addr, RFREG_MASK, reg->data); in rtw89_phy_config_rf_reg_v1()
1505 if (reg->addr < 0x100) in rtw89_phy_config_rf_reg_v1()
1526 for (i = 0; i < table->n_regs; i++) { in rtw89_phy_sel_headline()
1527 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1528 headline = get_phy_headline(reg->addr); in rtw89_phy_sel_headline()
1539 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1540 target = get_phy_target(reg->addr); in rtw89_phy_sel_headline()
1550 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1551 target = get_phy_target(reg->addr); in rtw89_phy_sel_headline()
1560 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1561 rfe_para = get_phy_cond_rfe(reg->addr); in rtw89_phy_sel_headline()
1562 cv_para = get_phy_cond_cv(reg->addr); in rtw89_phy_sel_headline()
1577 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1578 rfe_para = get_phy_cond_rfe(reg->addr); in rtw89_phy_sel_headline()
1579 cv_para = get_phy_cond_cv(reg->addr); in rtw89_phy_sel_headline()
1592 return -EINVAL; in rtw89_phy_sel_headline()
1604 enum rtw89_rf_path rf_path = table->rf_path; in rtw89_phy_init_reg()
1605 u8 rfe = rtwdev->efuse.rfe_type; in rtw89_phy_init_reg()
1606 u8 cv = rtwdev->hal.cv; in rtw89_phy_init_reg()
1622 cfg_target = get_phy_target(table->regs[headline_idx].addr); in rtw89_phy_init_reg()
1623 for (i = headline_size; i < table->n_regs; i++) { in rtw89_phy_init_reg()
1624 reg = &table->regs[i]; in rtw89_phy_init_reg()
1625 cond = get_phy_cond(reg->addr); in rtw89_phy_init_reg()
1629 target = get_phy_target(reg->addr); in rtw89_phy_init_reg()
1635 reg->addr, reg->data); in rtw89_phy_init_reg()
1667 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_bb_reg()
1668 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_bb_reg()
1672 bb_table = elm_info->bb_tbl ? elm_info->bb_tbl : chip->bb_table; in rtw89_phy_init_bb_reg()
1674 if (rtwdev->dbcc_en) in rtw89_phy_init_bb_reg()
1680 bb_gain_table = elm_info->bb_gain ? elm_info->bb_gain : chip->bb_gain_table; in rtw89_phy_init_bb_reg()
1683 chip->phy_def->config_bb_gain, NULL); in rtw89_phy_init_bb_reg()
1699 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_rf_reg()
1700 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_rf_reg()
1709 for (path = RF_PATH_A; path < chip->rf_path_num; path++) { in rtw89_phy_init_rf_reg()
1710 rf_table = elm_info->rf_radio[path] ? in rtw89_phy_init_rf_reg()
1711 elm_info->rf_radio[path] : chip->rf_table[path]; in rtw89_phy_init_rf_reg()
1712 rf_reg_info->rf_path = rf_table->rf_path; in rtw89_phy_init_rf_reg()
1716 config = rf_table->config ? rf_table->config : in rtw89_phy_init_rf_reg()
1721 rf_reg_info->rf_path); in rtw89_phy_init_rf_reg()
1728 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_preinit_rf_nctl_ax()
1736 if (chip->chip_id != RTL8851B) in rtw89_phy_preinit_rf_nctl_ax()
1738 if (chip->chip_id == RTL8852B || chip->chip_id == RTL8852BT) in rtw89_phy_preinit_rf_nctl_ax()
1752 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_rf_nctl()
1753 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_rf_nctl()
1758 nctl_table = elm_info->rf_nctl ? elm_info->rf_nctl : chip->nctl_table; in rtw89_phy_init_rf_nctl()
1761 if (chip->nctl_post_table) in rtw89_phy_init_rf_nctl()
1762 rtw89_rfk_parser(rtwdev, chip->nctl_post_table); in rtw89_phy_init_rf_nctl()
1799 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_write32_idx()
1808 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_write32_idx_set()
1817 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_write32_idx_clr()
1826 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_read32_idx()
1837 if (!rtwdev->dbcc_en) in rtw89_phy_set_phy_regs()
1850 for (i = 0; i < tbl->size; i++) { in rtw89_phy_write_reg3_tbl()
1851 reg3 = &tbl->reg3[i]; in rtw89_phy_write_reg3_tbl()
1852 rtw89_phy_write32_mask(rtwdev, reg3->addr, reg3->mask, reg3->data); in rtw89_phy_write_reg3_tbl()
1877 switch (desc->rs) { in rtw89_phy_raw_byr_seek()
1879 return &head->cck[desc->idx]; in rtw89_phy_raw_byr_seek()
1881 return &head->ofdm[desc->idx]; in rtw89_phy_raw_byr_seek()
1883 return &head->mcs[desc->ofdma][desc->nss][desc->idx]; in rtw89_phy_raw_byr_seek()
1885 return &head->hedcm[desc->ofdma][desc->nss][desc->idx]; in rtw89_phy_raw_byr_seek()
1887 return &head->offset[desc->idx]; in rtw89_phy_raw_byr_seek()
1889 rtw89_warn(rtwdev, "unrecognized byr rs: %d\n", desc->rs); in rtw89_phy_raw_byr_seek()
1890 return &head->trap; in rtw89_phy_raw_byr_seek()
1897 const struct rtw89_txpwr_byrate_cfg *cfg = tbl->data; in rtw89_phy_load_txpwr_byrate()
1898 const struct rtw89_txpwr_byrate_cfg *end = cfg + tbl->size; in rtw89_phy_load_txpwr_byrate()
1906 byr_head = &rtwdev->byr[cfg->band][0]; in rtw89_phy_load_txpwr_byrate()
1907 desc.rs = cfg->rs; in rtw89_phy_load_txpwr_byrate()
1908 desc.nss = cfg->nss; in rtw89_phy_load_txpwr_byrate()
1909 data = cfg->data; in rtw89_phy_load_txpwr_byrate()
1911 for (i = 0; i < cfg->len; i++, data >>= 8) { in rtw89_phy_load_txpwr_byrate()
1912 desc.idx = cfg->shf + i; in rtw89_phy_load_txpwr_byrate()
1922 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_txpwr_rf_to_mac()
1924 return txpwr_rf >> (chip->txpwr_factor_rf - chip->txpwr_factor_mac); in rtw89_phy_txpwr_rf_to_mac()
1929 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_txpwr_dbm_to_mac()
1931 return clamp_t(s16, dbm << chip->txpwr_factor_mac, -64, 63); in rtw89_phy_txpwr_dbm_to_mac()
1940 dbm -= tssi_max_deviation; in rtw89_phy_txpwr_dbm_without_tolerance()
1947 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_get_tpe_constraint()
1948 const struct rtw89_reg_6ghz_tpe *tpe = ®ulatory->reg_6ghz_tpe; in rtw89_phy_get_tpe_constraint()
1951 if (band == RTW89_BAND_6G && tpe->valid) in rtw89_phy_get_tpe_constraint()
1952 cstr = rtw89_phy_txpwr_dbm_without_tolerance(tpe->constraint); in rtw89_phy_get_tpe_constraint()
1963 if (rate_desc->rs == RTW89_RS_CCK) in rtw89_phy_read_txpwr_byrate()
1966 byr_head = &rtwdev->byr[band][bw]; in rtw89_phy_read_txpwr_byrate()
1976 return (channel_6g - 1) / 2; in rtw89_channel_6g_to_idx()
1978 return (channel_6g - 3) / 2; in rtw89_channel_6g_to_idx()
1980 return (channel_6g - 5) / 2; in rtw89_channel_6g_to_idx()
1982 return (channel_6g - 7) / 2; in rtw89_channel_6g_to_idx()
1984 return (channel_6g - 9) / 2; in rtw89_channel_6g_to_idx()
1986 return (channel_6g - 11) / 2; in rtw89_channel_6g_to_idx()
1988 return (channel_6g - 13) / 2; in rtw89_channel_6g_to_idx()
1990 return (channel_6g - 15) / 2; in rtw89_channel_6g_to_idx()
2004 return channel - 1; in rtw89_channel_to_idx()
2006 return (channel - 36) / 2; in rtw89_channel_to_idx()
2008 return ((channel - 100) / 2) + 15; in rtw89_channel_to_idx()
2010 return ((channel - 149) / 2) + 38; in rtw89_channel_to_idx()
2020 const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; in rtw89_phy_read_txpwr_limit()
2021 const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; in rtw89_phy_read_txpwr_limit()
2022 const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; in rtw89_phy_read_txpwr_limit()
2023 const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; in rtw89_phy_read_txpwr_limit()
2024 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_read_txpwr_limit()
2029 u8 reg6 = regulatory->reg_6ghz_power; in rtw89_phy_read_txpwr_limit()
2035 lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; in rtw89_phy_read_txpwr_limit()
2039 lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit()
2042 lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; in rtw89_phy_read_txpwr_limit()
2046 lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit()
2049 lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][regd][reg6][ch_idx]; in rtw89_phy_read_txpwr_limit()
2053 lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][RTW89_WW] in rtw89_phy_read_txpwr_limit()
2085 __fill_txpwr_limit_nonbf_bf(lmt->cck_20m, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_20m_ax()
2087 __fill_txpwr_limit_nonbf_bf(lmt->cck_40m, band, RTW89_CHANNEL_WIDTH_40, in rtw89_phy_fill_txpwr_limit_20m_ax()
2089 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_20m_ax()
2091 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_20m_ax()
2100 __fill_txpwr_limit_nonbf_bf(lmt->cck_20m, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_40m_ax()
2101 ntx, RTW89_RS_CCK, ch - 2); in rtw89_phy_fill_txpwr_limit_40m_ax()
2102 __fill_txpwr_limit_nonbf_bf(lmt->cck_40m, band, RTW89_CHANNEL_WIDTH_40, in rtw89_phy_fill_txpwr_limit_40m_ax()
2104 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_40m_ax()
2106 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_40m_ax()
2108 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_40m_ax()
2109 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_40m_ax()
2112 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_40m_ax()
2125 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_80m_ax()
2127 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2129 ntx, RTW89_RS_MCS, ch - 6); in rtw89_phy_fill_txpwr_limit_80m_ax()
2130 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2132 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_80m_ax()
2133 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[2], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2136 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[3], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2139 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2141 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_80m_ax()
2142 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[1], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2145 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[0], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2150 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_80m_ax()
2155 lmt->mcs_40m_0p5[i] = min_t(s8, val_0p5_n[i], val_0p5_p[i]); in rtw89_phy_fill_txpwr_limit_80m_ax()
2169 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_160m_ax()
2173 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2175 ntx, RTW89_RS_MCS, ch - 14); in rtw89_phy_fill_txpwr_limit_160m_ax()
2176 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2178 ntx, RTW89_RS_MCS, ch - 10); in rtw89_phy_fill_txpwr_limit_160m_ax()
2179 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[2], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2181 ntx, RTW89_RS_MCS, ch - 6); in rtw89_phy_fill_txpwr_limit_160m_ax()
2182 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[3], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2184 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_160m_ax()
2185 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[4], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2188 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[5], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2191 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[6], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2194 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[7], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2199 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2201 ntx, RTW89_RS_MCS, ch - 12); in rtw89_phy_fill_txpwr_limit_160m_ax()
2202 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[1], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2204 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_160m_ax()
2205 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[2], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2208 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[3], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2213 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[0], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2215 ntx, RTW89_RS_MCS, ch - 8); in rtw89_phy_fill_txpwr_limit_160m_ax()
2216 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[1], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2221 __fill_txpwr_limit_nonbf_bf(lmt->mcs_160m, band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2227 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_160m_ax()
2232 lmt->mcs_40m_0p5[i] = min_t(s8, val_0p5_n[i], val_0p5_p[i]); in rtw89_phy_fill_txpwr_limit_160m_ax()
2236 ntx, RTW89_RS_MCS, ch - 8); in rtw89_phy_fill_txpwr_limit_160m_ax()
2241 lmt->mcs_40m_2p5[i] = min_t(s8, val_2p5_n[i], val_2p5_p[i]); in rtw89_phy_fill_txpwr_limit_160m_ax()
2250 u8 band = chan->band_type; in rtw89_phy_fill_txpwr_limit_ax()
2251 u8 pri_ch = chan->primary_channel; in rtw89_phy_fill_txpwr_limit_ax()
2252 u8 ch = chan->channel; in rtw89_phy_fill_txpwr_limit_ax()
2253 u8 bw = chan->band_width; in rtw89_phy_fill_txpwr_limit_ax()
2279 const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; in rtw89_phy_read_txpwr_limit_ru()
2280 const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; in rtw89_phy_read_txpwr_limit_ru()
2281 const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; in rtw89_phy_read_txpwr_limit_ru()
2282 const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; in rtw89_phy_read_txpwr_limit_ru()
2283 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_read_txpwr_limit_ru()
2288 u8 reg6 = regulatory->reg_6ghz_power; in rtw89_phy_read_txpwr_limit_ru()
2294 lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][regd][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2298 lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2301 lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][regd][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2305 lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2308 lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][regd][reg6][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2312 lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][RTW89_WW] in rtw89_phy_read_txpwr_limit_ru()
2333 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m_ax()
2336 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m_ax()
2339 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m_ax()
2349 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2351 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2352 lmt_ru->ru26[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2355 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2357 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2358 lmt_ru->ru52[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2361 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2363 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2364 lmt_ru->ru106[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2374 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2376 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2377 lmt_ru->ru26[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2379 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2380 lmt_ru->ru26[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2383 lmt_ru->ru26[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2386 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2388 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2389 lmt_ru->ru52[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2391 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2392 lmt_ru->ru52[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2395 lmt_ru->ru52[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2398 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2400 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2401 lmt_ru->ru106[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2403 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2404 lmt_ru->ru106[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2407 lmt_ru->ru106[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2417 static const int ofst[] = { -14, -10, -6, -2, 2, 6, 10, 14 }; in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2422 lmt_ru->ru26[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2426 lmt_ru->ru52[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2430 lmt_ru->ru106[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2443 u8 band = chan->band_type; in rtw89_phy_fill_txpwr_limit_ru_ax()
2444 u8 ch = chan->channel; in rtw89_phy_fill_txpwr_limit_ru_ax()
2445 u8 bw = chan->band_width; in rtw89_phy_fill_txpwr_limit_ru_ax()
2473 u8 max_nss_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_byrate_ax()
2481 u8 band = chan->band_type; in rtw89_phy_set_txpwr_byrate_ax()
2482 u8 ch = chan->channel; in rtw89_phy_set_txpwr_byrate_ax()
2534 u8 band = chan->band_type; in rtw89_phy_set_txpwr_offset_ax()
2558 u8 max_ntx_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_limit_ax()
2560 u8 ch = chan->channel; in rtw89_phy_set_txpwr_limit_ax()
2561 u8 bw = chan->band_width; in rtw89_phy_set_txpwr_limit_ax()
2593 u8 max_ntx_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_limit_ru_ax()
2595 u8 ch = chan->channel; in rtw89_phy_set_txpwr_limit_ru_ax()
2596 u8 bw = chan->band_width; in rtw89_phy_set_txpwr_limit_ru_ax()
2633 struct rtw89_dev *rtwdev = ra_data->rtwdev; in __rtw89_phy_c2h_ra_rpt_iter()
2635 (const struct rtw89_c2h_ra_rpt *)ra_data->c2h->data; in __rtw89_phy_c2h_ra_rpt_iter()
2636 struct rtw89_ra_report *ra_report = &rtwsta_link->ra_report; in __rtw89_phy_c2h_ra_rpt_iter()
2637 const struct rtw89_chip_info *chip = rtwdev->chip; in __rtw89_phy_c2h_ra_rpt_iter()
2638 bool format_v1 = chip->chip_gen == RTW89_CHIP_BE; in __rtw89_phy_c2h_ra_rpt_iter()
2645 mac_id = le32_get_bits(c2h->w2, RTW89_C2H_RA_RPT_W2_MACID); in __rtw89_phy_c2h_ra_rpt_iter()
2646 if (mac_id != rtwsta_link->mac_id) in __rtw89_phy_c2h_ra_rpt_iter()
2649 rate = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MCSNSS); in __rtw89_phy_c2h_ra_rpt_iter()
2650 bw = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_BW); in __rtw89_phy_c2h_ra_rpt_iter()
2651 giltf = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_GILTF); in __rtw89_phy_c2h_ra_rpt_iter()
2652 mode = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MD_SEL); in __rtw89_phy_c2h_ra_rpt_iter()
2655 t = le32_get_bits(c2h->w2, RTW89_C2H_RA_RPT_W2_MCSNSS_B7); in __rtw89_phy_c2h_ra_rpt_iter()
2657 t = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_BW_B2); in __rtw89_phy_c2h_ra_rpt_iter()
2659 t = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MD_SEL_B2); in __rtw89_phy_c2h_ra_rpt_iter()
2669 memset(&ra_report->txrate, 0, sizeof(ra_report->txrate)); in __rtw89_phy_c2h_ra_rpt_iter()
2673 ra_report->txrate.legacy = legacy_bitrate; in __rtw89_phy_c2h_ra_rpt_iter()
2676 ra_report->txrate.flags |= RATE_INFO_FLAGS_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
2677 if (RTW89_CHK_FW_FEATURE(OLD_HT_RA_FORMAT, &rtwdev->fw)) in __rtw89_phy_c2h_ra_rpt_iter()
2682 ra_report->txrate.mcs = rate; in __rtw89_phy_c2h_ra_rpt_iter()
2684 ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; in __rtw89_phy_c2h_ra_rpt_iter()
2685 mcs = ra_report->txrate.mcs & 0x07; in __rtw89_phy_c2h_ra_rpt_iter()
2688 ra_report->txrate.flags |= RATE_INFO_FLAGS_VHT_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
2689 ra_report->txrate.mcs = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2692 ra_report->txrate.nss = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2696 ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; in __rtw89_phy_c2h_ra_rpt_iter()
2697 mcs = ra_report->txrate.mcs; in __rtw89_phy_c2h_ra_rpt_iter()
2700 ra_report->txrate.flags |= RATE_INFO_FLAGS_HE_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
2701 ra_report->txrate.mcs = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2704 ra_report->txrate.nss = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2708 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_0_8; in __rtw89_phy_c2h_ra_rpt_iter()
2710 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_1_6; in __rtw89_phy_c2h_ra_rpt_iter()
2712 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_3_2; in __rtw89_phy_c2h_ra_rpt_iter()
2713 mcs = ra_report->txrate.mcs; in __rtw89_phy_c2h_ra_rpt_iter()
2716 ra_report->txrate.flags |= RATE_INFO_FLAGS_EHT_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
2717 ra_report->txrate.mcs = u8_get_bits(rate, RTW89_RA_RATE_MASK_MCS_V1); in __rtw89_phy_c2h_ra_rpt_iter()
2718 ra_report->txrate.nss = u8_get_bits(rate, RTW89_RA_RATE_MASK_NSS_V1) + 1; in __rtw89_phy_c2h_ra_rpt_iter()
2720 ra_report->txrate.eht_gi = NL80211_RATE_INFO_EHT_GI_0_8; in __rtw89_phy_c2h_ra_rpt_iter()
2722 ra_report->txrate.eht_gi = NL80211_RATE_INFO_EHT_GI_1_6; in __rtw89_phy_c2h_ra_rpt_iter()
2724 ra_report->txrate.eht_gi = NL80211_RATE_INFO_EHT_GI_3_2; in __rtw89_phy_c2h_ra_rpt_iter()
2725 mcs = ra_report->txrate.mcs; in __rtw89_phy_c2h_ra_rpt_iter()
2729 ra_report->txrate.bw = rtw89_hw_to_rate_info_bw(bw); in __rtw89_phy_c2h_ra_rpt_iter()
2730 ra_report->bit_rate = cfg80211_calculate_bitrate(&ra_report->txrate); in __rtw89_phy_c2h_ra_rpt_iter()
2731 ra_report->hw_rate = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2736 ra_report->might_fallback_legacy = mcs <= 2; in __rtw89_phy_c2h_ra_rpt_iter()
2737 link_sta->agg.max_rc_amsdu_len = get_max_amsdu_len(rtwdev, ra_report); in __rtw89_phy_c2h_ra_rpt_iter()
2738 rtwsta_link->max_agg_wait = link_sta->agg.max_rc_amsdu_len / 1500 - 1; in __rtw89_phy_c2h_ra_rpt_iter()
2766 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_c2h_ra_rpt()
2798 "[IQK] iqk->is_iqk_init = %x\n", iqk->is_iqk_init); in rtw89_phy_c2h_rfk_rpt_log()
2800 "[IQK] iqk->is_reload = %x\n", iqk->is_reload); in rtw89_phy_c2h_rfk_rpt_log()
2802 "[IQK] iqk->is_nbiqk = %x\n", iqk->is_nbiqk); in rtw89_phy_c2h_rfk_rpt_log()
2804 "[IQK] iqk->txiqk_en = %x\n", iqk->txiqk_en); in rtw89_phy_c2h_rfk_rpt_log()
2806 "[IQK] iqk->rxiqk_en = %x\n", iqk->rxiqk_en); in rtw89_phy_c2h_rfk_rpt_log()
2808 "[IQK] iqk->lok_en = %x\n", iqk->lok_en); in rtw89_phy_c2h_rfk_rpt_log()
2810 "[IQK] iqk->iqk_xym_en = %x\n", iqk->iqk_xym_en); in rtw89_phy_c2h_rfk_rpt_log()
2812 "[IQK] iqk->iqk_sram_en = %x\n", iqk->iqk_sram_en); in rtw89_phy_c2h_rfk_rpt_log()
2814 "[IQK] iqk->iqk_fft_en = %x\n", iqk->iqk_fft_en); in rtw89_phy_c2h_rfk_rpt_log()
2816 "[IQK] iqk->is_fw_iqk = %x\n", iqk->is_fw_iqk); in rtw89_phy_c2h_rfk_rpt_log()
2818 "[IQK] iqk->is_iqk_enable = %x\n", iqk->is_iqk_enable); in rtw89_phy_c2h_rfk_rpt_log()
2820 "[IQK] iqk->iqk_cfir_en = %x\n", iqk->iqk_cfir_en); in rtw89_phy_c2h_rfk_rpt_log()
2822 "[IQK] iqk->thermal_rek_en = %x\n", iqk->thermal_rek_en); in rtw89_phy_c2h_rfk_rpt_log()
2824 "[IQK] iqk->version = %x\n", iqk->version); in rtw89_phy_c2h_rfk_rpt_log()
2826 "[IQK] iqk->phy = %x\n", iqk->phy); in rtw89_phy_c2h_rfk_rpt_log()
2828 "[IQK] iqk->fwk_status = %x\n", iqk->fwk_status); in rtw89_phy_c2h_rfk_rpt_log()
2833 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_band[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
2834 i, iqk->iqk_band[i]); in rtw89_phy_c2h_rfk_rpt_log()
2835 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_ch[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
2836 i, iqk->iqk_ch[i]); in rtw89_phy_c2h_rfk_rpt_log()
2837 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_bw[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
2838 i, iqk->iqk_bw[i]); in rtw89_phy_c2h_rfk_rpt_log()
2839 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->lok_idac[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
2840 i, le32_to_cpu(iqk->lok_idac[i])); in rtw89_phy_c2h_rfk_rpt_log()
2841 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->lok_vbuf[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
2842 i, le32_to_cpu(iqk->lok_vbuf[i])); in rtw89_phy_c2h_rfk_rpt_log()
2843 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_tx_fail[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
2844 i, iqk->iqk_tx_fail[i]); in rtw89_phy_c2h_rfk_rpt_log()
2845 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_rx_fail[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
2846 i, iqk->iqk_rx_fail[i]); in rtw89_phy_c2h_rfk_rpt_log()
2849 "[IQK] iqk->rftxgain[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
2850 i, j, le32_to_cpu(iqk->rftxgain[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
2853 "[IQK] iqk->tx_xym[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
2854 i, j, le32_to_cpu(iqk->tx_xym[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
2857 "[IQK] iqk->rfrxgain[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
2858 i, j, le32_to_cpu(iqk->rfrxgain[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
2861 "[IQK] iqk->rx_xym[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
2862 i, j, le32_to_cpu(iqk->rx_xym[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
2872 dpk->ver, dpk->idx, dpk->band, dpk->bw, dpk->ch, dpk->path_ok); in rtw89_phy_c2h_rfk_rpt_log()
2875 dpk->txagc, dpk->ther, dpk->gs, dpk->dc_i, dpk->dc_q); in rtw89_phy_c2h_rfk_rpt_log()
2878 dpk->corr_val, dpk->corr_idx, dpk->is_timeout, dpk->rxbb_ov); in rtw89_phy_c2h_rfk_rpt_log()
2889 dack->fwdack_ver, dack->fwdack_info_ver, 0x2); in rtw89_phy_c2h_rfk_rpt_log()
2893 dack->addck_timeout, dack->cdack_timeout, dack->dadck_timeout, in rtw89_phy_c2h_rfk_rpt_log()
2894 dack->adgaink_timeout, dack->msbk_timeout); in rtw89_phy_c2h_rfk_rpt_log()
2896 "[DACK]DACK fail = 0x%x\n", dack->dack_fail); in rtw89_phy_c2h_rfk_rpt_log()
2898 "[DACK]S0 WBADCK = [0x%x]\n", dack->wbdck_d[0]); in rtw89_phy_c2h_rfk_rpt_log()
2900 "[DACK]S1 WBADCK = [0x%x]\n", dack->wbdck_d[1]); in rtw89_phy_c2h_rfk_rpt_log()
2902 "[DACK]DRCK = [0x%x]\n", dack->rck_d); in rtw89_phy_c2h_rfk_rpt_log()
2904 dack->cdack_d[0][0][0], dack->cdack_d[0][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
2906 dack->cdack_d[0][1][0], dack->cdack_d[0][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
2908 dack->cdack_d[1][0][0], dack->cdack_d[1][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
2910 dack->cdack_d[1][1][0], dack->cdack_d[1][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
2913 ((u32)dack->addck2_hd[0][0][0] << 8) | dack->addck2_ld[0][0][0], in rtw89_phy_c2h_rfk_rpt_log()
2914 ((u32)dack->addck2_hd[0][0][1] << 8) | dack->addck2_ld[0][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
2916 ((u32)dack->addck2_hd[0][1][0] << 8) | dack->addck2_ld[0][1][0], in rtw89_phy_c2h_rfk_rpt_log()
2917 ((u32)dack->addck2_hd[0][1][1] << 8) | dack->addck2_ld[0][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
2919 ((u32)dack->addck2_hd[1][0][0] << 8) | dack->addck2_ld[1][0][0], in rtw89_phy_c2h_rfk_rpt_log()
2920 ((u32)dack->addck2_hd[1][0][1] << 8) | dack->addck2_ld[1][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
2922 ((u32)dack->addck2_hd[1][1][0] << 8) | dack->addck2_ld[1][1][0], in rtw89_phy_c2h_rfk_rpt_log()
2923 ((u32)dack->addck2_hd[1][1][1] << 8) | dack->addck2_ld[1][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
2926 dack->adgaink_d[0][0], dack->adgaink_d[0][1]); in rtw89_phy_c2h_rfk_rpt_log()
2928 dack->adgaink_d[1][0], dack->adgaink_d[1][1]); in rtw89_phy_c2h_rfk_rpt_log()
2931 dack->dadck_d[0][0], dack->dadck_d[0][1]); in rtw89_phy_c2h_rfk_rpt_log()
2933 dack->dadck_d[1][0], dack->dadck_d[1][1]); in rtw89_phy_c2h_rfk_rpt_log()
2936 ((u32)dack->biask_hd[0][0] << 8) | dack->biask_ld[0][0]); in rtw89_phy_c2h_rfk_rpt_log()
2938 ((u32)dack->biask_hd[1][0] << 8) | dack->biask_ld[1][0]); in rtw89_phy_c2h_rfk_rpt_log()
2943 dack->msbk_d[0][0][i]); in rtw89_phy_c2h_rfk_rpt_log()
2948 dack->msbk_d[0][1][i]); in rtw89_phy_c2h_rfk_rpt_log()
2953 dack->msbk_d[1][0][i]); in rtw89_phy_c2h_rfk_rpt_log()
2958 dack->msbk_d[1][1][i]); in rtw89_phy_c2h_rfk_rpt_log()
2967 rxdck->ver, rxdck->band, rxdck->bw, rxdck->ch, in rtw89_phy_c2h_rfk_rpt_log()
2968 rxdck->timeout); in rtw89_phy_c2h_rfk_rpt_log()
2980 i, j, k, tssi->alignment_power_cw_h[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
2983 i, j, k, tssi->alignment_power_cw_l[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
2986 i, j, k, tssi->alignment_power[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
2990 (tssi->alignment_power_cw_h[i][j][k] << 8) + in rtw89_phy_c2h_rfk_rpt_log()
2991 tssi->alignment_power_cw_l[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
2996 i, j, tssi->tssi_alimk_state[i][j]); in rtw89_phy_c2h_rfk_rpt_log()
2999 j, tssi->default_txagc_offset[0][j]); in rtw89_phy_c2h_rfk_rpt_log()
3010 le32_to_cpu(txgapk->r0x8010[0]), in rtw89_phy_c2h_rfk_rpt_log()
3011 le32_to_cpu(txgapk->r0x8010[1])); in rtw89_phy_c2h_rfk_rpt_log()
3013 txgapk->chk_id); in rtw89_phy_c2h_rfk_rpt_log()
3015 le32_to_cpu(txgapk->chk_cnt)); in rtw89_phy_c2h_rfk_rpt_log()
3017 txgapk->ver); in rtw89_phy_c2h_rfk_rpt_log()
3019 txgapk->rsv1); in rtw89_phy_c2h_rfk_rpt_log()
3022 (int)sizeof(txgapk->track_d[0]), txgapk->track_d[0]); in rtw89_phy_c2h_rfk_rpt_log()
3024 (int)sizeof(txgapk->power_d[0]), txgapk->power_d[0]); in rtw89_phy_c2h_rfk_rpt_log()
3026 (int)sizeof(txgapk->track_d[1]), txgapk->track_d[1]); in rtw89_phy_c2h_rfk_rpt_log()
3028 (int)sizeof(txgapk->power_d[1]), txgapk->power_d[1]); in rtw89_phy_c2h_rfk_rpt_log()
3043 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_c2h_rfk_run_log()
3052 if (!elm_info->rfk_log_fmt) in rtw89_phy_c2h_rfk_run_log()
3055 elm = elm_info->rfk_log_fmt->elm[func]; in rtw89_phy_c2h_rfk_run_log()
3056 fmt_idx = le32_to_cpu(log->fmt_idx); in rtw89_phy_c2h_rfk_run_log()
3057 if (!elm || fmt_idx >= elm->u.rfk_log_fmt.nr) in rtw89_phy_c2h_rfk_run_log()
3060 offset = le16_to_cpu(elm->u.rfk_log_fmt.offset[fmt_idx]); in rtw89_phy_c2h_rfk_run_log()
3064 rtw89_debug(rtwdev, RTW89_DBG_RFK, &elm->u.common.contents[offset], in rtw89_phy_c2h_rfk_run_log()
3065 le32_to_cpu(log->arg[0]), le32_to_cpu(log->arg[1]), in rtw89_phy_c2h_rfk_run_log()
3066 le32_to_cpu(log->arg[2]), le32_to_cpu(log->arg[3])); in rtw89_phy_c2h_rfk_run_log()
3075 struct rtw89_c2h_hdr *c2h_hdr = (struct rtw89_c2h_hdr *)c2h->data; in rtw89_phy_c2h_rfk_log()
3086 len -= sizeof(*c2h_hdr); in rtw89_phy_c2h_rfk_log()
3090 content_len = le16_to_cpu(log_hdr->len); in rtw89_phy_c2h_rfk_log()
3096 switch (log_hdr->type) { in rtw89_phy_c2h_rfk_log()
3099 log_hdr->content, content_len); in rtw89_phy_c2h_rfk_log()
3104 rfk_name, content_len, log_hdr->content); in rtw89_phy_c2h_rfk_log()
3108 log_hdr->content, content_len); in rtw89_phy_c2h_rfk_log()
3115 len -= chunk_len; in rtw89_phy_c2h_rfk_log()
3175 struct rtw89_rfk_wait_info *wait = &rtwdev->rfk_wait; in rtw89_phy_rfk_report_prep()
3177 wait->state = RTW89_RFK_STATE_START; in rtw89_phy_rfk_report_prep()
3178 wait->start_time = ktime_get(); in rtw89_phy_rfk_report_prep()
3179 reinit_completion(&wait->completion); in rtw89_phy_rfk_report_prep()
3186 struct rtw89_rfk_wait_info *wait = &rtwdev->rfk_wait; in rtw89_phy_rfk_report_wait()
3190 if (test_bit(RTW89_FLAG_SER_HANDLING, rtwdev->flags)) { in rtw89_phy_rfk_report_wait()
3195 time_left = wait_for_completion_timeout(&wait->completion, in rtw89_phy_rfk_report_wait()
3199 return -ETIMEDOUT; in rtw89_phy_rfk_report_wait()
3200 } else if (wait->state != RTW89_RFK_STATE_OK) { in rtw89_phy_rfk_report_wait()
3202 rfk_name, wait->state); in rtw89_phy_rfk_report_wait()
3203 return -EFAULT; in rtw89_phy_rfk_report_wait()
3208 rfk_name, ktime_ms_delta(ktime_get(), wait->start_time)); in rtw89_phy_rfk_report_wait()
3217 (const struct rtw89_c2h_rfk_report *)c2h->data; in rtw89_phy_c2h_rfk_report_state()
3218 struct rtw89_rfk_wait_info *wait = &rtwdev->rfk_wait; in rtw89_phy_c2h_rfk_report_state()
3220 wait->state = report->state; in rtw89_phy_c2h_rfk_report_state()
3221 wait->version = report->version; in rtw89_phy_c2h_rfk_report_state()
3223 complete(&wait->completion); in rtw89_phy_c2h_rfk_report_state()
3227 wait->state, wait->version, in rtw89_phy_c2h_rfk_report_state()
3228 (int)(len - sizeof(report->hdr)), &report->state); in rtw89_phy_c2h_rfk_report_state()
3723 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in phy_tssi_get_ofdm_de()
3724 enum rtw89_band band = chan->band_type; in phy_tssi_get_ofdm_de()
3725 u8 ch = chan->channel; in phy_tssi_get_ofdm_de()
3745 de_1st = tssi_info->tssi_mcs[path][gidx_1st]; in phy_tssi_get_ofdm_de()
3746 de_2nd = tssi_info->tssi_mcs[path][gidx_2nd]; in phy_tssi_get_ofdm_de()
3753 val = tssi_info->tssi_mcs[path][gidx]; in phy_tssi_get_ofdm_de()
3771 de_1st = tssi_info->tssi_6g_mcs[path][gidx_1st]; in phy_tssi_get_ofdm_de()
3772 de_2nd = tssi_info->tssi_6g_mcs[path][gidx_2nd]; in phy_tssi_get_ofdm_de()
3779 val = tssi_info->tssi_6g_mcs[path][gidx]; in phy_tssi_get_ofdm_de()
3793 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in phy_tssi_get_ofdm_trim_de()
3794 enum rtw89_band band = chan->band_type; in phy_tssi_get_ofdm_trim_de()
3795 u8 ch = chan->channel; in phy_tssi_get_ofdm_trim_de()
3815 tde_1st = tssi_info->tssi_trim[path][tgidx_1st]; in phy_tssi_get_ofdm_trim_de()
3816 tde_2nd = tssi_info->tssi_trim[path][tgidx_2nd]; in phy_tssi_get_ofdm_trim_de()
3823 val = tssi_info->tssi_trim[path][tgidx]; in phy_tssi_get_ofdm_trim_de()
3842 tde_1st = tssi_info->tssi_trim_6g[path][tgidx_1st]; in phy_tssi_get_ofdm_trim_de()
3843 tde_2nd = tssi_info->tssi_trim_6g[path][tgidx_2nd]; in phy_tssi_get_ofdm_trim_de()
3850 val = tssi_info->tssi_trim_6g[path][tgidx]; in phy_tssi_get_ofdm_trim_de()
3865 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3866 u8 ch = chan->channel; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3879 h2c->curr_tssi_trim_de[i] = trim_de; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3885 cck_de = tssi_info->tssi_cck[i][gidx]; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3888 h2c->curr_tssi_cck_de[i] = 0x0; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3889 h2c->curr_tssi_cck_de_20m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3890 h2c->curr_tssi_cck_de_40m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3891 h2c->curr_tssi_efuse_cck_de[i] = cck_de; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3899 h2c->curr_tssi_ofdm_de[i] = 0x0; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3900 h2c->curr_tssi_ofdm_de_20m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3901 h2c->curr_tssi_ofdm_de_40m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3902 h2c->curr_tssi_ofdm_de_80m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3903 h2c->curr_tssi_ofdm_de_160m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3904 h2c->curr_tssi_ofdm_de_320m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3905 h2c->curr_tssi_efuse_ofdm_de[i] = ofdm_de; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
3917 struct rtw89_fw_txpwr_track_cfg *trk = rtwdev->fw.elm_info.txpwr_trk; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3918 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3921 u8 subband = chan->subband_type; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3930 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GA_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3931 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GA_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3932 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GB_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3933 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GB_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3936 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3937 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3938 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3939 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3942 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3943 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3944 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3945 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3948 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3949 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3950 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3951 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3955 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3956 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3957 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3958 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3962 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3963 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3964 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3965 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3969 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3970 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3971 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3972 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3976 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3977 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3978 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3979 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3987 thermal = tssi_info->thermal[path]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3992 h2c->pg_thermal[path] = 0x38; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3993 memset(h2c->ftable[path], 0, sizeof(h2c->ftable[path])); in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
3997 h2c->pg_thermal[path] = thermal; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4003 thm_up[path][DELTA_SWINGIDX_SIZE - 1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4006 for (j = 127; j >= 64; j--) in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4008 -thm_down[path][i++] : in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4009 -thm_down[path][DELTA_SWINGIDX_SIZE - 1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4012 h2c->ftable[path][i + 0] = thm_ofst[i + 3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4013 h2c->ftable[path][i + 1] = thm_ofst[i + 2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4014 h2c->ftable[path][i + 2] = thm_ofst[i + 1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4015 h2c->ftable[path][i + 3] = thm_ofst[i + 0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4027 const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info; in rtw89_phy_cfo_get_xcap_reg()
4031 reg_mask = xtal->sc_xo_mask; in rtw89_phy_cfo_get_xcap_reg()
4033 reg_mask = xtal->sc_xi_mask; in rtw89_phy_cfo_get_xcap_reg()
4035 return (u8)rtw89_read32_mask(rtwdev, xtal->xcap_reg, reg_mask); in rtw89_phy_cfo_get_xcap_reg()
4041 const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info; in rtw89_phy_cfo_set_xcap_reg()
4045 reg_mask = xtal->sc_xo_mask; in rtw89_phy_cfo_set_xcap_reg()
4047 reg_mask = xtal->sc_xi_mask; in rtw89_phy_cfo_set_xcap_reg()
4049 rtw89_write32_mask(rtwdev, xtal->xcap_reg, reg_mask, val); in rtw89_phy_cfo_set_xcap_reg()
4055 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_set_crystal_cap()
4056 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_cfo_set_crystal_cap()
4059 if (!force && cfo->crystal_cap == crystal_cap) in rtw89_phy_cfo_set_crystal_cap()
4062 if (chip->chip_id == RTL8852A || chip->chip_id == RTL8851B) { in rtw89_phy_cfo_set_crystal_cap()
4075 cfo->crystal_cap = sc_xi_val; in rtw89_phy_cfo_set_crystal_cap()
4076 cfo->x_cap_ofst = (s8)((int)cfo->crystal_cap - cfo->def_x_cap); in rtw89_phy_cfo_set_crystal_cap()
4081 cfo->x_cap_ofst); in rtw89_phy_cfo_set_crystal_cap()
4087 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_reset()
4090 cfo->def_x_cap = cfo->crystal_cap_default & B_AX_XTAL_SC_MASK; in rtw89_phy_cfo_reset()
4091 cfo->is_adjust = false; in rtw89_phy_cfo_reset()
4092 if (cfo->crystal_cap == cfo->def_x_cap) in rtw89_phy_cfo_reset()
4094 cap = cfo->crystal_cap; in rtw89_phy_cfo_reset()
4095 cap += (cap > cfo->def_x_cap ? -1 : 1); in rtw89_phy_cfo_reset()
4098 "(0x%x) approach to dflt_val=(0x%x)\n", cfo->crystal_cap, in rtw89_phy_cfo_reset()
4099 cfo->def_x_cap); in rtw89_phy_cfo_reset()
4104 const struct rtw89_reg_def *dcfo_comp = rtwdev->chip->dcfo_comp; in rtw89_dcfo_comp()
4105 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_dcfo_comp()
4110 if (rtwdev->chip->chip_id == RTL8922A) in rtw89_dcfo_comp()
4122 sign = curr_cfo > 0 ? 1 : -1; in rtw89_dcfo_comp()
4125 if (rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv == CHIP_CBV) in rtw89_dcfo_comp()
4126 cfo_avg_312 = -cfo_avg_312; in rtw89_dcfo_comp()
4127 rtw89_phy_set_phy_regs(rtwdev, dcfo_comp->addr, dcfo_comp->mask, in rtw89_dcfo_comp()
4133 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_dcfo_comp_init()
4134 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_dcfo_comp_init()
4135 const struct rtw89_cfo_regs *cfo = phy->cfo; in rtw89_dcfo_comp_init()
4137 rtw89_phy_set_phy_regs(rtwdev, cfo->comp_seg0, cfo->valid_0_mask, 1); in rtw89_dcfo_comp_init()
4138 rtw89_phy_set_phy_regs(rtwdev, cfo->comp, cfo->weighting_mask, 8); in rtw89_dcfo_comp_init()
4140 if (chip->chip_gen == RTW89_CHIP_AX) { in rtw89_dcfo_comp_init()
4141 if (chip->cfo_hw_comp) { in rtw89_dcfo_comp_init()
4154 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_init()
4155 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw89_phy_cfo_init()
4157 cfo->crystal_cap_default = efuse->xtal_cap & B_AX_XTAL_SC_MASK; in rtw89_phy_cfo_init()
4158 cfo->crystal_cap = cfo->crystal_cap_default; in rtw89_phy_cfo_init()
4159 cfo->def_x_cap = cfo->crystal_cap; in rtw89_phy_cfo_init()
4160 cfo->x_cap_ub = min_t(int, cfo->def_x_cap + CFO_BOUND, 0x7f); in rtw89_phy_cfo_init()
4161 cfo->x_cap_lb = max_t(int, cfo->def_x_cap - CFO_BOUND, 0x1); in rtw89_phy_cfo_init()
4162 cfo->is_adjust = false; in rtw89_phy_cfo_init()
4163 cfo->divergence_lock_en = false; in rtw89_phy_cfo_init()
4164 cfo->x_cap_ofst = 0; in rtw89_phy_cfo_init()
4165 cfo->lock_cnt = 0; in rtw89_phy_cfo_init()
4166 cfo->rtw89_multi_cfo_mode = RTW89_TP_BASED_AVG_MODE; in rtw89_phy_cfo_init()
4167 cfo->apply_compensation = false; in rtw89_phy_cfo_init()
4168 cfo->residual_cfo_acc = 0; in rtw89_phy_cfo_init()
4170 cfo->crystal_cap_default); in rtw89_phy_cfo_init()
4171 rtw89_phy_cfo_set_crystal_cap(rtwdev, cfo->crystal_cap_default, true); in rtw89_phy_cfo_init()
4173 cfo->cfo_timer_ms = 2000; in rtw89_phy_cfo_init()
4174 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_init()
4175 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_init()
4176 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_init()
4177 cfo->cfo_ul_ofdma_acc_mode = RTW89_CFO_UL_OFDMA_ACC_ENABLE; in rtw89_phy_cfo_init()
4183 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_crystal_cap_adjust()
4184 s8 crystal_cap = cfo->crystal_cap; in rtw89_phy_cfo_crystal_cap_adjust()
4192 if (!cfo->is_adjust) { in rtw89_phy_cfo_crystal_cap_adjust()
4194 cfo->is_adjust = true; in rtw89_phy_cfo_crystal_cap_adjust()
4197 cfo->is_adjust = false; in rtw89_phy_cfo_crystal_cap_adjust()
4199 if (!cfo->is_adjust) { in rtw89_phy_cfo_crystal_cap_adjust()
4203 sign = curr_cfo > 0 ? 1 : -1; in rtw89_phy_cfo_crystal_cap_adjust()
4217 cfo->crystal_cap, cfo->def_x_cap); in rtw89_phy_cfo_crystal_cap_adjust()
4222 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_average_cfo_calc()
4223 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_average_cfo_calc()
4229 if (rtwdev->total_sta_assoc != 1) in rtw89_phy_average_cfo_calc()
4233 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_average_cfo_calc()
4235 cfo_khz_all += cfo->cfo_tail[i]; in rtw89_phy_average_cfo_calc()
4236 cfo_cnt_all += cfo->cfo_cnt[i]; in rtw89_phy_average_cfo_calc()
4238 cfo->pre_cfo_avg[i] = cfo->cfo_avg[i]; in rtw89_phy_average_cfo_calc()
4239 cfo->dcfo_avg = phy_div(cfo_khz_all << chip->dcfo_comp_sft, in rtw89_phy_average_cfo_calc()
4252 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_multi_sta_cfo_calc()
4253 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_multi_sta_cfo_calc()
4268 if (cfo->rtw89_multi_cfo_mode == RTW89_PKT_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
4271 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_multi_sta_cfo_calc()
4273 cfo_khz_all += cfo->cfo_tail[i]; in rtw89_phy_multi_sta_cfo_calc()
4274 cfo_cnt_all += cfo->cfo_cnt[i]; in rtw89_phy_multi_sta_cfo_calc()
4281 } else if (cfo->rtw89_multi_cfo_mode == RTW89_ENTRY_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
4284 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_multi_sta_cfo_calc()
4286 cfo->cfo_avg[i] = phy_div(cfo->cfo_tail[i], in rtw89_phy_multi_sta_cfo_calc()
4287 (s32)cfo->cfo_cnt[i]); in rtw89_phy_multi_sta_cfo_calc()
4288 cfo_khz_all += cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4291 cfo->cfo_avg[i]); in rtw89_phy_multi_sta_cfo_calc()
4293 sta_cnt = rtwdev->total_sta_assoc; in rtw89_phy_multi_sta_cfo_calc()
4299 } else if (cfo->rtw89_multi_cfo_mode == RTW89_TP_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
4301 cfo_tol = cfo->sta_cfo_tolerance; in rtw89_phy_multi_sta_cfo_calc()
4304 if (cfo->cfo_cnt[i] != 0) { in rtw89_phy_multi_sta_cfo_calc()
4305 cfo->cfo_avg[i] = phy_div(cfo->cfo_tail[i], in rtw89_phy_multi_sta_cfo_calc()
4306 (s32)cfo->cfo_cnt[i]); in rtw89_phy_multi_sta_cfo_calc()
4309 cfo->cfo_avg[i] = cfo->pre_cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4311 max_cfo_lb = max(cfo->cfo_avg[i] - cfo_tol, max_cfo_lb); in rtw89_phy_multi_sta_cfo_calc()
4312 min_cfo_ub = min(cfo->cfo_avg[i] + cfo_tol, min_cfo_ub); in rtw89_phy_multi_sta_cfo_calc()
4313 cfo_khz_all += cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4317 i, cfo->cfo_avg[i]); in rtw89_phy_multi_sta_cfo_calc()
4318 if (sta_cnt >= rtwdev->total_sta_assoc) in rtw89_phy_multi_sta_cfo_calc()
4321 tp_all = stats->rx_throughput; /* need tp for each entry */ in rtw89_phy_multi_sta_cfo_calc()
4336 min_cfo_ub - max_cfo_lb); in rtw89_phy_multi_sta_cfo_calc()
4340 "No intersection of cfo tolerance windows\n"); in rtw89_phy_multi_sta_cfo_calc()
4344 cfo->pre_cfo_avg[i] = cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4352 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_statistics_reset()
4354 memset(&cfo->cfo_tail, 0, sizeof(cfo->cfo_tail)); in rtw89_phy_cfo_statistics_reset()
4355 memset(&cfo->cfo_cnt, 0, sizeof(cfo->cfo_cnt)); in rtw89_phy_cfo_statistics_reset()
4356 cfo->packet_count = 0; in rtw89_phy_cfo_statistics_reset()
4357 cfo->packet_count_pre = 0; in rtw89_phy_cfo_statistics_reset()
4358 cfo->cfo_avg_pre = 0; in rtw89_phy_cfo_statistics_reset()
4363 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_dm()
4366 u8 pre_x_cap = cfo->crystal_cap; in rtw89_phy_cfo_dm()
4367 u8 dcfo_comp_sft = rtwdev->chip->dcfo_comp_sft; in rtw89_phy_cfo_dm()
4369 cfo->dcfo_avg = 0; in rtw89_phy_cfo_dm()
4371 rtwdev->total_sta_assoc); in rtw89_phy_cfo_dm()
4372 if (rtwdev->total_sta_assoc == 0) { in rtw89_phy_cfo_dm()
4376 if (cfo->packet_count == 0) { in rtw89_phy_cfo_dm()
4380 if (cfo->packet_count == cfo->packet_count_pre) { in rtw89_phy_cfo_dm()
4384 if (rtwdev->total_sta_assoc == 1) in rtw89_phy_cfo_dm()
4388 if (cfo->divergence_lock_en) { in rtw89_phy_cfo_dm()
4389 cfo->lock_cnt++; in rtw89_phy_cfo_dm()
4390 if (cfo->lock_cnt > CFO_PERIOD_CNT) { in rtw89_phy_cfo_dm()
4391 cfo->divergence_lock_en = false; in rtw89_phy_cfo_dm()
4392 cfo->lock_cnt = 0; in rtw89_phy_cfo_dm()
4398 if (cfo->crystal_cap >= cfo->x_cap_ub || in rtw89_phy_cfo_dm()
4399 cfo->crystal_cap <= cfo->x_cap_lb) { in rtw89_phy_cfo_dm()
4400 cfo->divergence_lock_en = true; in rtw89_phy_cfo_dm()
4406 cfo->cfo_avg_pre = new_cfo; in rtw89_phy_cfo_dm()
4407 cfo->dcfo_avg_pre = cfo->dcfo_avg; in rtw89_phy_cfo_dm()
4408 x_cap_update = cfo->crystal_cap != pre_x_cap; in rtw89_phy_cfo_dm()
4410 rtw89_debug(rtwdev, RTW89_DBG_CFO, "Xcap: D:%x C:%x->%x, ofst=%d\n", in rtw89_phy_cfo_dm()
4411 cfo->def_x_cap, pre_x_cap, cfo->crystal_cap, in rtw89_phy_cfo_dm()
4412 cfo->x_cap_ofst); in rtw89_phy_cfo_dm()
4414 if (cfo->dcfo_avg > 0) in rtw89_phy_cfo_dm()
4415 cfo->dcfo_avg -= CFO_SW_COMP_FINE_TUNE << dcfo_comp_sft; in rtw89_phy_cfo_dm()
4417 cfo->dcfo_avg += CFO_SW_COMP_FINE_TUNE << dcfo_comp_sft; in rtw89_phy_cfo_dm()
4419 rtw89_dcfo_comp(rtwdev, cfo->dcfo_avg); in rtw89_phy_cfo_dm()
4427 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_track_work()
4429 mutex_lock(&rtwdev->mutex); in rtw89_phy_cfo_track_work()
4430 if (!cfo->cfo_trig_by_timer_en) in rtw89_phy_cfo_track_work()
4434 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->cfo_track_work, in rtw89_phy_cfo_track_work()
4435 msecs_to_jiffies(cfo->cfo_timer_ms)); in rtw89_phy_cfo_track_work()
4437 mutex_unlock(&rtwdev->mutex); in rtw89_phy_cfo_track_work()
4442 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_start_work()
4444 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->cfo_track_work, in rtw89_phy_cfo_start_work()
4445 msecs_to_jiffies(cfo->cfo_timer_ms)); in rtw89_phy_cfo_start_work()
4450 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_track()
4451 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_cfo_track()
4454 if (stats->rx_tf_periodic > CFO_TF_CNT_TH) in rtw89_phy_cfo_track()
4456 if (cfo->cfo_ul_ofdma_acc_mode == RTW89_CFO_UL_OFDMA_ACC_ENABLE && in rtw89_phy_cfo_track()
4460 switch (cfo->phy_cfo_status) { in rtw89_phy_cfo_track()
4462 if (stats->tx_throughput >= CFO_TP_UPPER) { in rtw89_phy_cfo_track()
4463 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_ENHANCE; in rtw89_phy_cfo_track()
4464 cfo->cfo_trig_by_timer_en = true; in rtw89_phy_cfo_track()
4465 cfo->cfo_timer_ms = CFO_COMP_PERIOD; in rtw89_phy_cfo_track()
4470 if (stats->tx_throughput <= CFO_TP_LOWER) in rtw89_phy_cfo_track()
4471 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
4473 cfo->phy_cfo_trk_cnt >= CFO_PERIOD_CNT) in rtw89_phy_cfo_track()
4474 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_HOLD; in rtw89_phy_cfo_track()
4476 cfo->phy_cfo_trk_cnt++; in rtw89_phy_cfo_track()
4478 if (cfo->phy_cfo_status == RTW89_PHY_DCFO_STATE_NORMAL) { in rtw89_phy_cfo_track()
4479 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
4480 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_track()
4484 if (stats->tx_throughput <= CFO_TP_LOWER) { in rtw89_phy_cfo_track()
4485 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
4486 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
4487 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_track()
4489 cfo->phy_cfo_trk_cnt++; in rtw89_phy_cfo_track()
4493 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
4494 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
4499 stats->tx_throughput, cfo->phy_cfo_status, in rtw89_phy_cfo_track()
4500 cfo->cfo_trig_by_timer_en, cfo->phy_cfo_trk_cnt, in rtw89_phy_cfo_track()
4501 ewma_thermal_read(&rtwdev->phystat.avg_thermal[0])); in rtw89_phy_cfo_track()
4502 if (cfo->cfo_trig_by_timer_en) in rtw89_phy_cfo_track()
4510 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_parse()
4511 u8 macid = phy_ppdu->mac_id; in rtw89_phy_cfo_parse()
4518 cfo->cfo_tail[macid] += cfo_val; in rtw89_phy_cfo_parse()
4519 cfo->cfo_cnt[macid]++; in rtw89_phy_cfo_parse()
4520 cfo->packet_count++; in rtw89_phy_cfo_parse()
4525 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_assoc()
4527 rtwvif_link->chanctx_idx); in rtw89_phy_ul_tb_assoc()
4528 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_assoc()
4530 if (!chip->ul_tb_waveform_ctrl) in rtw89_phy_ul_tb_assoc()
4533 rtwvif_link->def_tri_idx = in rtw89_phy_ul_tb_assoc()
4536 if (chip->chip_id == RTL8852B && rtwdev->hal.cv > CHIP_CBV) in rtw89_phy_ul_tb_assoc()
4537 rtwvif_link->dyn_tb_bedge_en = false; in rtw89_phy_ul_tb_assoc()
4538 else if (chan->band_type >= RTW89_BAND_5G && in rtw89_phy_ul_tb_assoc()
4539 chan->band_width >= RTW89_CHANNEL_WIDTH_40) in rtw89_phy_ul_tb_assoc()
4540 rtwvif_link->dyn_tb_bedge_en = true; in rtw89_phy_ul_tb_assoc()
4542 rtwvif_link->dyn_tb_bedge_en = false; in rtw89_phy_ul_tb_assoc()
4546 ul_tb_info->def_if_bandedge, rtwvif_link->def_tri_idx); in rtw89_phy_ul_tb_assoc()
4549 rtwvif_link->dyn_tb_bedge_en, ul_tb_info->dyn_tb_tri_en); in rtw89_phy_ul_tb_assoc()
4580 if (!rtwdev->chip->ul_tb_pwr_diff) in rtw89_phy_ofdma_power_diff()
4583 if (rtwvif_link->pwr_diff_en == rtwvif_link->pre_pwr_diff_en) { in rtw89_phy_ofdma_power_diff()
4584 rtwvif_link->pwr_diff_en = false; in rtw89_phy_ofdma_power_diff()
4588 rtwvif_link->pre_pwr_diff_en = rtwvif_link->pwr_diff_en; in rtw89_phy_ofdma_power_diff()
4589 param = &table[rtwvif_link->pwr_diff_en]; in rtw89_phy_ofdma_power_diff()
4592 param->q_00); in rtw89_phy_ofdma_power_diff()
4594 param->q_11); in rtw89_phy_ofdma_power_diff()
4596 B_CUSTOMIZE_Q_MATRIX_EN, param->q_matrix_en); in rtw89_phy_ofdma_power_diff()
4598 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_1T, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4600 param->ultb_1t_norm_160); in rtw89_phy_ofdma_power_diff()
4602 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_2T, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4604 param->ultb_2t_norm_160); in rtw89_phy_ofdma_power_diff()
4606 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PATH_COM1, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4608 param->com1_norm_1sts); in rtw89_phy_ofdma_power_diff()
4610 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PATH_COM2, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4612 param->com2_resp_1sts_path); in rtw89_phy_ofdma_power_diff()
4620 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_ul_tb_ctrl_check()
4623 if (rtwvif_link->wifi_role != RTW89_WIFI_ROLE_STATION) in rtw89_phy_ul_tb_ctrl_check()
4626 if (!vif->cfg.assoc) in rtw89_phy_ul_tb_ctrl_check()
4629 if (rtwdev->chip->ul_tb_waveform_ctrl) { in rtw89_phy_ul_tb_ctrl_check()
4630 if (stats->rx_tf_periodic > UL_TB_TF_CNT_L2H_TH) in rtw89_phy_ul_tb_ctrl_check()
4631 ul_tb_data->high_tf_client = true; in rtw89_phy_ul_tb_ctrl_check()
4632 else if (stats->rx_tf_periodic < UL_TB_TF_CNT_H2L_TH) in rtw89_phy_ul_tb_ctrl_check()
4633 ul_tb_data->low_tf_client = true; in rtw89_phy_ul_tb_ctrl_check()
4635 ul_tb_data->valid = true; in rtw89_phy_ul_tb_ctrl_check()
4636 ul_tb_data->def_tri_idx = rtwvif_link->def_tri_idx; in rtw89_phy_ul_tb_ctrl_check()
4637 ul_tb_data->dyn_tb_bedge_en = rtwvif_link->dyn_tb_bedge_en; in rtw89_phy_ul_tb_ctrl_check()
4646 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_waveform_ctrl()
4648 if (!rtwdev->chip->ul_tb_waveform_ctrl) in rtw89_phy_ul_tb_waveform_ctrl()
4651 if (ul_tb_data->dyn_tb_bedge_en) { in rtw89_phy_ul_tb_waveform_ctrl()
4652 if (ul_tb_data->high_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4656 } else if (ul_tb_data->low_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4658 ul_tb_info->def_if_bandedge); in rtw89_phy_ul_tb_waveform_ctrl()
4661 ul_tb_info->def_if_bandedge); in rtw89_phy_ul_tb_waveform_ctrl()
4665 if (ul_tb_info->dyn_tb_tri_en) { in rtw89_phy_ul_tb_waveform_ctrl()
4666 if (ul_tb_data->high_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4671 } else if (ul_tb_data->low_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4674 ul_tb_data->def_tri_idx); in rtw89_phy_ul_tb_waveform_ctrl()
4677 ul_tb_data->def_tri_idx); in rtw89_phy_ul_tb_waveform_ctrl()
4684 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_ctrl_track()
4690 if (!chip->ul_tb_waveform_ctrl && !chip->ul_tb_pwr_diff) in rtw89_phy_ul_tb_ctrl_track()
4693 if (rtwdev->total_sta_assoc != 1) in rtw89_phy_ul_tb_ctrl_track()
4708 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_info_init()
4709 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_info_init()
4711 if (!chip->ul_tb_waveform_ctrl) in rtw89_phy_ul_tb_info_init()
4714 ul_tb_info->dyn_tb_tri_en = true; in rtw89_phy_ul_tb_info_init()
4715 ul_tb_info->def_if_bandedge = in rtw89_phy_ul_tb_info_init()
4722 ewma_rssi_init(&antdiv_sts->cck_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
4723 ewma_rssi_init(&antdiv_sts->ofdm_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
4724 ewma_rssi_init(&antdiv_sts->non_legacy_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
4725 antdiv_sts->pkt_cnt_cck = 0; in rtw89_phy_antdiv_sts_instance_reset()
4726 antdiv_sts->pkt_cnt_ofdm = 0; in rtw89_phy_antdiv_sts_instance_reset()
4727 antdiv_sts->pkt_cnt_non_legacy = 0; in rtw89_phy_antdiv_sts_instance_reset()
4728 antdiv_sts->evm = 0; in rtw89_phy_antdiv_sts_instance_reset()
4735 if (rtw89_get_data_rate_mode(rtwdev, phy_ppdu->rate) == DATA_RATE_MODE_NON_HT) { in rtw89_phy_antdiv_sts_instance_add()
4736 if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6) { in rtw89_phy_antdiv_sts_instance_add()
4737 ewma_rssi_add(&stats->cck_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
4738 stats->pkt_cnt_cck++; in rtw89_phy_antdiv_sts_instance_add()
4740 ewma_rssi_add(&stats->ofdm_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
4741 stats->pkt_cnt_ofdm++; in rtw89_phy_antdiv_sts_instance_add()
4742 stats->evm += phy_ppdu->ofdm.evm_min; in rtw89_phy_antdiv_sts_instance_add()
4745 ewma_rssi_add(&stats->non_legacy_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
4746 stats->pkt_cnt_non_legacy++; in rtw89_phy_antdiv_sts_instance_add()
4747 stats->evm += phy_ppdu->ofdm.evm_min; in rtw89_phy_antdiv_sts_instance_add()
4753 if (stats->pkt_cnt_non_legacy >= stats->pkt_cnt_cck && in rtw89_phy_antdiv_sts_instance_get_rssi()
4754 stats->pkt_cnt_non_legacy >= stats->pkt_cnt_ofdm) in rtw89_phy_antdiv_sts_instance_get_rssi()
4755 return ewma_rssi_read(&stats->non_legacy_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
4756 else if (stats->pkt_cnt_ofdm >= stats->pkt_cnt_cck && in rtw89_phy_antdiv_sts_instance_get_rssi()
4757 stats->pkt_cnt_ofdm >= stats->pkt_cnt_non_legacy) in rtw89_phy_antdiv_sts_instance_get_rssi()
4758 return ewma_rssi_read(&stats->ofdm_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
4760 return ewma_rssi_read(&stats->cck_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
4765 return phy_div(stats->evm, stats->pkt_cnt_non_legacy + stats->pkt_cnt_ofdm); in rtw89_phy_antdiv_sts_instance_get_evm()
4771 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_parse()
4772 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_parse()
4774 if (!hal->ant_diversity || hal->ant_diversity_fixed) in rtw89_phy_antdiv_parse()
4777 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->target_stats); in rtw89_phy_antdiv_parse()
4779 if (!antdiv->get_stats) in rtw89_phy_antdiv_parse()
4782 if (hal->antenna_rx == RF_A) in rtw89_phy_antdiv_parse()
4783 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->main_stats); in rtw89_phy_antdiv_parse()
4784 else if (hal->antenna_rx == RF_B) in rtw89_phy_antdiv_parse()
4785 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->aux_stats); in rtw89_phy_antdiv_parse()
4818 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_sts_reset()
4820 rtw89_phy_antdiv_sts_instance_reset(&antdiv->target_stats); in rtw89_phy_antdiv_sts_reset()
4821 rtw89_phy_antdiv_sts_instance_reset(&antdiv->main_stats); in rtw89_phy_antdiv_sts_reset()
4822 rtw89_phy_antdiv_sts_instance_reset(&antdiv->aux_stats); in rtw89_phy_antdiv_sts_reset()
4827 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_init()
4828 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_init()
4830 if (!hal->ant_diversity) in rtw89_phy_antdiv_init()
4833 antdiv->get_stats = false; in rtw89_phy_antdiv_init()
4834 antdiv->rssi_pre = 0; in rtw89_phy_antdiv_init()
4841 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_thermal_protect()
4842 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_thermal_protect()
4843 u8 th_max = phystat->last_thermal_max; in rtw89_phy_thermal_protect()
4844 u8 lv = hal->thermal_prot_lv; in rtw89_phy_thermal_protect()
4846 if (!hal->thermal_prot_th || in rtw89_phy_thermal_protect()
4847 (hal->disabled_dm_bitmap & BIT(RTW89_DM_THERMAL_PROTECT))) in rtw89_phy_thermal_protect()
4850 if (th_max > hal->thermal_prot_th && lv < RTW89_THERMAL_PROT_LV_MAX) in rtw89_phy_thermal_protect()
4852 else if (th_max < hal->thermal_prot_th - 2 && lv > 0) in rtw89_phy_thermal_protect()
4853 lv--; in rtw89_phy_thermal_protect()
4857 hal->thermal_prot_lv = lv; in rtw89_phy_thermal_protect()
4861 rtw89_fw_h2c_tx_duty(rtwdev, hal->thermal_prot_lv); in rtw89_phy_thermal_protect()
4866 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_thermal_update()
4870 for (i = 0; i < rtwdev->chip->rf_path_num; i++) { in rtw89_phy_stat_thermal_update()
4873 ewma_thermal_add(&phystat->avg_thermal[i], th); in rtw89_phy_stat_thermal_update()
4877 ewma_thermal_read(&phystat->avg_thermal[i])); in rtw89_phy_stat_thermal_update()
4882 phystat->last_thermal_max = th_max; in rtw89_phy_stat_thermal_update()
4895 struct rtw89_phy_ch_info *ch_info = rssi_data->ch_info; in __rtw89_phy_stat_rssi_update_iter()
4898 rssi_curr = ewma_rssi_read(&rtwsta_link->avg_rssi); in __rtw89_phy_stat_rssi_update_iter()
4900 if (rssi_curr < ch_info->rssi_min) { in __rtw89_phy_stat_rssi_update_iter()
4901 ch_info->rssi_min = rssi_curr; in __rtw89_phy_stat_rssi_update_iter()
4902 ch_info->rssi_min_macid = rtwsta_link->mac_id; in __rtw89_phy_stat_rssi_update_iter()
4905 if (rtwsta_link->prev_rssi == 0) { in __rtw89_phy_stat_rssi_update_iter()
4906 rtwsta_link->prev_rssi = rssi_curr; in __rtw89_phy_stat_rssi_update_iter()
4907 } else if (abs((int)rtwsta_link->prev_rssi - (int)rssi_curr) > in __rtw89_phy_stat_rssi_update_iter()
4909 rtwsta_link->prev_rssi = rssi_curr; in __rtw89_phy_stat_rssi_update_iter()
4910 rssi_data->rssi_changed = true; in __rtw89_phy_stat_rssi_update_iter()
4932 rssi_data.ch_info = &rtwdev->ch_info; in rtw89_phy_stat_rssi_update()
4933 rssi_data.ch_info->rssi_min = U8_MAX; in rtw89_phy_stat_rssi_update()
4934 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_stat_rssi_update()
4943 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_init()
4946 for (i = 0; i < rtwdev->chip->rf_path_num; i++) in rtw89_phy_stat_init()
4947 ewma_thermal_init(&phystat->avg_thermal[i]); in rtw89_phy_stat_init()
4951 memset(&phystat->cur_pkt_stat, 0, sizeof(phystat->cur_pkt_stat)); in rtw89_phy_stat_init()
4952 memset(&phystat->last_pkt_stat, 0, sizeof(phystat->last_pkt_stat)); in rtw89_phy_stat_init()
4954 ewma_rssi_init(&phystat->bcn_rssi); in rtw89_phy_stat_init()
4956 rtwdev->hal.thermal_prot_lv = 0; in rtw89_phy_stat_init()
4961 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_track()
4967 phystat->last_pkt_stat = phystat->cur_pkt_stat; in rtw89_phy_stat_track()
4968 memset(&phystat->cur_pkt_stat, 0, sizeof(phystat->cur_pkt_stat)); in rtw89_phy_stat_track()
4973 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_us_to_idx()
4975 return time_us >> (ilog2(CCX_US_BASE_RATIO) + env->ccx_unit_idx); in rtw89_phy_ccx_us_to_idx()
4980 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_idx_to_us()
4982 return idx << (ilog2(CCX_US_BASE_RATIO) + env->ccx_unit_idx); in rtw89_phy_ccx_idx_to_us()
4987 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ccx_top_setting_init()
4988 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_top_setting_init()
4989 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ccx_top_setting_init()
4991 env->ccx_manual_ctrl = false; in rtw89_phy_ccx_top_setting_init()
4992 env->ccx_ongoing = false; in rtw89_phy_ccx_top_setting_init()
4993 env->ccx_rac_lv = RTW89_RAC_RELEASE; in rtw89_phy_ccx_top_setting_init()
4994 env->ccx_period = 0; in rtw89_phy_ccx_top_setting_init()
4995 env->ccx_unit_idx = RTW89_CCX_32_US; in rtw89_phy_ccx_top_setting_init()
4997 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->en_mask, 1); in rtw89_phy_ccx_top_setting_init()
4998 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->trig_opt_mask, 1); in rtw89_phy_ccx_top_setting_init()
4999 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1); in rtw89_phy_ccx_top_setting_init()
5000 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->edcca_opt_mask, in rtw89_phy_ccx_top_setting_init()
5007 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_get_report()
5011 numer = report * score + (env->ccx_period >> 1); in rtw89_phy_ccx_get_report()
5012 if (env->ccx_period) in rtw89_phy_ccx_get_report()
5013 ret = numer / env->ccx_period; in rtw89_phy_ccx_get_report()
5015 return ret >= score ? score - 1 : ret; in rtw89_phy_ccx_get_report()
5049 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_racing_release()
5052 "lv:(%d)->(0)\n", env->ccx_rac_lv); in rtw89_phy_ccx_racing_release()
5054 env->ccx_ongoing = false; in rtw89_phy_ccx_racing_release()
5055 env->ccx_rac_lv = RTW89_RAC_RELEASE; in rtw89_phy_ccx_racing_release()
5056 env->ifs_clm_app = RTW89_IFS_CLM_BACKGROUND; in rtw89_phy_ccx_racing_release()
5062 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_th_update_check()
5063 bool is_update = env->ifs_clm_app != para->ifs_clm_app; in rtw89_phy_ifs_clm_th_update_check()
5065 u16 *ifs_th_l = env->ifs_clm_th_l; in rtw89_phy_ifs_clm_th_update_check()
5066 u16 *ifs_th_h = env->ifs_clm_th_h; in rtw89_phy_ifs_clm_th_update_check()
5073 switch (para->ifs_clm_app) { in rtw89_phy_ifs_clm_th_update_check()
5084 ifs_th0_us = para->ifs_clm_manual_th0; in rtw89_phy_ifs_clm_th_update_check()
5085 ifs_th_times = para->ifs_clm_manual_th_times; in rtw89_phy_ifs_clm_th_update_check()
5092 * low[i] = high[i-1] + 1 in rtw89_phy_ifs_clm_th_update_check()
5093 * high[i] = high[i-1] * ifs_th_times in rtw89_phy_ifs_clm_th_update_check()
5100 ifs_th_l[i] = ifs_th_h[i - 1] + 1; in rtw89_phy_ifs_clm_th_update_check()
5101 ifs_th_h_us[i] = ifs_th_h_us[i - 1] * ifs_th_times; in rtw89_phy_ifs_clm_th_update_check()
5108 "No need to update IFS_TH\n"); in rtw89_phy_ifs_clm_th_update_check()
5115 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_set_th_reg()
5116 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_set_th_reg()
5117 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_set_th_reg()
5120 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5121 env->ifs_clm_th_l[0]); in rtw89_phy_ifs_clm_set_th_reg()
5122 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5123 env->ifs_clm_th_l[1]); in rtw89_phy_ifs_clm_set_th_reg()
5124 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5125 env->ifs_clm_th_l[2]); in rtw89_phy_ifs_clm_set_th_reg()
5126 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5127 env->ifs_clm_th_l[3]); in rtw89_phy_ifs_clm_set_th_reg()
5129 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5130 env->ifs_clm_th_h[0]); in rtw89_phy_ifs_clm_set_th_reg()
5131 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5132 env->ifs_clm_th_h[1]); in rtw89_phy_ifs_clm_set_th_reg()
5133 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5134 env->ifs_clm_th_h[2]); in rtw89_phy_ifs_clm_set_th_reg()
5135 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5136 env->ifs_clm_th_h[3]); in rtw89_phy_ifs_clm_set_th_reg()
5141 i + 1, env->ifs_clm_th_l[i], env->ifs_clm_th_h[i]); in rtw89_phy_ifs_clm_set_th_reg()
5146 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_setting_init()
5147 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_setting_init()
5148 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_setting_init()
5151 env->ifs_clm_app = RTW89_IFS_CLM_BACKGROUND; in rtw89_phy_ifs_clm_setting_init()
5152 env->ifs_clm_mntr_time = 0; in rtw89_phy_ifs_clm_setting_init()
5158 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_collect_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
5159 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
5160 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
5161 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
5162 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
5168 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_racing_ctrl()
5174 return -EINVAL; in rtw89_phy_ccx_racing_ctrl()
5178 "ccx_ongoing=%d, level:(%d)->(%d)\n", env->ccx_ongoing, in rtw89_phy_ccx_racing_ctrl()
5179 env->ccx_rac_lv, level); in rtw89_phy_ccx_racing_ctrl()
5181 if (env->ccx_ongoing) { in rtw89_phy_ccx_racing_ctrl()
5182 if (level <= env->ccx_rac_lv) in rtw89_phy_ccx_racing_ctrl()
5183 ret = -EINVAL; in rtw89_phy_ccx_racing_ctrl()
5185 env->ccx_ongoing = false; in rtw89_phy_ccx_racing_ctrl()
5189 env->ccx_rac_lv = level; in rtw89_phy_ccx_racing_ctrl()
5199 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ccx_trigger()
5200 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_trigger()
5201 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ccx_trigger()
5203 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_clm_cnt_clear_mask, 0); in rtw89_phy_ccx_trigger()
5204 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 0); in rtw89_phy_ccx_trigger()
5205 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_clm_cnt_clear_mask, 1); in rtw89_phy_ccx_trigger()
5206 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1); in rtw89_phy_ccx_trigger()
5208 env->ccx_ongoing = true; in rtw89_phy_ccx_trigger()
5213 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_get_utility()
5217 env->ifs_clm_tx_ratio = in rtw89_phy_ifs_clm_get_utility()
5218 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_tx, PERCENT); in rtw89_phy_ifs_clm_get_utility()
5219 env->ifs_clm_edcca_excl_cca_ratio = in rtw89_phy_ifs_clm_get_utility()
5220 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_edcca_excl_cca, in rtw89_phy_ifs_clm_get_utility()
5222 env->ifs_clm_cck_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5223 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_cckfa, PERCENT); in rtw89_phy_ifs_clm_get_utility()
5224 env->ifs_clm_ofdm_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5225 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_ofdmfa, PERCENT); in rtw89_phy_ifs_clm_get_utility()
5226 env->ifs_clm_cck_cca_excl_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5227 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_cckcca_excl_fa, in rtw89_phy_ifs_clm_get_utility()
5229 env->ifs_clm_ofdm_cca_excl_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5230 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_ofdmcca_excl_fa, in rtw89_phy_ifs_clm_get_utility()
5232 env->ifs_clm_cck_fa_permil = in rtw89_phy_ifs_clm_get_utility()
5233 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_cckfa, PERMIL); in rtw89_phy_ifs_clm_get_utility()
5234 env->ifs_clm_ofdm_fa_permil = in rtw89_phy_ifs_clm_get_utility()
5235 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_ofdmfa, PERMIL); in rtw89_phy_ifs_clm_get_utility()
5238 if (env->ifs_clm_his[i] > ENV_MNTR_IFSCLM_HIS_MAX) { in rtw89_phy_ifs_clm_get_utility()
5239 env->ifs_clm_ifs_avg[i] = ENV_MNTR_FAIL_DWORD; in rtw89_phy_ifs_clm_get_utility()
5241 env->ifs_clm_ifs_avg[i] = in rtw89_phy_ifs_clm_get_utility()
5243 env->ifs_clm_avg[i]); in rtw89_phy_ifs_clm_get_utility()
5246 res = rtw89_phy_ccx_idx_to_us(rtwdev, env->ifs_clm_cca[i]); in rtw89_phy_ifs_clm_get_utility()
5247 res += env->ifs_clm_his[i] >> 1; in rtw89_phy_ifs_clm_get_utility()
5248 if (env->ifs_clm_his[i]) in rtw89_phy_ifs_clm_get_utility()
5249 res /= env->ifs_clm_his[i]; in rtw89_phy_ifs_clm_get_utility()
5252 env->ifs_clm_cca_avg[i] = res; in rtw89_phy_ifs_clm_get_utility()
5256 "IFS-CLM ratio {Tx, EDCCA_exclu_cca} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5257 env->ifs_clm_tx_ratio, env->ifs_clm_edcca_excl_cca_ratio); in rtw89_phy_ifs_clm_get_utility()
5259 "IFS-CLM FA ratio {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5260 env->ifs_clm_cck_fa_ratio, env->ifs_clm_ofdm_fa_ratio); in rtw89_phy_ifs_clm_get_utility()
5262 "IFS-CLM FA permil {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5263 env->ifs_clm_cck_fa_permil, env->ifs_clm_ofdm_fa_permil); in rtw89_phy_ifs_clm_get_utility()
5265 "IFS-CLM CCA_exclu_FA ratio {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5266 env->ifs_clm_cck_cca_excl_fa_ratio, in rtw89_phy_ifs_clm_get_utility()
5267 env->ifs_clm_ofdm_cca_excl_fa_ratio); in rtw89_phy_ifs_clm_get_utility()
5272 i + 1, env->ifs_clm_his[i], env->ifs_clm_ifs_avg[i], in rtw89_phy_ifs_clm_get_utility()
5273 env->ifs_clm_cca_avg[i]); in rtw89_phy_ifs_clm_get_utility()
5278 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_get_result()
5279 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_get_result()
5280 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_get_result()
5283 if (rtw89_phy_read32_mask(rtwdev, ccx->ifs_total_addr, in rtw89_phy_ifs_clm_get_result()
5284 ccx->ifs_cnt_done_mask) == 0) { in rtw89_phy_ifs_clm_get_result()
5290 env->ifs_clm_tx = in rtw89_phy_ifs_clm_get_result()
5291 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_tx_cnt_addr, in rtw89_phy_ifs_clm_get_result()
5292 ccx->ifs_clm_tx_cnt_msk); in rtw89_phy_ifs_clm_get_result()
5293 env->ifs_clm_edcca_excl_cca = in rtw89_phy_ifs_clm_get_result()
5294 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_tx_cnt_addr, in rtw89_phy_ifs_clm_get_result()
5295 ccx->ifs_clm_edcca_excl_cca_fa_mask); in rtw89_phy_ifs_clm_get_result()
5296 env->ifs_clm_cckcca_excl_fa = in rtw89_phy_ifs_clm_get_result()
5297 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_cca_addr, in rtw89_phy_ifs_clm_get_result()
5298 ccx->ifs_clm_cckcca_excl_fa_mask); in rtw89_phy_ifs_clm_get_result()
5299 env->ifs_clm_ofdmcca_excl_fa = in rtw89_phy_ifs_clm_get_result()
5300 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_cca_addr, in rtw89_phy_ifs_clm_get_result()
5301 ccx->ifs_clm_ofdmcca_excl_fa_mask); in rtw89_phy_ifs_clm_get_result()
5302 env->ifs_clm_cckfa = in rtw89_phy_ifs_clm_get_result()
5303 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_fa_addr, in rtw89_phy_ifs_clm_get_result()
5304 ccx->ifs_clm_cck_fa_mask); in rtw89_phy_ifs_clm_get_result()
5305 env->ifs_clm_ofdmfa = in rtw89_phy_ifs_clm_get_result()
5306 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_fa_addr, in rtw89_phy_ifs_clm_get_result()
5307 ccx->ifs_clm_ofdm_fa_mask); in rtw89_phy_ifs_clm_get_result()
5309 env->ifs_clm_his[0] = in rtw89_phy_ifs_clm_get_result()
5310 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5311 ccx->ifs_t1_his_mask); in rtw89_phy_ifs_clm_get_result()
5312 env->ifs_clm_his[1] = in rtw89_phy_ifs_clm_get_result()
5313 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5314 ccx->ifs_t2_his_mask); in rtw89_phy_ifs_clm_get_result()
5315 env->ifs_clm_his[2] = in rtw89_phy_ifs_clm_get_result()
5316 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5317 ccx->ifs_t3_his_mask); in rtw89_phy_ifs_clm_get_result()
5318 env->ifs_clm_his[3] = in rtw89_phy_ifs_clm_get_result()
5319 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5320 ccx->ifs_t4_his_mask); in rtw89_phy_ifs_clm_get_result()
5322 env->ifs_clm_avg[0] = in rtw89_phy_ifs_clm_get_result()
5323 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_l_addr, in rtw89_phy_ifs_clm_get_result()
5324 ccx->ifs_t1_avg_mask); in rtw89_phy_ifs_clm_get_result()
5325 env->ifs_clm_avg[1] = in rtw89_phy_ifs_clm_get_result()
5326 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_l_addr, in rtw89_phy_ifs_clm_get_result()
5327 ccx->ifs_t2_avg_mask); in rtw89_phy_ifs_clm_get_result()
5328 env->ifs_clm_avg[2] = in rtw89_phy_ifs_clm_get_result()
5329 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_h_addr, in rtw89_phy_ifs_clm_get_result()
5330 ccx->ifs_t3_avg_mask); in rtw89_phy_ifs_clm_get_result()
5331 env->ifs_clm_avg[3] = in rtw89_phy_ifs_clm_get_result()
5332 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_h_addr, in rtw89_phy_ifs_clm_get_result()
5333 ccx->ifs_t4_avg_mask); in rtw89_phy_ifs_clm_get_result()
5335 env->ifs_clm_cca[0] = in rtw89_phy_ifs_clm_get_result()
5336 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_l_addr, in rtw89_phy_ifs_clm_get_result()
5337 ccx->ifs_t1_cca_mask); in rtw89_phy_ifs_clm_get_result()
5338 env->ifs_clm_cca[1] = in rtw89_phy_ifs_clm_get_result()
5339 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_l_addr, in rtw89_phy_ifs_clm_get_result()
5340 ccx->ifs_t2_cca_mask); in rtw89_phy_ifs_clm_get_result()
5341 env->ifs_clm_cca[2] = in rtw89_phy_ifs_clm_get_result()
5342 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_h_addr, in rtw89_phy_ifs_clm_get_result()
5343 ccx->ifs_t3_cca_mask); in rtw89_phy_ifs_clm_get_result()
5344 env->ifs_clm_cca[3] = in rtw89_phy_ifs_clm_get_result()
5345 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_h_addr, in rtw89_phy_ifs_clm_get_result()
5346 ccx->ifs_t4_cca_mask); in rtw89_phy_ifs_clm_get_result()
5348 env->ifs_clm_total_ifs = in rtw89_phy_ifs_clm_get_result()
5349 rtw89_phy_read32_mask(rtwdev, ccx->ifs_total_addr, in rtw89_phy_ifs_clm_get_result()
5350 ccx->ifs_total_mask); in rtw89_phy_ifs_clm_get_result()
5352 rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "IFS-CLM total_ifs = %d\n", in rtw89_phy_ifs_clm_get_result()
5353 env->ifs_clm_total_ifs); in rtw89_phy_ifs_clm_get_result()
5356 env->ifs_clm_tx, env->ifs_clm_edcca_excl_cca); in rtw89_phy_ifs_clm_get_result()
5358 "IFS-CLM FA{CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_result()
5359 env->ifs_clm_cckfa, env->ifs_clm_ofdmfa); in rtw89_phy_ifs_clm_get_result()
5361 "IFS-CLM CCA_exclu_FA{CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_result()
5362 env->ifs_clm_cckcca_excl_fa, env->ifs_clm_ofdmcca_excl_fa); in rtw89_phy_ifs_clm_get_result()
5367 "T%d:[%d, %d, %d]\n", i + 1, env->ifs_clm_his[i], in rtw89_phy_ifs_clm_get_result()
5368 env->ifs_clm_avg[i], env->ifs_clm_cca[i]); in rtw89_phy_ifs_clm_get_result()
5378 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_set()
5379 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_set()
5380 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_set()
5384 if (para->mntr_time == 0) { in rtw89_phy_ifs_clm_set()
5387 return -EINVAL; in rtw89_phy_ifs_clm_set()
5390 if (rtw89_phy_ccx_racing_ctrl(rtwdev, para->rac_lv)) in rtw89_phy_ifs_clm_set()
5391 return -EINVAL; in rtw89_phy_ifs_clm_set()
5393 if (para->mntr_time != env->ifs_clm_mntr_time) { in rtw89_phy_ifs_clm_set()
5394 rtw89_phy_ccx_ms_to_period_unit(rtwdev, para->mntr_time, in rtw89_phy_ifs_clm_set()
5396 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, in rtw89_phy_ifs_clm_set()
5397 ccx->ifs_clm_period_mask, period); in rtw89_phy_ifs_clm_set()
5398 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, in rtw89_phy_ifs_clm_set()
5399 ccx->ifs_clm_cnt_unit_mask, in rtw89_phy_ifs_clm_set()
5403 "Update IFS-CLM time ((%d)) -> ((%d))\n", in rtw89_phy_ifs_clm_set()
5404 env->ifs_clm_mntr_time, para->mntr_time); in rtw89_phy_ifs_clm_set()
5406 env->ifs_clm_mntr_time = para->mntr_time; in rtw89_phy_ifs_clm_set()
5407 env->ccx_period = (u16)period; in rtw89_phy_ifs_clm_set()
5408 env->ccx_unit_idx = (u8)unit_idx; in rtw89_phy_ifs_clm_set()
5412 env->ifs_clm_app = para->ifs_clm_app; in rtw89_phy_ifs_clm_set()
5421 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_env_monitor_track()
5425 env->ccx_watchdog_result = RTW89_PHY_ENV_MON_CCX_FAIL; in rtw89_phy_env_monitor_track()
5426 if (env->ccx_manual_ctrl) { in rtw89_phy_env_monitor_track()
5434 env->ccx_watchdog_result |= RTW89_PHY_ENV_MON_IFS_CLM; in rtw89_phy_env_monitor_track()
5448 env->ccx_watchdog_result, chk_result); in rtw89_phy_env_monitor_track()
5457 *ie_page -= 1; in rtw89_physts_ie_page_valid()
5487 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_physts_set_ie_bitmap()
5493 if (chip->chip_id == RTL8852A) in rtw89_physts_set_ie_bitmap()
5519 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_physts_enable_fail_report()
5520 const struct rtw89_physts_regs *physts = phy->physts; in rtw89_physts_enable_fail_report()
5523 rtw89_phy_write32_idx_clr(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5524 physts->dis_trigger_fail_mask, phy_idx); in rtw89_physts_enable_fail_report()
5525 rtw89_phy_write32_idx_clr(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5526 physts->dis_trigger_brk_mask, phy_idx); in rtw89_physts_enable_fail_report()
5528 rtw89_phy_write32_idx_set(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5529 physts->dis_trigger_fail_mask, phy_idx); in rtw89_physts_enable_fail_report()
5530 rtw89_phy_write32_idx_set(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5531 physts->dis_trigger_brk_mask, phy_idx); in rtw89_physts_enable_fail_report()
5567 if (rtwdev->dbcc_en) in rtw89_physts_parsing_init()
5573 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_dig_read_gain_table()
5574 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_read_gain_table()
5584 gain_arr = dig->lna_gain_g; in rtw89_phy_dig_read_gain_table()
5586 cfg = chip->dig_table->cfg_lna_g; in rtw89_phy_dig_read_gain_table()
5590 gain_arr = dig->tia_gain_g; in rtw89_phy_dig_read_gain_table()
5592 cfg = chip->dig_table->cfg_tia_g; in rtw89_phy_dig_read_gain_table()
5596 gain_arr = dig->lna_gain_a; in rtw89_phy_dig_read_gain_table()
5598 cfg = chip->dig_table->cfg_lna_a; in rtw89_phy_dig_read_gain_table()
5602 gain_arr = dig->tia_gain_a; in rtw89_phy_dig_read_gain_table()
5604 cfg = chip->dig_table->cfg_tia_a; in rtw89_phy_dig_read_gain_table()
5611 for (i = 0; i < cfg->size; i++) { in rtw89_phy_dig_read_gain_table()
5612 tmp = rtw89_phy_read32_mask(rtwdev, cfg->table[i].addr, in rtw89_phy_dig_read_gain_table()
5613 cfg->table[i].mask); in rtw89_phy_dig_read_gain_table()
5625 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_update_gain_para()
5629 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_update_gain_para()
5634 dig->ib_pkpwr = sign_extend32(tmp >> DIG_GAIN_SHIFT, U8_MAX_BIT); in rtw89_phy_dig_update_gain_para()
5635 dig->ib_pbk = rtw89_phy_read32_mask(rtwdev, R_PATH0_IB_PBK, in rtw89_phy_dig_update_gain_para()
5638 dig->ib_pkpwr, dig->ib_pbk); in rtw89_phy_dig_update_gain_para()
5652 struct rtw89_phy_ch_info *ch_info = &rtwdev->ch_info; in rtw89_phy_dig_update_rssi_info()
5653 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_update_rssi_info()
5654 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig_update_rssi_info()
5657 dig->igi_rssi = ch_info->rssi_min >> 1; in rtw89_phy_dig_update_rssi_info()
5659 rtw89_debug(rtwdev, RTW89_DBG_DIG, "RSSI update : NO Link\n"); in rtw89_phy_dig_update_rssi_info()
5660 dig->igi_rssi = rssi_nolink; in rtw89_phy_dig_update_rssi_info()
5666 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_update_para()
5668 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig_update_para()
5671 switch (chan->band_type) { in rtw89_phy_dig_update_para()
5673 dig->lna_gain = dig->lna_gain_g; in rtw89_phy_dig_update_para()
5674 dig->tia_gain = dig->tia_gain_g; in rtw89_phy_dig_update_para()
5676 dig->force_gaincode_idx_en = false; in rtw89_phy_dig_update_para()
5677 dig->dyn_pd_th_en = true; in rtw89_phy_dig_update_para()
5681 dig->lna_gain = dig->lna_gain_a; in rtw89_phy_dig_update_para()
5682 dig->tia_gain = dig->tia_gain_a; in rtw89_phy_dig_update_para()
5684 dig->force_gaincode_idx_en = true; in rtw89_phy_dig_update_para()
5685 dig->dyn_pd_th_en = true; in rtw89_phy_dig_update_para()
5688 memcpy(dig->fa_th, fa_th_src, sizeof(dig->fa_th)); in rtw89_phy_dig_update_para()
5689 memcpy(dig->igi_rssi_th, igi_rssi_th, sizeof(dig->igi_rssi_th)); in rtw89_phy_dig_update_para()
5698 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_para_reset()
5700 dig->cur_gaincode.lna_idx = LNA_IDX_MAX; in rtw89_phy_dig_para_reset()
5701 dig->cur_gaincode.tia_idx = TIA_IDX_MAX; in rtw89_phy_dig_para_reset()
5702 dig->cur_gaincode.rxb_idx = RXB_IDX_MAX; in rtw89_phy_dig_para_reset()
5703 dig->force_gaincode.lna_idx = LNA_IDX_MAX; in rtw89_phy_dig_para_reset()
5704 dig->force_gaincode.tia_idx = TIA_IDX_MAX; in rtw89_phy_dig_para_reset()
5705 dig->force_gaincode.rxb_idx = RXB_IDX_MAX; in rtw89_phy_dig_para_reset()
5707 dig->dyn_igi_max = igi_max_performance_mode; in rtw89_phy_dig_para_reset()
5708 dig->dyn_igi_min = dynamic_igi_min; in rtw89_phy_dig_para_reset()
5709 dig->dyn_pd_th_max = dynamic_pd_threshold_max; in rtw89_phy_dig_para_reset()
5710 dig->pd_low_th_ofst = pd_low_th_offset; in rtw89_phy_dig_para_reset()
5711 dig->is_linked_pre = false; in rtw89_phy_dig_para_reset()
5722 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_lna_idx_by_rssi()
5725 if (rssi < dig->igi_rssi_th[0]) in rtw89_phy_dig_lna_idx_by_rssi()
5727 else if (rssi < dig->igi_rssi_th[1]) in rtw89_phy_dig_lna_idx_by_rssi()
5729 else if (rssi < dig->igi_rssi_th[2]) in rtw89_phy_dig_lna_idx_by_rssi()
5731 else if (rssi < dig->igi_rssi_th[3]) in rtw89_phy_dig_lna_idx_by_rssi()
5733 else if (rssi < dig->igi_rssi_th[4]) in rtw89_phy_dig_lna_idx_by_rssi()
5743 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_tia_idx_by_rssi()
5746 if (rssi < dig->igi_rssi_th[0]) in rtw89_phy_dig_tia_idx_by_rssi()
5759 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_rxb_idx_by_rssi()
5760 s8 lna_gain = dig->lna_gain[set->lna_idx]; in rtw89_phy_dig_rxb_idx_by_rssi()
5761 s8 tia_gain = dig->tia_gain[set->tia_idx]; in rtw89_phy_dig_rxb_idx_by_rssi()
5766 rxb_idx_tmp += dig->ib_pkpwr - dig->ib_pbk - wb_rssi; in rtw89_phy_dig_rxb_idx_by_rssi()
5778 set->lna_idx = rtw89_phy_dig_lna_idx_by_rssi(rtwdev, rssi); in rtw89_phy_dig_gaincode_by_rssi()
5779 set->tia_idx = rtw89_phy_dig_tia_idx_by_rssi(rtwdev, rssi); in rtw89_phy_dig_gaincode_by_rssi()
5780 set->rxb_idx = rtw89_phy_dig_rxb_idx_by_rssi(rtwdev, rssi, set); in rtw89_phy_dig_gaincode_by_rssi()
5784 rssi, set->lna_idx, set->tia_idx, set->rxb_idx); in rtw89_phy_dig_gaincode_by_rssi()
5791 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_igi_offset_by_env()
5792 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_dig_igi_offset_by_env()
5794 u8 igi_offset = dig->fa_rssi_ofst; in rtw89_phy_dig_igi_offset_by_env()
5797 fa_ratio = env->ifs_clm_cck_fa_permil + env->ifs_clm_ofdm_fa_permil; in rtw89_phy_dig_igi_offset_by_env()
5799 if (fa_ratio < dig->fa_th[0]) in rtw89_phy_dig_igi_offset_by_env()
5801 else if (fa_ratio < dig->fa_th[1]) in rtw89_phy_dig_igi_offset_by_env()
5803 else if (fa_ratio < dig->fa_th[2]) in rtw89_phy_dig_igi_offset_by_env()
5805 else if (fa_ratio < dig->fa_th[3]) in rtw89_phy_dig_igi_offset_by_env()
5816 dig->fa_rssi_ofst = igi_offset; in rtw89_phy_dig_igi_offset_by_env()
5819 "fa_th: [+6 (%d) +4 (%d) +2 (%d) 0 (%d) -2 ]\n", in rtw89_phy_dig_igi_offset_by_env()
5820 dig->fa_th[3], dig->fa_th[2], dig->fa_th[1], dig->fa_th[0]); in rtw89_phy_dig_igi_offset_by_env()
5824 env->ifs_clm_cck_fa_permil, env->ifs_clm_ofdm_fa_permil, in rtw89_phy_dig_igi_offset_by_env()
5825 env->ifs_clm_cck_fa_permil + env->ifs_clm_ofdm_fa_permil, in rtw89_phy_dig_igi_offset_by_env()
5831 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_lna_idx()
5833 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_lna_init.addr, in rtw89_phy_dig_set_lna_idx()
5834 dig_regs->p0_lna_init.mask, lna_idx); in rtw89_phy_dig_set_lna_idx()
5835 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_lna_init.addr, in rtw89_phy_dig_set_lna_idx()
5836 dig_regs->p1_lna_init.mask, lna_idx); in rtw89_phy_dig_set_lna_idx()
5841 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_tia_idx()
5843 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_tia_init.addr, in rtw89_phy_dig_set_tia_idx()
5844 dig_regs->p0_tia_init.mask, tia_idx); in rtw89_phy_dig_set_tia_idx()
5845 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_tia_init.addr, in rtw89_phy_dig_set_tia_idx()
5846 dig_regs->p1_tia_init.mask, tia_idx); in rtw89_phy_dig_set_tia_idx()
5851 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_rxb_idx()
5853 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_rxb_init.addr, in rtw89_phy_dig_set_rxb_idx()
5854 dig_regs->p0_rxb_init.mask, rxb_idx); in rtw89_phy_dig_set_rxb_idx()
5855 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_rxb_init.addr, in rtw89_phy_dig_set_rxb_idx()
5856 dig_regs->p1_rxb_init.mask, rxb_idx); in rtw89_phy_dig_set_rxb_idx()
5862 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_set_igi_cr()
5876 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_sdagc_follow_pagc_config()
5878 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_p20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
5879 dig_regs->p0_p20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
5880 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_s20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
5881 dig_regs->p0_s20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
5882 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_p20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
5883 dig_regs->p1_p20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
5884 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_s20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
5885 dig_regs->p1_s20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
5892 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_config_igi()
5894 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_config_igi()
5897 if (dig->force_gaincode_idx_en) { in rtw89_phy_dig_config_igi()
5898 rtw89_phy_dig_set_igi_cr(rtwdev, dig->force_gaincode); in rtw89_phy_dig_config_igi()
5902 rtw89_phy_dig_gaincode_by_rssi(rtwdev, dig->igi_fa_rssi, in rtw89_phy_dig_config_igi()
5903 &dig->cur_gaincode); in rtw89_phy_dig_config_igi()
5904 rtw89_phy_dig_set_igi_cr(rtwdev, dig->cur_gaincode); in rtw89_phy_dig_config_igi()
5912 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_dyn_pd_th()
5913 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_dig_dyn_pd_th()
5914 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_dyn_pd_th()
5915 u8 final_rssi = 0, under_region = dig->pd_low_th_ofst; in rtw89_phy_dig_dyn_pd_th()
5920 if (rtwdev->chip->chip_gen == RTW89_CHIP_AX) in rtw89_phy_dig_dyn_pd_th()
5940 dig->dyn_pd_th_max = dig->igi_rssi; in rtw89_phy_dig_dyn_pd_th()
5942 final_rssi = min_t(u8, rssi, dig->igi_rssi); in rtw89_phy_dig_dyn_pd_th()
5947 pd_val = (ofdm_cca_th - under_region - PD_TH_MIN_RSSI) >> 1; in rtw89_phy_dig_dyn_pd_th()
5956 rtw89_phy_write32_mask(rtwdev, dig_regs->seg0_pd_reg, in rtw89_phy_dig_dyn_pd_th()
5957 dig_regs->pd_lower_bound_mask, pd_val); in rtw89_phy_dig_dyn_pd_th()
5958 rtw89_phy_write32_mask(rtwdev, dig_regs->seg0_pd_reg, in rtw89_phy_dig_dyn_pd_th()
5959 dig_regs->pd_spatial_reuse_en, enable); in rtw89_phy_dig_dyn_pd_th()
5961 if (!rtwdev->hal.support_cckpd) in rtw89_phy_dig_dyn_pd_th()
5964 cck_cca_th = max_t(s8, final_rssi - under_region, CCKPD_TH_MIN_RSSI); in rtw89_phy_dig_dyn_pd_th()
5965 pd_val = (u32)(cck_cca_th - IGI_RSSI_MAX); in rtw89_phy_dig_dyn_pd_th()
5971 rtw89_phy_write32_mask(rtwdev, dig_regs->bmode_pd_reg, in rtw89_phy_dig_dyn_pd_th()
5972 dig_regs->bmode_cca_rssi_limit_en, enable); in rtw89_phy_dig_dyn_pd_th()
5973 rtw89_phy_write32_mask(rtwdev, dig_regs->bmode_pd_lower_bound_reg, in rtw89_phy_dig_dyn_pd_th()
5974 dig_regs->bmode_rssi_nocca_low_th_mask, pd_val); in rtw89_phy_dig_dyn_pd_th()
5979 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_reset()
5981 dig->bypass_dig = false; in rtw89_phy_dig_reset()
5983 rtw89_phy_dig_set_igi_cr(rtwdev, dig->force_gaincode); in rtw89_phy_dig_reset()
5993 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig()
5994 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig()
5997 if (unlikely(dig->bypass_dig)) { in rtw89_phy_dig()
5998 dig->bypass_dig = false; in rtw89_phy_dig()
6004 if (!dig->is_linked_pre && is_linked) { in rtw89_phy_dig()
6007 dig->igi_fa_rssi = dig->igi_rssi; in rtw89_phy_dig()
6008 } else if (dig->is_linked_pre && !is_linked) { in rtw89_phy_dig()
6011 dig->igi_fa_rssi = dig->igi_rssi; in rtw89_phy_dig()
6013 dig->is_linked_pre = is_linked; in rtw89_phy_dig()
6017 igi_min = max_t(int, dig->igi_rssi - IGI_RSSI_MIN, 0); in rtw89_phy_dig()
6018 dig->dyn_igi_max = min(igi_min + IGI_OFFSET_MAX, igi_max_performance_mode); in rtw89_phy_dig()
6019 dig->dyn_igi_min = max(igi_min, ABS_IGI_MIN); in rtw89_phy_dig()
6021 if (dig->dyn_igi_max >= dig->dyn_igi_min) { in rtw89_phy_dig()
6022 dig->igi_fa_rssi += dig->fa_rssi_ofst; in rtw89_phy_dig()
6023 dig->igi_fa_rssi = clamp(dig->igi_fa_rssi, dig->dyn_igi_min, in rtw89_phy_dig()
6024 dig->dyn_igi_max); in rtw89_phy_dig()
6026 dig->igi_fa_rssi = dig->dyn_igi_max; in rtw89_phy_dig()
6031 dig->igi_rssi, dig->dyn_igi_max, dig->dyn_igi_min, in rtw89_phy_dig()
6032 dig->igi_fa_rssi); in rtw89_phy_dig()
6036 rtw89_phy_dig_dyn_pd_th(rtwdev, dig->igi_fa_rssi, dig->dyn_pd_th_en); in rtw89_phy_dig()
6038 if (dig->dyn_pd_th_en && dig->igi_fa_rssi > dig->dyn_pd_th_max) in rtw89_phy_dig()
6047 struct rtw89_hal *hal = &rtwdev->hal; in __rtw89_phy_tx_path_div_sta_iter()
6051 rssi_a = ewma_rssi_read(&rtwsta_link->rssi[RF_PATH_A]); in __rtw89_phy_tx_path_div_sta_iter()
6052 rssi_b = ewma_rssi_read(&rtwsta_link->rssi[RF_PATH_B]); in __rtw89_phy_tx_path_div_sta_iter()
6061 if (hal->antenna_tx == candidate) in __rtw89_phy_tx_path_div_sta_iter()
6064 hal->antenna_tx = candidate; in __rtw89_phy_tx_path_div_sta_iter()
6067 if (hal->antenna_tx == RF_A) { in __rtw89_phy_tx_path_div_sta_iter()
6070 } else if (hal->antenna_tx == RF_B) { in __rtw89_phy_tx_path_div_sta_iter()
6079 struct rtw89_dev *rtwdev = rtwsta->rtwdev; in rtw89_phy_tx_path_div_sta_iter()
6080 struct rtw89_vif *rtwvif = rtwsta->rtwvif; in rtw89_phy_tx_path_div_sta_iter()
6090 if (sta->tdls) in rtw89_phy_tx_path_div_sta_iter()
6097 rtwvif_link = rtwsta_link->rtwvif_link; in rtw89_phy_tx_path_div_sta_iter()
6098 if (rtwvif_link->wifi_role != RTW89_WIFI_ROLE_STATION) in rtw89_phy_tx_path_div_sta_iter()
6109 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_tx_path_div_track()
6112 if (!hal->tx_path_diversity) in rtw89_phy_tx_path_div_track()
6115 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_tx_path_div_track()
6125 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_set_ant()
6128 if (!hal->ant_diversity || hal->antenna_tx == 0) in rtw89_phy_antdiv_set_ant()
6131 if (hal->antenna_tx == RF_B) { in rtw89_phy_antdiv_set_ant()
6151 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_swap_hal_antenna()
6153 hal->antenna_rx = hal->antenna_rx == RF_A ? RF_B : RF_A; in rtw89_phy_swap_hal_antenna()
6154 hal->antenna_tx = hal->antenna_rx; in rtw89_phy_swap_hal_antenna()
6159 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_decision_state()
6160 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_decision_state()
6166 antdiv->get_stats = false; in rtw89_phy_antdiv_decision_state()
6167 antdiv->training_count = 0; in rtw89_phy_antdiv_decision_state()
6169 main_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->main_stats); in rtw89_phy_antdiv_decision_state()
6170 main_evm = rtw89_phy_antdiv_sts_instance_get_evm(&antdiv->main_stats); in rtw89_phy_antdiv_decision_state()
6171 aux_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->aux_stats); in rtw89_phy_antdiv_decision_state()
6172 aux_evm = rtw89_phy_antdiv_sts_instance_get_evm(&antdiv->aux_stats); in rtw89_phy_antdiv_decision_state()
6191 hal->antenna_tx = candidate; in rtw89_phy_antdiv_decision_state()
6192 hal->antenna_rx = candidate; in rtw89_phy_antdiv_decision_state()
6197 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_training_state()
6200 if (antdiv->training_count % 2 == 0) { in rtw89_phy_antdiv_training_state()
6201 if (antdiv->training_count == 0) in rtw89_phy_antdiv_training_state()
6204 antdiv->get_stats = true; in rtw89_phy_antdiv_training_state()
6207 antdiv->get_stats = false; in rtw89_phy_antdiv_training_state()
6214 antdiv->training_count++; in rtw89_phy_antdiv_training_state()
6215 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->antdiv_work, in rtw89_phy_antdiv_training_state()
6223 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_work()
6225 mutex_lock(&rtwdev->mutex); in rtw89_phy_antdiv_work()
6227 if (antdiv->training_count <= ANTDIV_TRAINNING_CNT) { in rtw89_phy_antdiv_work()
6234 mutex_unlock(&rtwdev->mutex); in rtw89_phy_antdiv_work()
6239 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_track()
6240 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_track()
6243 if (!hal->ant_diversity || hal->ant_diversity_fixed) in rtw89_phy_antdiv_track()
6246 rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->target_stats); in rtw89_phy_antdiv_track()
6247 rssi_pre = antdiv->rssi_pre; in rtw89_phy_antdiv_track()
6248 antdiv->rssi_pre = rssi; in rtw89_phy_antdiv_track()
6249 rtw89_phy_antdiv_sts_instance_reset(&antdiv->target_stats); in rtw89_phy_antdiv_track()
6251 if (abs((int)rssi - (int)rssi_pre) < ANTDIV_RSSI_DIFF_TH) in rtw89_phy_antdiv_track()
6254 antdiv->training_count = 0; in rtw89_phy_antdiv_track()
6255 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->antdiv_work, 0); in rtw89_phy_antdiv_track()
6266 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_edcca_init()
6267 struct rtw89_edcca_bak *edcca_bak = &rtwdev->hal.edcca_bak; in rtw89_phy_edcca_init()
6271 if (rtwdev->chip->chip_id == RTL8922A && rtwdev->hal.cv == CHIP_CAV) { in rtw89_phy_edcca_init()
6283 rtw89_phy_write32_mask(rtwdev, edcca_regs->tx_collision_t2r_st, in rtw89_phy_edcca_init()
6284 edcca_regs->tx_collision_t2r_st_mask, 0x29); in rtw89_phy_edcca_init()
6317 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_set_bss_color()
6318 const struct rtw89_reg_def *bss_clr_vld = &chip->bss_clr_vld; in rtw89_phy_set_bss_color()
6319 enum rtw89_phy_idx phy_idx = rtwvif_link->phy_idx; in rtw89_phy_set_bss_color()
6326 if (!bss_conf->he_support || !vif->cfg.assoc) { in rtw89_phy_set_bss_color()
6331 bss_color = bss_conf->he_bss_color.color; in rtw89_phy_set_bss_color()
6335 rtw89_phy_write32_idx(rtwdev, bss_clr_vld->addr, bss_clr_vld->mask, 0x1, in rtw89_phy_set_bss_color()
6337 rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_TGT, in rtw89_phy_set_bss_color()
6339 rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_STAID, in rtw89_phy_set_bss_color()
6340 vif->cfg.aid, phy_idx); in rtw89_phy_set_bss_color()
6345 return desc->ch != 0; in rfk_chan_validate_desc()
6354 if (desc->ch != chan->channel) in rfk_chan_is_equivalent()
6357 if (desc->has_band && desc->band != chan->band_type) in rfk_chan_is_equivalent()
6360 if (desc->has_bw && desc->bw != chan->band_width) in rfk_chan_is_equivalent()
6375 if (rfk_chan_is_equivalent(&iter_data->desc, chan)) in rfk_chan_iter_search()
6376 iter_data->found++; in rfk_chan_iter_search()
6385 int sel = -1; in rtw89_rfk_chan_lookup()
6397 if (!iter_data.found && sel == -1) in rtw89_rfk_chan_lookup()
6401 if (sel == -1) { in rtw89_rfk_chan_lookup()
6403 "no idle rfk entry; force replace the first\n"); in rtw89_rfk_chan_lookup()
6414 rtw89_write_rf(rtwdev, def->path, def->addr, def->mask, def->data); in _rfk_write_rf()
6420 rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data); in _rfk_write32_mask()
6426 rtw89_phy_write32_set(rtwdev, def->addr, def->mask); in _rfk_write32_set()
6432 rtw89_phy_write32_clr(rtwdev, def->addr, def->mask); in _rfk_write32_clr()
6438 udelay(def->data); in _rfk_delay()
6455 const struct rtw89_reg5_def *p = tbl->defs; in rtw89_rfk_parser()
6456 const struct rtw89_reg5_def *end = tbl->defs + tbl->size; in rtw89_rfk_parser()
6459 _rfk_handler[p->flag](rtwdev, p); in rtw89_rfk_parser()
6540 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_tssi_ctrl_set_bandedge_cfg()
6554 data = chip->tssi_dbw_table->data[bandedge_cfg]; in rtw89_phy_tssi_ctrl_set_bandedge_cfg()
6606 for (idx = last; idx >= first; idx--) in rtw89_encode_chan_idx()
6617 (central_ch - rtw89_ch_base_table[idx]) >> 1); in rtw89_encode_chan_idx()
6643 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_config_edcca()
6644 struct rtw89_edcca_bak *edcca_bak = &rtwdev->hal.edcca_bak; in rtw89_phy_config_edcca()
6647 edcca_bak->a = in rtw89_phy_config_edcca()
6648 rtw89_phy_read32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6649 edcca_regs->edcca_mask); in rtw89_phy_config_edcca()
6650 edcca_bak->p = in rtw89_phy_config_edcca()
6651 rtw89_phy_read32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6652 edcca_regs->edcca_p_mask); in rtw89_phy_config_edcca()
6653 edcca_bak->ppdu = in rtw89_phy_config_edcca()
6654 rtw89_phy_read32_mask(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_config_edcca()
6655 edcca_regs->ppdu_mask); in rtw89_phy_config_edcca()
6657 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6658 edcca_regs->edcca_mask, EDCCA_MAX); in rtw89_phy_config_edcca()
6659 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6660 edcca_regs->edcca_p_mask, EDCCA_MAX); in rtw89_phy_config_edcca()
6661 rtw89_phy_write32_mask(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_config_edcca()
6662 edcca_regs->ppdu_mask, EDCCA_MAX); in rtw89_phy_config_edcca()
6664 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6665 edcca_regs->edcca_mask, in rtw89_phy_config_edcca()
6666 edcca_bak->a); in rtw89_phy_config_edcca()
6667 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6668 edcca_regs->edcca_p_mask, in rtw89_phy_config_edcca()
6669 edcca_bak->p); in rtw89_phy_config_edcca()
6670 rtw89_phy_write32_mask(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_config_edcca()
6671 edcca_regs->ppdu_mask, in rtw89_phy_config_edcca()
6672 edcca_bak->ppdu); in rtw89_phy_config_edcca()
6678 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_edcca_log()
6688 if (rtwdev->chip->chip_id == RTL8922A) in rtw89_phy_edcca_log()
6689 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel_be, in rtw89_phy_edcca_log()
6690 edcca_regs->rpt_sel_be_mask, 0); in rtw89_phy_edcca_log()
6692 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6693 edcca_regs->rpt_sel_mask, 0); in rtw89_phy_edcca_log()
6694 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_b); in rtw89_phy_edcca_log()
6705 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6706 edcca_regs->rpt_sel_mask, 4); in rtw89_phy_edcca_log()
6707 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_b); in rtw89_phy_edcca_log()
6711 per20_bitmap = rtw89_phy_read32_mask(rtwdev, edcca_regs->rpt_a, in rtw89_phy_edcca_log()
6714 if (rtwdev->chip->chip_id == RTL8922A) { in rtw89_phy_edcca_log()
6715 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel_be, in rtw89_phy_edcca_log()
6716 edcca_regs->rpt_sel_be_mask, 4); in rtw89_phy_edcca_log()
6717 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_b); in rtw89_phy_edcca_log()
6723 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel_be, in rtw89_phy_edcca_log()
6724 edcca_regs->rpt_sel_be_mask, 5); in rtw89_phy_edcca_log()
6725 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_b); in rtw89_phy_edcca_log()
6731 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6732 edcca_regs->rpt_sel_mask, 0); in rtw89_phy_edcca_log()
6733 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_a); in rtw89_phy_edcca_log()
6737 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6738 edcca_regs->rpt_sel_mask, 1); in rtw89_phy_edcca_log()
6739 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_a); in rtw89_phy_edcca_log()
6743 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6744 edcca_regs->rpt_sel_mask, 2); in rtw89_phy_edcca_log()
6745 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_a); in rtw89_phy_edcca_log()
6749 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6750 edcca_regs->rpt_sel_mask, 3); in rtw89_phy_edcca_log()
6751 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_a); in rtw89_phy_edcca_log()
6775 struct rtw89_phy_ch_info *ch_info = &rtwdev->ch_info; in rtw89_phy_edcca_get_thre_by_rssi()
6776 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_edcca_get_thre_by_rssi()
6777 u8 rssi_min = ch_info->rssi_min >> 1; in rtw89_phy_edcca_get_thre_by_rssi()
6783 edcca_thre = rssi_min - RSSI_UNIT_CONVER + EDCCA_UNIT_CONVER - in rtw89_phy_edcca_get_thre_by_rssi()
6793 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_edcca_thre_calc()
6794 struct rtw89_edcca_bak *edcca_bak = &rtwdev->hal.edcca_bak; in rtw89_phy_edcca_thre_calc()
6798 if (th == edcca_bak->th_old) in rtw89_phy_edcca_thre_calc()
6801 edcca_bak->th_old = th; in rtw89_phy_edcca_thre_calc()
6806 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_edcca_thre_calc()
6807 edcca_regs->edcca_mask, th); in rtw89_phy_edcca_thre_calc()
6808 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_edcca_thre_calc()
6809 edcca_regs->edcca_p_mask, th); in rtw89_phy_edcca_thre_calc()
6810 rtw89_phy_write32_mask(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_edcca_thre_calc()
6811 edcca_regs->ppdu_mask, th); in rtw89_phy_edcca_thre_calc()
6816 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_edcca_track()
6818 if (hal->disabled_dm_bitmap & BIT(RTW89_DM_DYNAMIC_EDCCA)) in rtw89_phy_edcca_track()
6830 rtwdev->dbcc_en, rtwdev->mlo_dbcc_mode, phy_idx); in rtw89_phy_get_kpath()
6832 switch (rtwdev->mlo_dbcc_mode) { in rtw89_phy_get_kpath()
6864 rtwdev->dbcc_en, rtwdev->mlo_dbcc_mode, phy_idx); in rtw89_phy_get_syn_sel()
6866 switch (rtwdev->mlo_dbcc_mode) { in rtw89_phy_get_syn_sel()