Lines Matching +full:- +full:1200 +full:ps
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
12 #include "ps.h"
20 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy0_phy1_offset()
22 return phy->phy0_phy1_offset(rtwdev, addr); in rtw89_phy0_phy1_offset()
28 u32 bit_rate = report->bit_rate; in get_max_amsdu_len()
35 if (report->might_fallback_legacy) in get_max_amsdu_len()
40 return 1200; in get_max_amsdu_len()
50 return rtwdev->chip->max_amsdu_limit; in get_max_amsdu_len()
66 ra_mask |= GENMASK_ULL(highest_mcs - gap, 0) << nss; in get_mcs_ra_mask()
69 ra_mask |= GENMASK_ULL(highest_mcs - gap * 2, 0) << nss; in get_mcs_ra_mask()
81 struct ieee80211_sta_he_cap cap = link_sta->he_cap; in get_he_ra_mask()
84 switch (link_sta->bandwidth) { in get_he_ra_mask()
124 struct ieee80211_sta_eht_cap *eht_cap = &link_sta->eht_cap; in get_eht_ra_mask()
127 u8 *he_phy_cap = link_sta->he_cap.he_cap_elem.phy_cap_info; in get_eht_ra_mask()
129 switch (link_sta->bandwidth) { in get_eht_ra_mask()
131 mcs_nss = &eht_cap->eht_mcs_nss_supp.bw._320; in get_eht_ra_mask()
133 return get_eht_mcs_ra_mask(mcs_nss->rx_tx_max_nss, 9, 3); in get_eht_ra_mask()
135 mcs_nss = &eht_cap->eht_mcs_nss_supp.bw._160; in get_eht_ra_mask()
137 return get_eht_mcs_ra_mask(mcs_nss->rx_tx_max_nss, 9, 3); in get_eht_ra_mask()
141 mcs_nss_20mhz = &eht_cap->eht_mcs_nss_supp.only_20mhz; in get_eht_ra_mask()
143 return get_eht_mcs_ra_mask(mcs_nss_20mhz->rx_tx_max_nss, 7, 4); in get_eht_ra_mask()
148 mcs_nss = &eht_cap->eht_mcs_nss_supp.bw._80; in get_eht_ra_mask()
150 return get_eht_mcs_ra_mask(mcs_nss->rx_tx_max_nss, 9, 3); in get_eht_ra_mask()
204 struct cfg80211_bitrate_mask *mask = &rtwsta_link->mask; in rtw89_phy_ra_mask_cfg()
208 if (!rtwsta_link->use_cfg_mask) in rtw89_phy_ra_mask_cfg()
209 return -1; in rtw89_phy_ra_mask_cfg()
211 switch (chan->band_type) { in rtw89_phy_ra_mask_cfg()
214 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_2GHZ].legacy, in rtw89_phy_ra_mask_cfg()
219 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_5GHZ].legacy, in rtw89_phy_ra_mask_cfg()
224 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_6GHZ].legacy, in rtw89_phy_ra_mask_cfg()
228 rtw89_warn(rtwdev, "unhandled band type %d\n", chan->band_type); in rtw89_phy_ra_mask_cfg()
229 return -1; in rtw89_phy_ra_mask_cfg()
232 if (link_sta->he_cap.has_he) { in rtw89_phy_ra_mask_cfg()
233 cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[0], in rtw89_phy_ra_mask_cfg()
235 cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[1], in rtw89_phy_ra_mask_cfg()
237 } else if (link_sta->vht_cap.vht_supported) { in rtw89_phy_ra_mask_cfg()
238 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0], in rtw89_phy_ra_mask_cfg()
240 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1], in rtw89_phy_ra_mask_cfg()
242 } else if (link_sta->ht_cap.ht_supported) { in rtw89_phy_ra_mask_cfg()
243 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0], in rtw89_phy_ra_mask_cfg()
245 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1], in rtw89_phy_ra_mask_cfg()
274 struct cfg80211_bitrate_mask *mask = &rtwsta_link->mask; in rtw89_phy_ra_gi_ltf()
275 u8 band = chan->band_type; in rtw89_phy_ra_gi_ltf()
277 u8 he_ltf = mask->control[nl_band].he_ltf; in rtw89_phy_ra_gi_ltf()
278 u8 he_gi = mask->control[nl_band].he_gi; in rtw89_phy_ra_gi_ltf()
282 if (rtwdev->chip->chip_id == RTL8852C && in rtw89_phy_ra_gi_ltf()
283 chan->band_width == RTW89_CHANNEL_WIDTH_160 && in rtw89_phy_ra_gi_ltf()
289 if (!(rtwsta_link->use_cfg_mask && link_sta->he_cap.has_he)) in rtw89_phy_ra_gi_ltf()
313 struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif_link->rate_pattern; in rtw89_phy_ra_sta_update()
314 struct rtw89_ra_info *ra = &rtwsta_link->ra; in rtw89_phy_ra_sta_update()
316 rtwvif_link->chanctx_idx); in rtw89_phy_ra_sta_update()
318 u8 rssi = ewma_rssi_read(&rtwsta_link->avg_rssi); in rtw89_phy_ra_sta_update()
333 if (link_sta->eht_cap.has_eht) { in rtw89_phy_ra_sta_update()
337 if (rtwdev->hal.no_mcs_12_13) in rtw89_phy_ra_sta_update()
344 } else if (link_sta->he_cap.has_he) { in rtw89_phy_ra_sta_update()
349 if (link_sta->he_cap.he_cap_elem.phy_cap_info[2] & in rtw89_phy_ra_sta_update()
352 if (link_sta->he_cap.he_cap_elem.phy_cap_info[1] & in rtw89_phy_ra_sta_update()
357 } else if (link_sta->vht_cap.vht_supported) { in rtw89_phy_ra_sta_update()
358 u16 mcs_map = le16_to_cpu(link_sta->vht_cap.vht_mcs.rx_mcs_map); in rtw89_phy_ra_sta_update()
362 /* MCS9 (non-20MHz), MCS8, MCS7 */ in rtw89_phy_ra_sta_update()
363 if (link_sta->bandwidth == IEEE80211_STA_RX_BW_20) in rtw89_phy_ra_sta_update()
368 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) in rtw89_phy_ra_sta_update()
370 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) in rtw89_phy_ra_sta_update()
372 } else if (link_sta->ht_cap.ht_supported) { in rtw89_phy_ra_sta_update()
375 ra_mask |= ((u64)link_sta->ht_cap.mcs.rx_mask[3] << 48) | in rtw89_phy_ra_sta_update()
376 ((u64)link_sta->ht_cap.mcs.rx_mask[2] << 36) | in rtw89_phy_ra_sta_update()
377 ((u64)link_sta->ht_cap.mcs.rx_mask[1] << 24) | in rtw89_phy_ra_sta_update()
378 ((u64)link_sta->ht_cap.mcs.rx_mask[0] << 12); in rtw89_phy_ra_sta_update()
380 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) in rtw89_phy_ra_sta_update()
382 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING) in rtw89_phy_ra_sta_update()
386 switch (chan->band_type) { in rtw89_phy_ra_sta_update()
388 ra_mask |= link_sta->supp_rates[NL80211_BAND_2GHZ]; in rtw89_phy_ra_sta_update()
389 if (link_sta->supp_rates[NL80211_BAND_2GHZ] & 0xf) in rtw89_phy_ra_sta_update()
391 if (link_sta->supp_rates[NL80211_BAND_2GHZ] & 0xff0) in rtw89_phy_ra_sta_update()
395 ra_mask |= (u64)link_sta->supp_rates[NL80211_BAND_5GHZ] << 4; in rtw89_phy_ra_sta_update()
399 ra_mask |= (u64)link_sta->supp_rates[NL80211_BAND_6GHZ] << 4; in rtw89_phy_ra_sta_update()
411 for (i = 0; i < rtwdev->hal.tx_nss; i++) in rtw89_phy_ra_sta_update()
428 switch (link_sta->bandwidth) { in rtw89_phy_ra_sta_update()
431 sgi = link_sta->vht_cap.vht_supported && in rtw89_phy_ra_sta_update()
432 (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160); in rtw89_phy_ra_sta_update()
436 sgi = link_sta->vht_cap.vht_supported && in rtw89_phy_ra_sta_update()
437 (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80); in rtw89_phy_ra_sta_update()
441 sgi = link_sta->ht_cap.ht_supported && in rtw89_phy_ra_sta_update()
442 (link_sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40); in rtw89_phy_ra_sta_update()
446 sgi = link_sta->ht_cap.ht_supported && in rtw89_phy_ra_sta_update()
447 (link_sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20); in rtw89_phy_ra_sta_update()
451 if (link_sta->he_cap.he_cap_elem.phy_cap_info[3] & in rtw89_phy_ra_sta_update()
453 ra->dcm_cap = 1; in rtw89_phy_ra_sta_update()
455 if (rate_pattern->enable && !p2p) { in rtw89_phy_ra_sta_update()
457 ra_mask &= rate_pattern->ra_mask; in rtw89_phy_ra_sta_update()
458 mode = rate_pattern->ra_mode; in rtw89_phy_ra_sta_update()
461 ra->bw_cap = bw_mode; in rtw89_phy_ra_sta_update()
462 ra->er_cap = rtwsta_link->er_cap; in rtw89_phy_ra_sta_update()
463 ra->mode_ctrl = mode; in rtw89_phy_ra_sta_update()
464 ra->macid = rtwsta_link->mac_id; in rtw89_phy_ra_sta_update()
465 ra->stbc_cap = stbc_en; in rtw89_phy_ra_sta_update()
466 ra->ldpc_cap = ldpc_en; in rtw89_phy_ra_sta_update()
467 ra->ss_num = min(link_sta->rx_nss, rtwdev->hal.tx_nss) - 1; in rtw89_phy_ra_sta_update()
468 ra->en_sgi = sgi; in rtw89_phy_ra_sta_update()
469 ra->ra_mask = ra_mask; in rtw89_phy_ra_sta_update()
470 ra->fix_giltf_en = fix_giltf_en; in rtw89_phy_ra_sta_update()
471 ra->fix_giltf = fix_giltf; in rtw89_phy_ra_sta_update()
476 ra->fixed_csi_rate_en = false; in rtw89_phy_ra_sta_update()
477 ra->ra_csi_rate_en = true; in rtw89_phy_ra_sta_update()
478 ra->cr_tbl_sel = false; in rtw89_phy_ra_sta_update()
479 ra->band_num = rtwvif_link->phy_idx; in rtw89_phy_ra_sta_update()
480 ra->csi_bw = bw_mode; in rtw89_phy_ra_sta_update()
481 ra->csi_gi_ltf = RTW89_GILTF_LGI_4XHE32; in rtw89_phy_ra_sta_update()
482 ra->csi_mcs_ss_idx = 5; in rtw89_phy_ra_sta_update()
483 ra->csi_mode = csi_mode; in rtw89_phy_ra_sta_update()
490 struct rtw89_vif_link *rtwvif_link = rtwsta_link->rtwvif_link; in rtw89_phy_ra_update_sta_link()
492 struct rtw89_ra_info *ra = &rtwsta_link->ra; in rtw89_phy_ra_update_sta_link()
499 link_sta, vif->p2p, false); in rtw89_phy_ra_update_sta_link()
504 ra->upd_mask = 1; in rtw89_phy_ra_update_sta_link()
506 ra->upd_bw_nss_mask = 1; in rtw89_phy_ra_update_sta_link()
510 ra->macid, in rtw89_phy_ra_update_sta_link()
511 ra->bw_cap, in rtw89_phy_ra_update_sta_link()
512 ra->ss_num, in rtw89_phy_ra_update_sta_link()
513 ra->en_sgi, in rtw89_phy_ra_update_sta_link()
514 ra->giltf); in rtw89_phy_ra_update_sta_link()
546 if (next->enable) in __check_rate_pattern()
550 next->rate = rate_base + c; in __check_rate_pattern()
551 next->ra_mode = ra_mode; in __check_rate_pattern()
552 next->ra_mask = ra_mask; in __check_rate_pattern()
553 next->enable = true; in __check_rate_pattern()
572 rtwvif_link->chanctx_idx); in __rtw89_phy_rate_pattern_vif()
591 u8 band = chan->band_type; in __rtw89_phy_rate_pattern_vif()
593 enum rtw89_chip_gen chip_gen = rtwdev->chip->chip_gen; in __rtw89_phy_rate_pattern_vif()
594 u8 tx_nss = rtwdev->hal.tx_nss; in __rtw89_phy_rate_pattern_vif()
600 mask->control[nl_band].he_mcs[i], in __rtw89_phy_rate_pattern_vif()
607 mask->control[nl_band].vht_mcs[i], in __rtw89_phy_rate_pattern_vif()
614 mask->control[nl_band].ht_mcs[i], in __rtw89_phy_rate_pattern_vif()
622 sband = rtwdev->hw->wiphy->bands[nl_band]; in __rtw89_phy_rate_pattern_vif()
627 mask->control[nl_band].legacy, in __rtw89_phy_rate_pattern_vif()
628 BIT(sband->n_bitrates) - 1, false)) in __rtw89_phy_rate_pattern_vif()
633 mask->control[nl_band].legacy, in __rtw89_phy_rate_pattern_vif()
634 BIT(sband->n_bitrates) - 1, false)) in __rtw89_phy_rate_pattern_vif()
641 rtwvif_link->rate_pattern = next_pattern; in __rtw89_phy_rate_pattern_vif()
650 rtwvif_link->rate_pattern.enable = false; in __rtw89_phy_rate_pattern_vif()
675 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_ra_update()
682 struct rtw89_vif_link *rtwvif_link = rtwsta_link->rtwvif_link; in rtw89_phy_ra_assoc()
684 struct rtw89_ra_info *ra = &rtwsta_link->ra; in rtw89_phy_ra_assoc()
685 u8 rssi = ewma_rssi_read(&rtwsta_link->avg_rssi) >> RSSI_FACTOR; in rtw89_phy_ra_assoc()
695 link_sta, vif->p2p, csi); in rtw89_phy_ra_assoc()
700 ra->init_rate_lv = 1; in rtw89_phy_ra_assoc()
702 ra->init_rate_lv = 2; in rtw89_phy_ra_assoc()
704 ra->init_rate_lv = 3; in rtw89_phy_ra_assoc()
706 ra->init_rate_lv = 0; in rtw89_phy_ra_assoc()
707 ra->upd_all = 1; in rtw89_phy_ra_assoc()
710 ra->macid, in rtw89_phy_ra_assoc()
711 ra->mode_ctrl, in rtw89_phy_ra_assoc()
712 ra->bw_cap, in rtw89_phy_ra_assoc()
713 ra->ss_num, in rtw89_phy_ra_assoc()
714 ra->init_rate_lv); in rtw89_phy_ra_assoc()
717 ra->dcm_cap, in rtw89_phy_ra_assoc()
718 ra->er_cap, in rtw89_phy_ra_assoc()
719 ra->ldpc_cap, in rtw89_phy_ra_assoc()
720 ra->stbc_cap, in rtw89_phy_ra_assoc()
721 ra->en_sgi, in rtw89_phy_ra_assoc()
722 ra->giltf); in rtw89_phy_ra_assoc()
731 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_get_txsc()
732 u8 pri_ch = chan->primary_channel; in rtw89_phy_get_txsc()
733 u8 central_ch = chan->channel; in rtw89_phy_get_txsc()
747 txsc_idx = (pri_ch - central_ch) >> 1; in rtw89_phy_get_txsc()
749 txsc_idx = ((central_ch - pri_ch) >> 1) + 1; in rtw89_phy_get_txsc()
756 tmp = (pri_ch - central_ch) >> 1; in rtw89_phy_get_txsc()
758 tmp = ((central_ch - pri_ch) >> 1) + 1; in rtw89_phy_get_txsc()
780 txsc_idx = (10 - (pri_ch - central_ch)) >> 1; in rtw89_phy_get_txsc()
782 txsc_idx = ((central_ch - pri_ch) >> 1) + 5; in rtw89_phy_get_txsc()
800 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_get_txsb()
801 u8 pri_ch = chan->primary_channel; in rtw89_phy_get_txsb()
802 u8 central_ch = chan->channel; in rtw89_phy_get_txsb()
814 txsb_idx = (pri_ch - central_ch + 6) / 4; in rtw89_phy_get_txsb()
820 txsb_idx = (pri_ch - central_ch + 14) / 4; in rtw89_phy_get_txsb()
822 txsb_idx = (pri_ch - central_ch + 12) / 8; in rtw89_phy_get_txsb()
828 txsb_idx = (pri_ch - central_ch + 30) / 4; in rtw89_phy_get_txsb()
830 txsb_idx = (pri_ch - central_ch + 28) / 8; in rtw89_phy_get_txsb()
832 txsb_idx = (pri_ch - central_ch + 24) / 16; in rtw89_phy_get_txsb()
853 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_read_rf()
854 const u32 *base_addr = chip->rf_base_addr; in rtw89_phy_read_rf()
857 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf()
910 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf_v1()
975 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf_v2()
990 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_write_rf()
991 const u32 *base_addr = chip->rf_base_addr; in rtw89_phy_write_rf()
994 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf()
1054 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf_v1()
1114 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf_v2()
1128 return rtwdev->chip->ops->write_rf == rtw89_phy_write_rf_v1; in rtw89_chip_rf_v1()
1134 const struct rtw89_chip_info *chip = rtwdev->chip; in __rtw89_phy_bb_reset()
1136 chip->ops->bb_reset(rtwdev, phy_idx); in __rtw89_phy_bb_reset()
1142 if (rtwdev->dbcc_en) in rtw89_phy_bb_reset()
1153 if (reg->addr == 0xfe) { in rtw89_phy_config_bb_reg()
1155 } else if (reg->addr == 0xfd) { in rtw89_phy_config_bb_reg()
1157 } else if (reg->addr == 0xfc) { in rtw89_phy_config_bb_reg()
1159 } else if (reg->addr == 0xfb) { in rtw89_phy_config_bb_reg()
1161 } else if (reg->addr == 0xfa) { in rtw89_phy_config_bb_reg()
1163 } else if (reg->addr == 0xf9) { in rtw89_phy_config_bb_reg()
1165 } else if (reg->data == BYPASS_CR_DATA) { in rtw89_phy_config_bb_reg()
1166 rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "Bypass CR 0x%x\n", reg->addr); in rtw89_phy_config_bb_reg()
1168 addr = reg->addr; in rtw89_phy_config_bb_reg()
1171 addr += rtw89_phy0_phy1_offset(rtwdev, reg->addr); in rtw89_phy_config_bb_reg()
1173 rtw89_phy_write32(rtwdev, addr, reg->data); in rtw89_phy_config_bb_reg()
1197 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_gain_error()
1206 gain->lna_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
1210 gain->lna_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
1214 gain->tia_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
1236 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_rpl_ofst()
1247 gain->rpl_ofst_20[gband][path] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1251 gain->rpl_ofst_40[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1256 gain->rpl_ofst_40[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1262 gain->rpl_ofst_80[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1267 gain->rpl_ofst_80[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1273 gain->rpl_ofst_80[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1279 gain->rpl_ofst_160[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1284 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1290 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1296 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1302 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1318 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_gain_bypass()
1327 gain->lna_gain_bypass[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_bypass()
1331 gain->lna_gain_bypass[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_bypass()
1345 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_gain_op1db()
1354 gain->lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1358 gain->lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1362 gain->tia_lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1366 gain->tia_lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1381 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_config_bb_gain_ax()
1382 union rtw89_phy_bb_gain_arg arg = { .addr = reg->addr }; in rtw89_phy_config_bb_gain_ax()
1383 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw89_phy_config_bb_gain_ax()
1388 if (arg.path >= chip->rf_path_num) in rtw89_phy_config_bb_gain_ax()
1398 rtw89_phy_cfg_bb_gain_error(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1401 rtw89_phy_cfg_bb_rpl_ofst(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1404 rtw89_phy_cfg_bb_gain_bypass(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1407 rtw89_phy_cfg_bb_gain_op1db(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1411 if (efuse->rfe_type < 50) in rtw89_phy_config_bb_gain_ax()
1417 arg.addr, reg->data, arg.cfg_type); in rtw89_phy_config_bb_gain_ax()
1428 u16 idx = info->curr_idx % RTW89_H2C_RF_PAGE_SIZE; in rtw89_phy_cofig_rf_reg_store()
1429 u8 page = info->curr_idx / RTW89_H2C_RF_PAGE_SIZE; in rtw89_phy_cofig_rf_reg_store()
1433 rf_path, info->curr_idx); in rtw89_phy_cofig_rf_reg_store()
1437 info->rtw89_phy_config_rf_h2c[page][idx] = in rtw89_phy_cofig_rf_reg_store()
1438 cpu_to_le32((reg->addr << 20) | reg->data); in rtw89_phy_cofig_rf_reg_store()
1439 info->curr_idx++; in rtw89_phy_cofig_rf_reg_store()
1445 u16 remain = info->curr_idx; in rtw89_phy_config_rf_reg_fw()
1454 ret = -EINVAL; in rtw89_phy_config_rf_reg_fw()
1458 for (i = 0; i < RTW89_H2C_RF_PAGE_NUM && remain; i++, remain -= len) { in rtw89_phy_config_rf_reg_fw()
1465 info->curr_idx = 0; in rtw89_phy_config_rf_reg_fw()
1475 u32 addr = reg->addr; in rtw89_phy_config_rf_reg_noio()
1493 if (reg->addr == 0xfe) { in rtw89_phy_config_rf_reg()
1495 } else if (reg->addr == 0xfd) { in rtw89_phy_config_rf_reg()
1497 } else if (reg->addr == 0xfc) { in rtw89_phy_config_rf_reg()
1499 } else if (reg->addr == 0xfb) { in rtw89_phy_config_rf_reg()
1501 } else if (reg->addr == 0xfa) { in rtw89_phy_config_rf_reg()
1503 } else if (reg->addr == 0xf9) { in rtw89_phy_config_rf_reg()
1506 rtw89_write_rf(rtwdev, rf_path, reg->addr, 0xfffff, reg->data); in rtw89_phy_config_rf_reg()
1517 rtw89_write_rf(rtwdev, rf_path, reg->addr, RFREG_MASK, reg->data); in rtw89_phy_config_rf_reg_v1()
1519 if (reg->addr < 0x100) in rtw89_phy_config_rf_reg_v1()
1540 for (i = 0; i < table->n_regs; i++) { in rtw89_phy_sel_headline()
1541 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1542 headline = get_phy_headline(reg->addr); in rtw89_phy_sel_headline()
1553 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1554 target = get_phy_target(reg->addr); in rtw89_phy_sel_headline()
1564 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1565 target = get_phy_target(reg->addr); in rtw89_phy_sel_headline()
1574 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1575 rfe_para = get_phy_cond_rfe(reg->addr); in rtw89_phy_sel_headline()
1576 cv_para = get_phy_cond_cv(reg->addr); in rtw89_phy_sel_headline()
1591 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1592 rfe_para = get_phy_cond_rfe(reg->addr); in rtw89_phy_sel_headline()
1593 cv_para = get_phy_cond_cv(reg->addr); in rtw89_phy_sel_headline()
1606 return -EINVAL; in rtw89_phy_sel_headline()
1618 enum rtw89_rf_path rf_path = table->rf_path; in rtw89_phy_init_reg()
1619 u8 rfe = rtwdev->efuse.rfe_type; in rtw89_phy_init_reg()
1620 u8 cv = rtwdev->hal.cv; in rtw89_phy_init_reg()
1636 cfg_target = get_phy_target(table->regs[headline_idx].addr); in rtw89_phy_init_reg()
1637 for (i = headline_size; i < table->n_regs; i++) { in rtw89_phy_init_reg()
1638 reg = &table->regs[i]; in rtw89_phy_init_reg()
1639 cond = get_phy_cond(reg->addr); in rtw89_phy_init_reg()
1643 target = get_phy_target(reg->addr); in rtw89_phy_init_reg()
1649 reg->addr, reg->data); in rtw89_phy_init_reg()
1681 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_bb_reg()
1682 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_bb_reg()
1686 bb_table = elm_info->bb_tbl ? elm_info->bb_tbl : chip->bb_table; in rtw89_phy_init_bb_reg()
1688 if (rtwdev->dbcc_en) in rtw89_phy_init_bb_reg()
1694 bb_gain_table = elm_info->bb_gain ? elm_info->bb_gain : chip->bb_gain_table; in rtw89_phy_init_bb_reg()
1697 chip->phy_def->config_bb_gain, NULL); in rtw89_phy_init_bb_reg()
1713 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_rf_reg()
1714 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_rf_reg()
1723 for (path = RF_PATH_A; path < chip->rf_path_num; path++) { in rtw89_phy_init_rf_reg()
1724 rf_table = elm_info->rf_radio[path] ? in rtw89_phy_init_rf_reg()
1725 elm_info->rf_radio[path] : chip->rf_table[path]; in rtw89_phy_init_rf_reg()
1726 rf_reg_info->rf_path = rf_table->rf_path; in rtw89_phy_init_rf_reg()
1730 config = rf_table->config ? rf_table->config : in rtw89_phy_init_rf_reg()
1735 rf_reg_info->rf_path); in rtw89_phy_init_rf_reg()
1742 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_preinit_rf_nctl_ax()
1750 if (chip->chip_id != RTL8851B) in rtw89_phy_preinit_rf_nctl_ax()
1752 if (chip->chip_id == RTL8852B || chip->chip_id == RTL8852BT) in rtw89_phy_preinit_rf_nctl_ax()
1766 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_rf_nctl()
1767 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_rf_nctl()
1772 nctl_table = elm_info->rf_nctl ? elm_info->rf_nctl : chip->nctl_table; in rtw89_phy_init_rf_nctl()
1775 if (chip->nctl_post_table) in rtw89_phy_init_rf_nctl()
1776 rtw89_rfk_parser(rtwdev, chip->nctl_post_table); in rtw89_phy_init_rf_nctl()
1813 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_write32_idx()
1822 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_write32_idx_set()
1831 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_write32_idx_clr()
1840 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_read32_idx()
1851 if (!rtwdev->dbcc_en) in rtw89_phy_set_phy_regs()
1864 for (i = 0; i < tbl->size; i++) { in rtw89_phy_write_reg3_tbl()
1865 reg3 = &tbl->reg3[i]; in rtw89_phy_write_reg3_tbl()
1866 rtw89_phy_write32_mask(rtwdev, reg3->addr, reg3->mask, reg3->data); in rtw89_phy_write_reg3_tbl()
1885 #define RTW89_ANT_GAIN_2GHZ_MIN -8
1887 #define RTW89_ANT_GAIN_5GHZ_MIN -8
1889 #define RTW89_ANT_GAIN_6GHZ_MIN -8
1898 struct rtw89_ant_gain_info *ant_gain = &rtwdev->ant_gain; in rtw89_phy_ant_gain_init()
1899 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ant_gain_init()
1907 if (!chip->support_ant_gain) in rtw89_phy_ant_gain_init()
1932 ant_gain->regd_enabled |= BIT(regd); in rtw89_phy_ant_gain_init()
1941 val = RTW89_ANT_GAIN_REF_2GHZ - in rtw89_phy_ant_gain_init()
1950 val = RTW89_ANT_GAIN_REF_5GHZ - in rtw89_phy_ant_gain_init()
1961 val = RTW89_ANT_GAIN_REF_6GHZ - in rtw89_phy_ant_gain_init()
1966 ant_gain->offset[i][j] = val; in rtw89_phy_ant_gain_init()
2015 struct rtw89_ant_gain_info *ant_gain = &rtwdev->ant_gain; in rtw89_phy_ant_gain_query()
2022 subband_l = span->ant_gain_subband_low; in rtw89_phy_ant_gain_query()
2023 subband_h = span->ant_gain_subband_high; in rtw89_phy_ant_gain_query()
2033 return min(ant_gain->offset[path][subband_l], in rtw89_phy_ant_gain_query()
2034 ant_gain->offset[path][subband_h]); in rtw89_phy_ant_gain_query()
2039 struct rtw89_ant_gain_info *ant_gain = &rtwdev->ant_gain; in rtw89_phy_ant_gain_offset()
2040 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ant_gain_offset()
2044 if (!chip->support_ant_gain) in rtw89_phy_ant_gain_offset()
2047 if (ant_gain->block_country || !(ant_gain->regd_enabled & BIT(regd))) in rtw89_phy_ant_gain_offset()
2053 if (RTW89_CHK_FW_FEATURE(NO_POWER_DIFFERENCE, &rtwdev->fw)) in rtw89_phy_ant_gain_offset()
2062 struct rtw89_ant_gain_info *ant_gain = &rtwdev->ant_gain; in rtw89_phy_ant_gain_pwr_offset()
2063 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ant_gain_pwr_offset()
2064 u8 regd = rtw89_regd_get(rtwdev, chan->band_type); in rtw89_phy_ant_gain_pwr_offset()
2067 if (!chip->support_ant_gain) in rtw89_phy_ant_gain_pwr_offset()
2070 if (ant_gain->block_country || !(ant_gain->regd_enabled & BIT(regd))) in rtw89_phy_ant_gain_pwr_offset()
2073 if (RTW89_CHK_FW_FEATURE(NO_POWER_DIFFERENCE, &rtwdev->fw)) in rtw89_phy_ant_gain_pwr_offset()
2076 offset_patha = rtw89_phy_ant_gain_query(rtwdev, RF_PATH_A, chan->freq); in rtw89_phy_ant_gain_pwr_offset()
2077 offset_pathb = rtw89_phy_ant_gain_query(rtwdev, RF_PATH_B, chan->freq); in rtw89_phy_ant_gain_pwr_offset()
2079 return rtw89_phy_txpwr_rf_to_bb(rtwdev, offset_patha - offset_pathb); in rtw89_phy_ant_gain_pwr_offset()
2086 struct rtw89_ant_gain_info *ant_gain = &rtwdev->ant_gain; in rtw89_print_ant_gain()
2087 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_print_ant_gain()
2088 u8 regd = rtw89_regd_get(rtwdev, chan->band_type); in rtw89_print_ant_gain()
2092 if (!(chip->support_ant_gain && (ant_gain->regd_enabled & BIT(regd))) || in rtw89_print_ant_gain()
2093 ant_gain->block_country) { in rtw89_print_ant_gain()
2094 p += scnprintf(p, end - p, "no DAG is applied\n"); in rtw89_print_ant_gain()
2098 offset_patha = rtw89_phy_ant_gain_query(rtwdev, RF_PATH_A, chan->freq); in rtw89_print_ant_gain()
2099 offset_pathb = rtw89_phy_ant_gain_query(rtwdev, RF_PATH_B, chan->freq); in rtw89_print_ant_gain()
2101 p += scnprintf(p, end - p, "ChainA offset: %d dBm\n", offset_patha); in rtw89_print_ant_gain()
2102 p += scnprintf(p, end - p, "ChainB offset: %d dBm\n", offset_pathb); in rtw89_print_ant_gain()
2105 return p - buf; in rtw89_print_ant_gain()
2128 switch (desc->rs) { in rtw89_phy_raw_byr_seek()
2130 return &head->cck[desc->idx]; in rtw89_phy_raw_byr_seek()
2132 return &head->ofdm[desc->idx]; in rtw89_phy_raw_byr_seek()
2134 return &head->mcs[desc->ofdma][desc->nss][desc->idx]; in rtw89_phy_raw_byr_seek()
2136 return &head->hedcm[desc->ofdma][desc->nss][desc->idx]; in rtw89_phy_raw_byr_seek()
2138 return &head->offset[desc->idx]; in rtw89_phy_raw_byr_seek()
2140 rtw89_warn(rtwdev, "unrecognized byr rs: %d\n", desc->rs); in rtw89_phy_raw_byr_seek()
2141 return &head->trap; in rtw89_phy_raw_byr_seek()
2148 const struct rtw89_txpwr_byrate_cfg *cfg = tbl->data; in rtw89_phy_load_txpwr_byrate()
2149 const struct rtw89_txpwr_byrate_cfg *end = cfg + tbl->size; in rtw89_phy_load_txpwr_byrate()
2157 byr_head = &rtwdev->byr[cfg->band][0]; in rtw89_phy_load_txpwr_byrate()
2158 desc.rs = cfg->rs; in rtw89_phy_load_txpwr_byrate()
2159 desc.nss = cfg->nss; in rtw89_phy_load_txpwr_byrate()
2160 data = cfg->data; in rtw89_phy_load_txpwr_byrate()
2162 for (i = 0; i < cfg->len; i++, data >>= 8) { in rtw89_phy_load_txpwr_byrate()
2163 desc.idx = cfg->shf + i; in rtw89_phy_load_txpwr_byrate()
2177 dbm -= tssi_max_deviation; in rtw89_phy_txpwr_dbm_without_tolerance()
2184 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_get_tpe_constraint()
2185 const struct rtw89_reg_6ghz_tpe *tpe = ®ulatory->reg_6ghz_tpe; in rtw89_phy_get_tpe_constraint()
2188 if (band == RTW89_BAND_6G && tpe->valid) in rtw89_phy_get_tpe_constraint()
2189 cstr = rtw89_phy_txpwr_dbm_without_tolerance(tpe->constraint); in rtw89_phy_get_tpe_constraint()
2200 if (rate_desc->rs == RTW89_RS_CCK) in rtw89_phy_read_txpwr_byrate()
2203 byr_head = &rtwdev->byr[band][bw]; in rtw89_phy_read_txpwr_byrate()
2213 return (channel_6g - 1) / 2; in rtw89_channel_6g_to_idx()
2215 return (channel_6g - 3) / 2; in rtw89_channel_6g_to_idx()
2217 return (channel_6g - 5) / 2; in rtw89_channel_6g_to_idx()
2219 return (channel_6g - 7) / 2; in rtw89_channel_6g_to_idx()
2221 return (channel_6g - 9) / 2; in rtw89_channel_6g_to_idx()
2223 return (channel_6g - 11) / 2; in rtw89_channel_6g_to_idx()
2225 return (channel_6g - 13) / 2; in rtw89_channel_6g_to_idx()
2227 return (channel_6g - 15) / 2; in rtw89_channel_6g_to_idx()
2241 return channel - 1; in rtw89_channel_to_idx()
2243 return (channel - 36) / 2; in rtw89_channel_to_idx()
2245 return ((channel - 100) / 2) + 15; in rtw89_channel_to_idx()
2247 return ((channel - 149) / 2) + 38; in rtw89_channel_to_idx()
2257 const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; in rtw89_phy_read_txpwr_limit()
2258 const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; in rtw89_phy_read_txpwr_limit()
2259 const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; in rtw89_phy_read_txpwr_limit()
2260 const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; in rtw89_phy_read_txpwr_limit()
2261 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_read_txpwr_limit()
2266 u8 reg6 = regulatory->reg_6ghz_power; in rtw89_phy_read_txpwr_limit()
2272 lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; in rtw89_phy_read_txpwr_limit()
2276 lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit()
2279 lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; in rtw89_phy_read_txpwr_limit()
2283 lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit()
2286 lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][regd][reg6][ch_idx]; in rtw89_phy_read_txpwr_limit()
2290 lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][RTW89_WW] in rtw89_phy_read_txpwr_limit()
2323 __fill_txpwr_limit_nonbf_bf(lmt->cck_20m, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_20m_ax()
2325 __fill_txpwr_limit_nonbf_bf(lmt->cck_40m, band, RTW89_CHANNEL_WIDTH_40, in rtw89_phy_fill_txpwr_limit_20m_ax()
2327 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_20m_ax()
2329 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_20m_ax()
2338 __fill_txpwr_limit_nonbf_bf(lmt->cck_20m, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_40m_ax()
2339 ntx, RTW89_RS_CCK, ch - 2); in rtw89_phy_fill_txpwr_limit_40m_ax()
2340 __fill_txpwr_limit_nonbf_bf(lmt->cck_40m, band, RTW89_CHANNEL_WIDTH_40, in rtw89_phy_fill_txpwr_limit_40m_ax()
2342 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_40m_ax()
2344 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_40m_ax()
2346 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_40m_ax()
2347 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_40m_ax()
2350 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_40m_ax()
2363 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_80m_ax()
2365 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2367 ntx, RTW89_RS_MCS, ch - 6); in rtw89_phy_fill_txpwr_limit_80m_ax()
2368 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2370 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_80m_ax()
2371 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[2], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2374 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[3], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2377 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2379 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_80m_ax()
2380 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[1], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2383 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[0], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2388 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_80m_ax()
2393 lmt->mcs_40m_0p5[i] = min_t(s8, val_0p5_n[i], val_0p5_p[i]); in rtw89_phy_fill_txpwr_limit_80m_ax()
2407 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_160m_ax()
2411 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2413 ntx, RTW89_RS_MCS, ch - 14); in rtw89_phy_fill_txpwr_limit_160m_ax()
2414 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2416 ntx, RTW89_RS_MCS, ch - 10); in rtw89_phy_fill_txpwr_limit_160m_ax()
2417 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[2], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2419 ntx, RTW89_RS_MCS, ch - 6); in rtw89_phy_fill_txpwr_limit_160m_ax()
2420 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[3], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2422 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_160m_ax()
2423 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[4], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2426 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[5], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2429 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[6], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2432 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[7], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2437 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2439 ntx, RTW89_RS_MCS, ch - 12); in rtw89_phy_fill_txpwr_limit_160m_ax()
2440 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[1], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2442 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_160m_ax()
2443 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[2], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2446 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[3], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2451 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[0], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2453 ntx, RTW89_RS_MCS, ch - 8); in rtw89_phy_fill_txpwr_limit_160m_ax()
2454 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[1], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2459 __fill_txpwr_limit_nonbf_bf(lmt->mcs_160m, band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2465 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_160m_ax()
2470 lmt->mcs_40m_0p5[i] = min_t(s8, val_0p5_n[i], val_0p5_p[i]); in rtw89_phy_fill_txpwr_limit_160m_ax()
2474 ntx, RTW89_RS_MCS, ch - 8); in rtw89_phy_fill_txpwr_limit_160m_ax()
2479 lmt->mcs_40m_2p5[i] = min_t(s8, val_2p5_n[i], val_2p5_p[i]); in rtw89_phy_fill_txpwr_limit_160m_ax()
2488 u8 band = chan->band_type; in rtw89_phy_fill_txpwr_limit_ax()
2489 u8 pri_ch = chan->primary_channel; in rtw89_phy_fill_txpwr_limit_ax()
2490 u8 ch = chan->channel; in rtw89_phy_fill_txpwr_limit_ax()
2491 u8 bw = chan->band_width; in rtw89_phy_fill_txpwr_limit_ax()
2517 const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; in rtw89_phy_read_txpwr_limit_ru()
2518 const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; in rtw89_phy_read_txpwr_limit_ru()
2519 const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; in rtw89_phy_read_txpwr_limit_ru()
2520 const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; in rtw89_phy_read_txpwr_limit_ru()
2521 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_read_txpwr_limit_ru()
2526 u8 reg6 = regulatory->reg_6ghz_power; in rtw89_phy_read_txpwr_limit_ru()
2532 lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][regd][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2536 lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2539 lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][regd][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2543 lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2546 lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][regd][reg6][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2550 lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][RTW89_WW] in rtw89_phy_read_txpwr_limit_ru()
2572 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m_ax()
2575 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m_ax()
2578 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m_ax()
2588 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2590 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2591 lmt_ru->ru26[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2594 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2596 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2597 lmt_ru->ru52[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2600 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2602 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2603 lmt_ru->ru106[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2613 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2615 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2616 lmt_ru->ru26[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2618 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2619 lmt_ru->ru26[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2622 lmt_ru->ru26[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2625 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2627 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2628 lmt_ru->ru52[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2630 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2631 lmt_ru->ru52[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2634 lmt_ru->ru52[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2637 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2639 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2640 lmt_ru->ru106[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2642 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2643 lmt_ru->ru106[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2646 lmt_ru->ru106[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2656 static const int ofst[] = { -14, -10, -6, -2, 2, 6, 10, 14 }; in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2661 lmt_ru->ru26[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2665 lmt_ru->ru52[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2669 lmt_ru->ru106[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2682 u8 band = chan->band_type; in rtw89_phy_fill_txpwr_limit_ru_ax()
2683 u8 ch = chan->channel; in rtw89_phy_fill_txpwr_limit_ru_ax()
2684 u8 bw = chan->band_width; in rtw89_phy_fill_txpwr_limit_ru_ax()
2712 u8 max_nss_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_byrate_ax()
2720 u8 band = chan->band_type; in rtw89_phy_set_txpwr_byrate_ax()
2721 u8 ch = chan->channel; in rtw89_phy_set_txpwr_byrate_ax()
2773 u8 band = chan->band_type; in rtw89_phy_set_txpwr_offset_ax()
2797 u8 max_ntx_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_limit_ax()
2799 u8 ch = chan->channel; in rtw89_phy_set_txpwr_limit_ax()
2800 u8 bw = chan->band_width; in rtw89_phy_set_txpwr_limit_ax()
2832 u8 max_ntx_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_limit_ru_ax()
2834 u8 ch = chan->channel; in rtw89_phy_set_txpwr_limit_ru_ax()
2835 u8 bw = chan->band_width; in rtw89_phy_set_txpwr_limit_ru_ax()
2872 struct rtw89_dev *rtwdev = ra_data->rtwdev; in __rtw89_phy_c2h_ra_rpt_iter()
2874 (const struct rtw89_c2h_ra_rpt *)ra_data->c2h->data; in __rtw89_phy_c2h_ra_rpt_iter()
2875 struct rtw89_ra_report *ra_report = &rtwsta_link->ra_report; in __rtw89_phy_c2h_ra_rpt_iter()
2876 const struct rtw89_chip_info *chip = rtwdev->chip; in __rtw89_phy_c2h_ra_rpt_iter()
2877 bool format_v1 = chip->chip_gen == RTW89_CHIP_BE; in __rtw89_phy_c2h_ra_rpt_iter()
2884 mac_id = le32_get_bits(c2h->w2, RTW89_C2H_RA_RPT_W2_MACID); in __rtw89_phy_c2h_ra_rpt_iter()
2885 if (mac_id != rtwsta_link->mac_id) in __rtw89_phy_c2h_ra_rpt_iter()
2888 rate = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MCSNSS); in __rtw89_phy_c2h_ra_rpt_iter()
2889 bw = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_BW); in __rtw89_phy_c2h_ra_rpt_iter()
2890 giltf = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_GILTF); in __rtw89_phy_c2h_ra_rpt_iter()
2891 mode = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MD_SEL); in __rtw89_phy_c2h_ra_rpt_iter()
2894 t = le32_get_bits(c2h->w2, RTW89_C2H_RA_RPT_W2_MCSNSS_B7); in __rtw89_phy_c2h_ra_rpt_iter()
2896 t = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_BW_B2); in __rtw89_phy_c2h_ra_rpt_iter()
2898 t = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MD_SEL_B2); in __rtw89_phy_c2h_ra_rpt_iter()
2908 memset(&ra_report->txrate, 0, sizeof(ra_report->txrate)); in __rtw89_phy_c2h_ra_rpt_iter()
2912 ra_report->txrate.legacy = legacy_bitrate; in __rtw89_phy_c2h_ra_rpt_iter()
2915 ra_report->txrate.flags |= RATE_INFO_FLAGS_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
2916 if (RTW89_CHK_FW_FEATURE(OLD_HT_RA_FORMAT, &rtwdev->fw)) in __rtw89_phy_c2h_ra_rpt_iter()
2921 ra_report->txrate.mcs = rate; in __rtw89_phy_c2h_ra_rpt_iter()
2923 ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; in __rtw89_phy_c2h_ra_rpt_iter()
2924 mcs = ra_report->txrate.mcs & 0x07; in __rtw89_phy_c2h_ra_rpt_iter()
2927 ra_report->txrate.flags |= RATE_INFO_FLAGS_VHT_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
2928 ra_report->txrate.mcs = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2931 ra_report->txrate.nss = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2935 ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; in __rtw89_phy_c2h_ra_rpt_iter()
2936 mcs = ra_report->txrate.mcs; in __rtw89_phy_c2h_ra_rpt_iter()
2939 ra_report->txrate.flags |= RATE_INFO_FLAGS_HE_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
2940 ra_report->txrate.mcs = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2943 ra_report->txrate.nss = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2947 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_0_8; in __rtw89_phy_c2h_ra_rpt_iter()
2949 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_1_6; in __rtw89_phy_c2h_ra_rpt_iter()
2951 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_3_2; in __rtw89_phy_c2h_ra_rpt_iter()
2952 mcs = ra_report->txrate.mcs; in __rtw89_phy_c2h_ra_rpt_iter()
2955 ra_report->txrate.flags |= RATE_INFO_FLAGS_EHT_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
2956 ra_report->txrate.mcs = u8_get_bits(rate, RTW89_RA_RATE_MASK_MCS_V1); in __rtw89_phy_c2h_ra_rpt_iter()
2957 ra_report->txrate.nss = u8_get_bits(rate, RTW89_RA_RATE_MASK_NSS_V1) + 1; in __rtw89_phy_c2h_ra_rpt_iter()
2959 ra_report->txrate.eht_gi = NL80211_RATE_INFO_EHT_GI_0_8; in __rtw89_phy_c2h_ra_rpt_iter()
2961 ra_report->txrate.eht_gi = NL80211_RATE_INFO_EHT_GI_1_6; in __rtw89_phy_c2h_ra_rpt_iter()
2963 ra_report->txrate.eht_gi = NL80211_RATE_INFO_EHT_GI_3_2; in __rtw89_phy_c2h_ra_rpt_iter()
2964 mcs = ra_report->txrate.mcs; in __rtw89_phy_c2h_ra_rpt_iter()
2968 ra_report->txrate.bw = rtw89_hw_to_rate_info_bw(bw); in __rtw89_phy_c2h_ra_rpt_iter()
2969 ra_report->bit_rate = cfg80211_calculate_bitrate(&ra_report->txrate); in __rtw89_phy_c2h_ra_rpt_iter()
2970 ra_report->hw_rate = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2975 ra_report->might_fallback_legacy = mcs <= 2; in __rtw89_phy_c2h_ra_rpt_iter()
2976 link_sta->agg.max_rc_amsdu_len = get_max_amsdu_len(rtwdev, ra_report); in __rtw89_phy_c2h_ra_rpt_iter()
2977 rtwsta_link->max_agg_wait = link_sta->agg.max_rc_amsdu_len / 1500 - 1; in __rtw89_phy_c2h_ra_rpt_iter()
3005 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_c2h_ra_rpt()
3037 "[IQK] iqk->is_iqk_init = %x\n", iqk->is_iqk_init); in rtw89_phy_c2h_rfk_rpt_log()
3039 "[IQK] iqk->is_reload = %x\n", iqk->is_reload); in rtw89_phy_c2h_rfk_rpt_log()
3041 "[IQK] iqk->is_nbiqk = %x\n", iqk->is_nbiqk); in rtw89_phy_c2h_rfk_rpt_log()
3043 "[IQK] iqk->txiqk_en = %x\n", iqk->txiqk_en); in rtw89_phy_c2h_rfk_rpt_log()
3045 "[IQK] iqk->rxiqk_en = %x\n", iqk->rxiqk_en); in rtw89_phy_c2h_rfk_rpt_log()
3047 "[IQK] iqk->lok_en = %x\n", iqk->lok_en); in rtw89_phy_c2h_rfk_rpt_log()
3049 "[IQK] iqk->iqk_xym_en = %x\n", iqk->iqk_xym_en); in rtw89_phy_c2h_rfk_rpt_log()
3051 "[IQK] iqk->iqk_sram_en = %x\n", iqk->iqk_sram_en); in rtw89_phy_c2h_rfk_rpt_log()
3053 "[IQK] iqk->iqk_fft_en = %x\n", iqk->iqk_fft_en); in rtw89_phy_c2h_rfk_rpt_log()
3055 "[IQK] iqk->is_fw_iqk = %x\n", iqk->is_fw_iqk); in rtw89_phy_c2h_rfk_rpt_log()
3057 "[IQK] iqk->is_iqk_enable = %x\n", iqk->is_iqk_enable); in rtw89_phy_c2h_rfk_rpt_log()
3059 "[IQK] iqk->iqk_cfir_en = %x\n", iqk->iqk_cfir_en); in rtw89_phy_c2h_rfk_rpt_log()
3061 "[IQK] iqk->thermal_rek_en = %x\n", iqk->thermal_rek_en); in rtw89_phy_c2h_rfk_rpt_log()
3063 "[IQK] iqk->version = %x\n", iqk->version); in rtw89_phy_c2h_rfk_rpt_log()
3065 "[IQK] iqk->phy = %x\n", iqk->phy); in rtw89_phy_c2h_rfk_rpt_log()
3067 "[IQK] iqk->fwk_status = %x\n", iqk->fwk_status); in rtw89_phy_c2h_rfk_rpt_log()
3072 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_band[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3073 i, iqk->iqk_band[i]); in rtw89_phy_c2h_rfk_rpt_log()
3074 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_ch[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3075 i, iqk->iqk_ch[i]); in rtw89_phy_c2h_rfk_rpt_log()
3076 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_bw[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3077 i, iqk->iqk_bw[i]); in rtw89_phy_c2h_rfk_rpt_log()
3078 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->lok_idac[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3079 i, le32_to_cpu(iqk->lok_idac[i])); in rtw89_phy_c2h_rfk_rpt_log()
3080 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->lok_vbuf[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3081 i, le32_to_cpu(iqk->lok_vbuf[i])); in rtw89_phy_c2h_rfk_rpt_log()
3082 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_tx_fail[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3083 i, iqk->iqk_tx_fail[i]); in rtw89_phy_c2h_rfk_rpt_log()
3084 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_rx_fail[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3085 i, iqk->iqk_rx_fail[i]); in rtw89_phy_c2h_rfk_rpt_log()
3088 "[IQK] iqk->rftxgain[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3089 i, j, le32_to_cpu(iqk->rftxgain[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
3092 "[IQK] iqk->tx_xym[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3093 i, j, le32_to_cpu(iqk->tx_xym[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
3096 "[IQK] iqk->rfrxgain[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3097 i, j, le32_to_cpu(iqk->rfrxgain[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
3100 "[IQK] iqk->rx_xym[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3101 i, j, le32_to_cpu(iqk->rx_xym[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
3111 dpk->ver, dpk->idx, dpk->band, dpk->bw, dpk->ch, dpk->path_ok); in rtw89_phy_c2h_rfk_rpt_log()
3114 dpk->txagc, dpk->ther, dpk->gs, dpk->dc_i, dpk->dc_q); in rtw89_phy_c2h_rfk_rpt_log()
3117 dpk->corr_val, dpk->corr_idx, dpk->is_timeout, dpk->rxbb_ov); in rtw89_phy_c2h_rfk_rpt_log()
3128 dack->fwdack_ver, dack->fwdack_info_ver, 0x2); in rtw89_phy_c2h_rfk_rpt_log()
3132 dack->addck_timeout, dack->cdack_timeout, dack->dadck_timeout, in rtw89_phy_c2h_rfk_rpt_log()
3133 dack->adgaink_timeout, dack->msbk_timeout); in rtw89_phy_c2h_rfk_rpt_log()
3135 "[DACK]DACK fail = 0x%x\n", dack->dack_fail); in rtw89_phy_c2h_rfk_rpt_log()
3137 "[DACK]S0 WBADCK = [0x%x]\n", dack->wbdck_d[0]); in rtw89_phy_c2h_rfk_rpt_log()
3139 "[DACK]S1 WBADCK = [0x%x]\n", dack->wbdck_d[1]); in rtw89_phy_c2h_rfk_rpt_log()
3141 "[DACK]DRCK = [0x%x]\n", dack->rck_d); in rtw89_phy_c2h_rfk_rpt_log()
3143 dack->cdack_d[0][0][0], dack->cdack_d[0][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3145 dack->cdack_d[0][1][0], dack->cdack_d[0][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3147 dack->cdack_d[1][0][0], dack->cdack_d[1][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3149 dack->cdack_d[1][1][0], dack->cdack_d[1][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3152 ((u32)dack->addck2_hd[0][0][0] << 8) | dack->addck2_ld[0][0][0], in rtw89_phy_c2h_rfk_rpt_log()
3153 ((u32)dack->addck2_hd[0][0][1] << 8) | dack->addck2_ld[0][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3155 ((u32)dack->addck2_hd[0][1][0] << 8) | dack->addck2_ld[0][1][0], in rtw89_phy_c2h_rfk_rpt_log()
3156 ((u32)dack->addck2_hd[0][1][1] << 8) | dack->addck2_ld[0][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3158 ((u32)dack->addck2_hd[1][0][0] << 8) | dack->addck2_ld[1][0][0], in rtw89_phy_c2h_rfk_rpt_log()
3159 ((u32)dack->addck2_hd[1][0][1] << 8) | dack->addck2_ld[1][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3161 ((u32)dack->addck2_hd[1][1][0] << 8) | dack->addck2_ld[1][1][0], in rtw89_phy_c2h_rfk_rpt_log()
3162 ((u32)dack->addck2_hd[1][1][1] << 8) | dack->addck2_ld[1][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3165 dack->adgaink_d[0][0], dack->adgaink_d[0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3167 dack->adgaink_d[1][0], dack->adgaink_d[1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3170 dack->dadck_d[0][0], dack->dadck_d[0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3172 dack->dadck_d[1][0], dack->dadck_d[1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3175 ((u32)dack->biask_hd[0][0] << 8) | dack->biask_ld[0][0]); in rtw89_phy_c2h_rfk_rpt_log()
3177 ((u32)dack->biask_hd[1][0] << 8) | dack->biask_ld[1][0]); in rtw89_phy_c2h_rfk_rpt_log()
3182 dack->msbk_d[0][0][i]); in rtw89_phy_c2h_rfk_rpt_log()
3187 dack->msbk_d[0][1][i]); in rtw89_phy_c2h_rfk_rpt_log()
3192 dack->msbk_d[1][0][i]); in rtw89_phy_c2h_rfk_rpt_log()
3197 dack->msbk_d[1][1][i]); in rtw89_phy_c2h_rfk_rpt_log()
3206 rxdck->ver, rxdck->band, rxdck->bw, rxdck->ch, in rtw89_phy_c2h_rfk_rpt_log()
3207 rxdck->timeout); in rtw89_phy_c2h_rfk_rpt_log()
3219 i, j, k, tssi->alignment_power_cw_h[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
3222 i, j, k, tssi->alignment_power_cw_l[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
3225 i, j, k, tssi->alignment_power[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
3229 (tssi->alignment_power_cw_h[i][j][k] << 8) + in rtw89_phy_c2h_rfk_rpt_log()
3230 tssi->alignment_power_cw_l[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
3235 i, j, tssi->tssi_alimk_state[i][j]); in rtw89_phy_c2h_rfk_rpt_log()
3238 j, tssi->default_txagc_offset[0][j]); in rtw89_phy_c2h_rfk_rpt_log()
3249 le32_to_cpu(txgapk->r0x8010[0]), in rtw89_phy_c2h_rfk_rpt_log()
3250 le32_to_cpu(txgapk->r0x8010[1])); in rtw89_phy_c2h_rfk_rpt_log()
3252 txgapk->chk_id); in rtw89_phy_c2h_rfk_rpt_log()
3254 le32_to_cpu(txgapk->chk_cnt)); in rtw89_phy_c2h_rfk_rpt_log()
3256 txgapk->ver); in rtw89_phy_c2h_rfk_rpt_log()
3258 txgapk->rsv1); in rtw89_phy_c2h_rfk_rpt_log()
3261 (int)sizeof(txgapk->track_d[0]), txgapk->track_d[0]); in rtw89_phy_c2h_rfk_rpt_log()
3263 (int)sizeof(txgapk->power_d[0]), txgapk->power_d[0]); in rtw89_phy_c2h_rfk_rpt_log()
3265 (int)sizeof(txgapk->track_d[1]), txgapk->track_d[1]); in rtw89_phy_c2h_rfk_rpt_log()
3267 (int)sizeof(txgapk->power_d[1]), txgapk->power_d[1]); in rtw89_phy_c2h_rfk_rpt_log()
3282 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_c2h_rfk_run_log()
3291 if (!elm_info->rfk_log_fmt) in rtw89_phy_c2h_rfk_run_log()
3294 elm = elm_info->rfk_log_fmt->elm[func]; in rtw89_phy_c2h_rfk_run_log()
3295 fmt_idx = le32_to_cpu(log->fmt_idx); in rtw89_phy_c2h_rfk_run_log()
3296 if (!elm || fmt_idx >= elm->u.rfk_log_fmt.nr) in rtw89_phy_c2h_rfk_run_log()
3299 offset = le16_to_cpu(elm->u.rfk_log_fmt.offset[fmt_idx]); in rtw89_phy_c2h_rfk_run_log()
3303 rtw89_debug(rtwdev, RTW89_DBG_RFK, &elm->u.common.contents[offset], in rtw89_phy_c2h_rfk_run_log()
3304 le32_to_cpu(log->arg[0]), le32_to_cpu(log->arg[1]), in rtw89_phy_c2h_rfk_run_log()
3305 le32_to_cpu(log->arg[2]), le32_to_cpu(log->arg[3])); in rtw89_phy_c2h_rfk_run_log()
3314 struct rtw89_c2h_hdr *c2h_hdr = (struct rtw89_c2h_hdr *)c2h->data; in rtw89_phy_c2h_rfk_log()
3325 len -= sizeof(*c2h_hdr); in rtw89_phy_c2h_rfk_log()
3329 content_len = le16_to_cpu(log_hdr->len); in rtw89_phy_c2h_rfk_log()
3335 switch (log_hdr->type) { in rtw89_phy_c2h_rfk_log()
3338 log_hdr->content, content_len); in rtw89_phy_c2h_rfk_log()
3343 rfk_name, content_len, log_hdr->content); in rtw89_phy_c2h_rfk_log()
3347 log_hdr->content, content_len); in rtw89_phy_c2h_rfk_log()
3354 len -= chunk_len; in rtw89_phy_c2h_rfk_log()
3414 struct rtw89_rfk_wait_info *wait = &rtwdev->rfk_wait; in rtw89_phy_rfk_report_prep()
3416 wait->state = RTW89_RFK_STATE_START; in rtw89_phy_rfk_report_prep()
3417 wait->start_time = ktime_get(); in rtw89_phy_rfk_report_prep()
3418 reinit_completion(&wait->completion); in rtw89_phy_rfk_report_prep()
3425 struct rtw89_rfk_wait_info *wait = &rtwdev->rfk_wait; in rtw89_phy_rfk_report_wait()
3429 if (test_bit(RTW89_FLAG_SER_HANDLING, rtwdev->flags)) { in rtw89_phy_rfk_report_wait()
3434 time_left = wait_for_completion_timeout(&wait->completion, in rtw89_phy_rfk_report_wait()
3438 return -ETIMEDOUT; in rtw89_phy_rfk_report_wait()
3439 } else if (wait->state != RTW89_RFK_STATE_OK) { in rtw89_phy_rfk_report_wait()
3441 rfk_name, wait->state); in rtw89_phy_rfk_report_wait()
3442 return -EFAULT; in rtw89_phy_rfk_report_wait()
3447 rfk_name, ktime_ms_delta(ktime_get(), wait->start_time)); in rtw89_phy_rfk_report_wait()
3456 (const struct rtw89_c2h_rfk_report *)c2h->data; in rtw89_phy_c2h_rfk_report_state()
3457 struct rtw89_rfk_wait_info *wait = &rtwdev->rfk_wait; in rtw89_phy_c2h_rfk_report_state()
3459 wait->state = report->state; in rtw89_phy_c2h_rfk_report_state()
3460 wait->version = report->version; in rtw89_phy_c2h_rfk_report_state()
3462 complete(&wait->completion); in rtw89_phy_c2h_rfk_report_state()
3466 wait->state, wait->version, in rtw89_phy_c2h_rfk_report_state()
3467 (int)(len - sizeof(report->hdr)), &report->state); in rtw89_phy_c2h_rfk_report_state()
3474 (const struct rtw89_c2h_rf_tas_info *)c2h->data; in rtw89_phy_c2h_rfk_log_tas_pwr()
3475 const enum rtw89_sar_sources src = rtwdev->sar.src; in rtw89_phy_c2h_rfk_log_tas_pwr()
3476 struct rtw89_tas_info *tas = &rtwdev->tas; in rtw89_phy_c2h_rfk_log_tas_pwr()
3481 if (!tas->enable || src == RTW89_SAR_SOURCE_NONE) in rtw89_phy_c2h_rfk_log_tas_pwr()
3484 cur_idx = le32_to_cpu(rf_tas->cur_idx); in rtw89_phy_c2h_rfk_log_tas_pwr()
3486 txpwr = (s16)le16_to_cpu(rf_tas->txpwr_history[i]); in rtw89_phy_c2h_rfk_log_tas_pwr()
3494 tas->instant_txpwr = rtw89_db_to_linear(0); in rtw89_phy_c2h_rfk_log_tas_pwr()
3496 tas->instant_txpwr = DIV_ROUND_DOWN_ULL(linear, cur_idx); in rtw89_phy_c2h_rfk_log_tas_pwr()
3992 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in phy_tssi_get_ofdm_de()
3993 enum rtw89_band band = chan->band_type; in phy_tssi_get_ofdm_de()
3994 u8 ch = chan->channel; in phy_tssi_get_ofdm_de()
4014 de_1st = tssi_info->tssi_mcs[path][gidx_1st]; in phy_tssi_get_ofdm_de()
4015 de_2nd = tssi_info->tssi_mcs[path][gidx_2nd]; in phy_tssi_get_ofdm_de()
4022 val = tssi_info->tssi_mcs[path][gidx]; in phy_tssi_get_ofdm_de()
4040 de_1st = tssi_info->tssi_6g_mcs[path][gidx_1st]; in phy_tssi_get_ofdm_de()
4041 de_2nd = tssi_info->tssi_6g_mcs[path][gidx_2nd]; in phy_tssi_get_ofdm_de()
4048 val = tssi_info->tssi_6g_mcs[path][gidx]; in phy_tssi_get_ofdm_de()
4062 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in phy_tssi_get_ofdm_trim_de()
4063 enum rtw89_band band = chan->band_type; in phy_tssi_get_ofdm_trim_de()
4064 u8 ch = chan->channel; in phy_tssi_get_ofdm_trim_de()
4084 tde_1st = tssi_info->tssi_trim[path][tgidx_1st]; in phy_tssi_get_ofdm_trim_de()
4085 tde_2nd = tssi_info->tssi_trim[path][tgidx_2nd]; in phy_tssi_get_ofdm_trim_de()
4092 val = tssi_info->tssi_trim[path][tgidx]; in phy_tssi_get_ofdm_trim_de()
4111 tde_1st = tssi_info->tssi_trim_6g[path][tgidx_1st]; in phy_tssi_get_ofdm_trim_de()
4112 tde_2nd = tssi_info->tssi_trim_6g[path][tgidx_2nd]; in phy_tssi_get_ofdm_trim_de()
4119 val = tssi_info->tssi_trim_6g[path][tgidx]; in phy_tssi_get_ofdm_trim_de()
4134 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4135 u8 ch = chan->channel; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4148 h2c->curr_tssi_trim_de[i] = trim_de; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4154 cck_de = tssi_info->tssi_cck[i][gidx]; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4157 h2c->curr_tssi_cck_de[i] = 0x0; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4158 h2c->curr_tssi_cck_de_20m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4159 h2c->curr_tssi_cck_de_40m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4160 h2c->curr_tssi_efuse_cck_de[i] = cck_de; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4168 h2c->curr_tssi_ofdm_de[i] = 0x0; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4169 h2c->curr_tssi_ofdm_de_20m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4170 h2c->curr_tssi_ofdm_de_40m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4171 h2c->curr_tssi_ofdm_de_80m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4172 h2c->curr_tssi_ofdm_de_160m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4173 h2c->curr_tssi_ofdm_de_320m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4174 h2c->curr_tssi_efuse_ofdm_de[i] = ofdm_de; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4186 struct rtw89_fw_txpwr_track_cfg *trk = rtwdev->fw.elm_info.txpwr_trk; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4187 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4190 u8 subband = chan->subband_type; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4199 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GA_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4200 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GA_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4201 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GB_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4202 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GB_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4205 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4206 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4207 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4208 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4211 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4212 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4213 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4214 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4217 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4218 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4219 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4220 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4224 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4225 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4226 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4227 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4231 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4232 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4233 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4234 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4238 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4239 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4240 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4241 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4245 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4246 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4247 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4248 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4256 thermal = tssi_info->thermal[path]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4261 h2c->pg_thermal[path] = 0x38; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4262 memset(h2c->ftable[path], 0, sizeof(h2c->ftable[path])); in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4266 h2c->pg_thermal[path] = thermal; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4272 thm_up[path][DELTA_SWINGIDX_SIZE - 1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4275 for (j = 127; j >= 64; j--) in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4277 -thm_down[path][i++] : in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4278 -thm_down[path][DELTA_SWINGIDX_SIZE - 1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4281 h2c->ftable[path][i + 0] = thm_ofst[i + 3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4282 h2c->ftable[path][i + 1] = thm_ofst[i + 2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4283 h2c->ftable[path][i + 2] = thm_ofst[i + 1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4284 h2c->ftable[path][i + 3] = thm_ofst[i + 0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4296 const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info; in rtw89_phy_cfo_get_xcap_reg()
4300 reg_mask = xtal->sc_xo_mask; in rtw89_phy_cfo_get_xcap_reg()
4302 reg_mask = xtal->sc_xi_mask; in rtw89_phy_cfo_get_xcap_reg()
4304 return (u8)rtw89_read32_mask(rtwdev, xtal->xcap_reg, reg_mask); in rtw89_phy_cfo_get_xcap_reg()
4310 const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info; in rtw89_phy_cfo_set_xcap_reg()
4314 reg_mask = xtal->sc_xo_mask; in rtw89_phy_cfo_set_xcap_reg()
4316 reg_mask = xtal->sc_xi_mask; in rtw89_phy_cfo_set_xcap_reg()
4318 rtw89_write32_mask(rtwdev, xtal->xcap_reg, reg_mask, val); in rtw89_phy_cfo_set_xcap_reg()
4324 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_set_crystal_cap()
4325 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_cfo_set_crystal_cap()
4328 if (!force && cfo->crystal_cap == crystal_cap) in rtw89_phy_cfo_set_crystal_cap()
4330 if (chip->chip_id == RTL8852A || chip->chip_id == RTL8851B) { in rtw89_phy_cfo_set_crystal_cap()
4343 cfo->crystal_cap = sc_xi_val; in rtw89_phy_cfo_set_crystal_cap()
4344 cfo->x_cap_ofst = (s8)((int)cfo->crystal_cap - cfo->def_x_cap); in rtw89_phy_cfo_set_crystal_cap()
4349 cfo->x_cap_ofst); in rtw89_phy_cfo_set_crystal_cap()
4355 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_reset()
4358 cfo->def_x_cap = cfo->crystal_cap_default & B_AX_XTAL_SC_MASK; in rtw89_phy_cfo_reset()
4359 cfo->is_adjust = false; in rtw89_phy_cfo_reset()
4360 if (cfo->crystal_cap == cfo->def_x_cap) in rtw89_phy_cfo_reset()
4362 cap = cfo->crystal_cap; in rtw89_phy_cfo_reset()
4363 cap += (cap > cfo->def_x_cap ? -1 : 1); in rtw89_phy_cfo_reset()
4366 "(0x%x) approach to dflt_val=(0x%x)\n", cfo->crystal_cap, in rtw89_phy_cfo_reset()
4367 cfo->def_x_cap); in rtw89_phy_cfo_reset()
4372 const struct rtw89_reg_def *dcfo_comp = rtwdev->chip->dcfo_comp; in rtw89_dcfo_comp()
4373 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_dcfo_comp()
4378 if (rtwdev->chip->chip_id == RTL8922A) in rtw89_dcfo_comp()
4390 sign = curr_cfo > 0 ? 1 : -1; in rtw89_dcfo_comp()
4393 if (rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv == CHIP_CBV) in rtw89_dcfo_comp()
4394 cfo_avg_312 = -cfo_avg_312; in rtw89_dcfo_comp()
4395 rtw89_phy_set_phy_regs(rtwdev, dcfo_comp->addr, dcfo_comp->mask, in rtw89_dcfo_comp()
4401 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_dcfo_comp_init()
4402 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_dcfo_comp_init()
4403 const struct rtw89_cfo_regs *cfo = phy->cfo; in rtw89_dcfo_comp_init()
4405 rtw89_phy_set_phy_regs(rtwdev, cfo->comp_seg0, cfo->valid_0_mask, 1); in rtw89_dcfo_comp_init()
4406 rtw89_phy_set_phy_regs(rtwdev, cfo->comp, cfo->weighting_mask, 8); in rtw89_dcfo_comp_init()
4408 if (chip->chip_gen == RTW89_CHIP_AX) { in rtw89_dcfo_comp_init()
4409 if (chip->cfo_hw_comp) { in rtw89_dcfo_comp_init()
4422 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_init()
4423 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw89_phy_cfo_init()
4425 cfo->crystal_cap_default = efuse->xtal_cap & B_AX_XTAL_SC_MASK; in rtw89_phy_cfo_init()
4426 cfo->crystal_cap = cfo->crystal_cap_default; in rtw89_phy_cfo_init()
4427 cfo->def_x_cap = cfo->crystal_cap; in rtw89_phy_cfo_init()
4428 cfo->x_cap_ub = min_t(int, cfo->def_x_cap + CFO_BOUND, 0x7f); in rtw89_phy_cfo_init()
4429 cfo->x_cap_lb = max_t(int, cfo->def_x_cap - CFO_BOUND, 0x1); in rtw89_phy_cfo_init()
4430 cfo->is_adjust = false; in rtw89_phy_cfo_init()
4431 cfo->divergence_lock_en = false; in rtw89_phy_cfo_init()
4432 cfo->x_cap_ofst = 0; in rtw89_phy_cfo_init()
4433 cfo->lock_cnt = 0; in rtw89_phy_cfo_init()
4434 cfo->rtw89_multi_cfo_mode = RTW89_TP_BASED_AVG_MODE; in rtw89_phy_cfo_init()
4435 cfo->apply_compensation = false; in rtw89_phy_cfo_init()
4436 cfo->residual_cfo_acc = 0; in rtw89_phy_cfo_init()
4438 cfo->crystal_cap_default); in rtw89_phy_cfo_init()
4439 rtw89_phy_cfo_set_crystal_cap(rtwdev, cfo->crystal_cap_default, true); in rtw89_phy_cfo_init()
4441 cfo->cfo_timer_ms = 2000; in rtw89_phy_cfo_init()
4442 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_init()
4443 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_init()
4444 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_init()
4445 cfo->cfo_ul_ofdma_acc_mode = RTW89_CFO_UL_OFDMA_ACC_ENABLE; in rtw89_phy_cfo_init()
4451 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_crystal_cap_adjust()
4452 int crystal_cap = cfo->crystal_cap; in rtw89_phy_cfo_crystal_cap_adjust()
4460 if (!cfo->is_adjust) { in rtw89_phy_cfo_crystal_cap_adjust()
4462 cfo->is_adjust = true; in rtw89_phy_cfo_crystal_cap_adjust()
4465 cfo->is_adjust = false; in rtw89_phy_cfo_crystal_cap_adjust()
4467 if (!cfo->is_adjust) { in rtw89_phy_cfo_crystal_cap_adjust()
4471 sign = curr_cfo > 0 ? 1 : -1; in rtw89_phy_cfo_crystal_cap_adjust()
4487 cfo->crystal_cap, cfo->def_x_cap); in rtw89_phy_cfo_crystal_cap_adjust()
4492 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_average_cfo_calc()
4493 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_average_cfo_calc()
4499 if (rtwdev->total_sta_assoc != 1) in rtw89_phy_average_cfo_calc()
4503 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_average_cfo_calc()
4505 cfo_khz_all += cfo->cfo_tail[i]; in rtw89_phy_average_cfo_calc()
4506 cfo_cnt_all += cfo->cfo_cnt[i]; in rtw89_phy_average_cfo_calc()
4508 cfo->pre_cfo_avg[i] = cfo->cfo_avg[i]; in rtw89_phy_average_cfo_calc()
4509 cfo->dcfo_avg = phy_div(cfo_khz_all << chip->dcfo_comp_sft, in rtw89_phy_average_cfo_calc()
4522 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_multi_sta_cfo_calc()
4523 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_multi_sta_cfo_calc()
4538 if (cfo->rtw89_multi_cfo_mode == RTW89_PKT_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
4541 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_multi_sta_cfo_calc()
4543 cfo_khz_all += cfo->cfo_tail[i]; in rtw89_phy_multi_sta_cfo_calc()
4544 cfo_cnt_all += cfo->cfo_cnt[i]; in rtw89_phy_multi_sta_cfo_calc()
4551 } else if (cfo->rtw89_multi_cfo_mode == RTW89_ENTRY_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
4554 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_multi_sta_cfo_calc()
4556 cfo->cfo_avg[i] = phy_div(cfo->cfo_tail[i], in rtw89_phy_multi_sta_cfo_calc()
4557 (s32)cfo->cfo_cnt[i]); in rtw89_phy_multi_sta_cfo_calc()
4558 cfo_khz_all += cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4561 cfo->cfo_avg[i]); in rtw89_phy_multi_sta_cfo_calc()
4563 sta_cnt = rtwdev->total_sta_assoc; in rtw89_phy_multi_sta_cfo_calc()
4569 } else if (cfo->rtw89_multi_cfo_mode == RTW89_TP_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
4571 cfo_tol = cfo->sta_cfo_tolerance; in rtw89_phy_multi_sta_cfo_calc()
4574 if (cfo->cfo_cnt[i] != 0) { in rtw89_phy_multi_sta_cfo_calc()
4575 cfo->cfo_avg[i] = phy_div(cfo->cfo_tail[i], in rtw89_phy_multi_sta_cfo_calc()
4576 (s32)cfo->cfo_cnt[i]); in rtw89_phy_multi_sta_cfo_calc()
4579 cfo->cfo_avg[i] = cfo->pre_cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4581 max_cfo_lb = max(cfo->cfo_avg[i] - cfo_tol, max_cfo_lb); in rtw89_phy_multi_sta_cfo_calc()
4582 min_cfo_ub = min(cfo->cfo_avg[i] + cfo_tol, min_cfo_ub); in rtw89_phy_multi_sta_cfo_calc()
4583 cfo_khz_all += cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4587 i, cfo->cfo_avg[i]); in rtw89_phy_multi_sta_cfo_calc()
4588 if (sta_cnt >= rtwdev->total_sta_assoc) in rtw89_phy_multi_sta_cfo_calc()
4591 tp_all = stats->rx_throughput; /* need tp for each entry */ in rtw89_phy_multi_sta_cfo_calc()
4606 min_cfo_ub - max_cfo_lb); in rtw89_phy_multi_sta_cfo_calc()
4614 cfo->pre_cfo_avg[i] = cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4622 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_statistics_reset()
4624 memset(&cfo->cfo_tail, 0, sizeof(cfo->cfo_tail)); in rtw89_phy_cfo_statistics_reset()
4625 memset(&cfo->cfo_cnt, 0, sizeof(cfo->cfo_cnt)); in rtw89_phy_cfo_statistics_reset()
4626 cfo->packet_count = 0; in rtw89_phy_cfo_statistics_reset()
4627 cfo->packet_count_pre = 0; in rtw89_phy_cfo_statistics_reset()
4628 cfo->cfo_avg_pre = 0; in rtw89_phy_cfo_statistics_reset()
4633 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_dm()
4636 u8 pre_x_cap = cfo->crystal_cap; in rtw89_phy_cfo_dm()
4637 u8 dcfo_comp_sft = rtwdev->chip->dcfo_comp_sft; in rtw89_phy_cfo_dm()
4639 cfo->dcfo_avg = 0; in rtw89_phy_cfo_dm()
4641 rtwdev->total_sta_assoc); in rtw89_phy_cfo_dm()
4642 if (rtwdev->total_sta_assoc == 0 || rtw89_is_mlo_1_1(rtwdev)) { in rtw89_phy_cfo_dm()
4646 if (cfo->packet_count == 0) { in rtw89_phy_cfo_dm()
4650 if (cfo->packet_count == cfo->packet_count_pre) { in rtw89_phy_cfo_dm()
4654 if (rtwdev->total_sta_assoc == 1) in rtw89_phy_cfo_dm()
4658 if (cfo->divergence_lock_en) { in rtw89_phy_cfo_dm()
4659 cfo->lock_cnt++; in rtw89_phy_cfo_dm()
4660 if (cfo->lock_cnt > CFO_PERIOD_CNT) { in rtw89_phy_cfo_dm()
4661 cfo->divergence_lock_en = false; in rtw89_phy_cfo_dm()
4662 cfo->lock_cnt = 0; in rtw89_phy_cfo_dm()
4668 if (cfo->crystal_cap >= cfo->x_cap_ub || in rtw89_phy_cfo_dm()
4669 cfo->crystal_cap <= cfo->x_cap_lb) { in rtw89_phy_cfo_dm()
4670 cfo->divergence_lock_en = true; in rtw89_phy_cfo_dm()
4676 cfo->cfo_avg_pre = new_cfo; in rtw89_phy_cfo_dm()
4677 cfo->dcfo_avg_pre = cfo->dcfo_avg; in rtw89_phy_cfo_dm()
4678 x_cap_update = cfo->crystal_cap != pre_x_cap; in rtw89_phy_cfo_dm()
4680 rtw89_debug(rtwdev, RTW89_DBG_CFO, "Xcap: D:%x C:%x->%x, ofst=%d\n", in rtw89_phy_cfo_dm()
4681 cfo->def_x_cap, pre_x_cap, cfo->crystal_cap, in rtw89_phy_cfo_dm()
4682 cfo->x_cap_ofst); in rtw89_phy_cfo_dm()
4684 if (cfo->dcfo_avg > 0) in rtw89_phy_cfo_dm()
4685 cfo->dcfo_avg -= CFO_SW_COMP_FINE_TUNE << dcfo_comp_sft; in rtw89_phy_cfo_dm()
4687 cfo->dcfo_avg += CFO_SW_COMP_FINE_TUNE << dcfo_comp_sft; in rtw89_phy_cfo_dm()
4689 rtw89_dcfo_comp(rtwdev, cfo->dcfo_avg); in rtw89_phy_cfo_dm()
4697 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_track_work()
4701 if (!cfo->cfo_trig_by_timer_en) in rtw89_phy_cfo_track_work()
4705 wiphy_delayed_work_queue(wiphy, &rtwdev->cfo_track_work, in rtw89_phy_cfo_track_work()
4706 msecs_to_jiffies(cfo->cfo_timer_ms)); in rtw89_phy_cfo_track_work()
4711 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_start_work()
4713 wiphy_delayed_work_queue(rtwdev->hw->wiphy, &rtwdev->cfo_track_work, in rtw89_phy_cfo_start_work()
4714 msecs_to_jiffies(cfo->cfo_timer_ms)); in rtw89_phy_cfo_start_work()
4719 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_track()
4720 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_cfo_track()
4723 if (stats->rx_tf_periodic > CFO_TF_CNT_TH) in rtw89_phy_cfo_track()
4725 if (cfo->cfo_ul_ofdma_acc_mode == RTW89_CFO_UL_OFDMA_ACC_ENABLE && in rtw89_phy_cfo_track()
4729 switch (cfo->phy_cfo_status) { in rtw89_phy_cfo_track()
4731 if (stats->tx_throughput >= CFO_TP_UPPER) { in rtw89_phy_cfo_track()
4732 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_ENHANCE; in rtw89_phy_cfo_track()
4733 cfo->cfo_trig_by_timer_en = true; in rtw89_phy_cfo_track()
4734 cfo->cfo_timer_ms = CFO_COMP_PERIOD; in rtw89_phy_cfo_track()
4739 if (stats->tx_throughput <= CFO_TP_LOWER) in rtw89_phy_cfo_track()
4740 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
4742 cfo->phy_cfo_trk_cnt >= CFO_PERIOD_CNT) in rtw89_phy_cfo_track()
4743 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_HOLD; in rtw89_phy_cfo_track()
4745 cfo->phy_cfo_trk_cnt++; in rtw89_phy_cfo_track()
4747 if (cfo->phy_cfo_status == RTW89_PHY_DCFO_STATE_NORMAL) { in rtw89_phy_cfo_track()
4748 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
4749 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_track()
4753 if (stats->tx_throughput <= CFO_TP_LOWER) { in rtw89_phy_cfo_track()
4754 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
4755 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
4756 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_track()
4758 cfo->phy_cfo_trk_cnt++; in rtw89_phy_cfo_track()
4762 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
4763 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
4768 stats->tx_throughput, cfo->phy_cfo_status, in rtw89_phy_cfo_track()
4769 cfo->cfo_trig_by_timer_en, cfo->phy_cfo_trk_cnt, in rtw89_phy_cfo_track()
4770 ewma_thermal_read(&rtwdev->phystat.avg_thermal[0])); in rtw89_phy_cfo_track()
4771 if (cfo->cfo_trig_by_timer_en) in rtw89_phy_cfo_track()
4779 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_parse()
4780 u8 macid = phy_ppdu->mac_id; in rtw89_phy_cfo_parse()
4787 cfo->cfo_tail[macid] += cfo_val; in rtw89_phy_cfo_parse()
4788 cfo->cfo_cnt[macid]++; in rtw89_phy_cfo_parse()
4789 cfo->packet_count++; in rtw89_phy_cfo_parse()
4794 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_assoc()
4796 rtwvif_link->chanctx_idx); in rtw89_phy_ul_tb_assoc()
4797 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_assoc()
4799 if (!chip->ul_tb_waveform_ctrl) in rtw89_phy_ul_tb_assoc()
4802 rtwvif_link->def_tri_idx = in rtw89_phy_ul_tb_assoc()
4805 if (chip->chip_id == RTL8852B && rtwdev->hal.cv > CHIP_CBV) in rtw89_phy_ul_tb_assoc()
4806 rtwvif_link->dyn_tb_bedge_en = false; in rtw89_phy_ul_tb_assoc()
4807 else if (chan->band_type >= RTW89_BAND_5G && in rtw89_phy_ul_tb_assoc()
4808 chan->band_width >= RTW89_CHANNEL_WIDTH_40) in rtw89_phy_ul_tb_assoc()
4809 rtwvif_link->dyn_tb_bedge_en = true; in rtw89_phy_ul_tb_assoc()
4811 rtwvif_link->dyn_tb_bedge_en = false; in rtw89_phy_ul_tb_assoc()
4815 ul_tb_info->def_if_bandedge, rtwvif_link->def_tri_idx); in rtw89_phy_ul_tb_assoc()
4818 rtwvif_link->dyn_tb_bedge_en, ul_tb_info->dyn_tb_tri_en); in rtw89_phy_ul_tb_assoc()
4849 if (!rtwdev->chip->ul_tb_pwr_diff) in rtw89_phy_ofdma_power_diff()
4852 if (rtwvif_link->pwr_diff_en == rtwvif_link->pre_pwr_diff_en) { in rtw89_phy_ofdma_power_diff()
4853 rtwvif_link->pwr_diff_en = false; in rtw89_phy_ofdma_power_diff()
4857 rtwvif_link->pre_pwr_diff_en = rtwvif_link->pwr_diff_en; in rtw89_phy_ofdma_power_diff()
4858 param = &table[rtwvif_link->pwr_diff_en]; in rtw89_phy_ofdma_power_diff()
4861 param->q_00); in rtw89_phy_ofdma_power_diff()
4863 param->q_11); in rtw89_phy_ofdma_power_diff()
4865 B_CUSTOMIZE_Q_MATRIX_EN, param->q_matrix_en); in rtw89_phy_ofdma_power_diff()
4867 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_1T, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4869 param->ultb_1t_norm_160); in rtw89_phy_ofdma_power_diff()
4871 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_2T, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4873 param->ultb_2t_norm_160); in rtw89_phy_ofdma_power_diff()
4875 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PATH_COM1, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4877 param->com1_norm_1sts); in rtw89_phy_ofdma_power_diff()
4879 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PATH_COM2, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4881 param->com2_resp_1sts_path); in rtw89_phy_ofdma_power_diff()
4889 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_ul_tb_ctrl_check()
4892 if (rtwvif_link->wifi_role != RTW89_WIFI_ROLE_STATION) in rtw89_phy_ul_tb_ctrl_check()
4895 if (!vif->cfg.assoc) in rtw89_phy_ul_tb_ctrl_check()
4898 if (rtwdev->chip->ul_tb_waveform_ctrl) { in rtw89_phy_ul_tb_ctrl_check()
4899 if (stats->rx_tf_periodic > UL_TB_TF_CNT_L2H_TH) in rtw89_phy_ul_tb_ctrl_check()
4900 ul_tb_data->high_tf_client = true; in rtw89_phy_ul_tb_ctrl_check()
4901 else if (stats->rx_tf_periodic < UL_TB_TF_CNT_H2L_TH) in rtw89_phy_ul_tb_ctrl_check()
4902 ul_tb_data->low_tf_client = true; in rtw89_phy_ul_tb_ctrl_check()
4904 ul_tb_data->valid = true; in rtw89_phy_ul_tb_ctrl_check()
4905 ul_tb_data->def_tri_idx = rtwvif_link->def_tri_idx; in rtw89_phy_ul_tb_ctrl_check()
4906 ul_tb_data->dyn_tb_bedge_en = rtwvif_link->dyn_tb_bedge_en; in rtw89_phy_ul_tb_ctrl_check()
4915 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_waveform_ctrl()
4917 if (!rtwdev->chip->ul_tb_waveform_ctrl) in rtw89_phy_ul_tb_waveform_ctrl()
4920 if (ul_tb_data->dyn_tb_bedge_en) { in rtw89_phy_ul_tb_waveform_ctrl()
4921 if (ul_tb_data->high_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4925 } else if (ul_tb_data->low_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4927 ul_tb_info->def_if_bandedge); in rtw89_phy_ul_tb_waveform_ctrl()
4930 ul_tb_info->def_if_bandedge); in rtw89_phy_ul_tb_waveform_ctrl()
4934 if (ul_tb_info->dyn_tb_tri_en) { in rtw89_phy_ul_tb_waveform_ctrl()
4935 if (ul_tb_data->high_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4940 } else if (ul_tb_data->low_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4943 ul_tb_data->def_tri_idx); in rtw89_phy_ul_tb_waveform_ctrl()
4946 ul_tb_data->def_tri_idx); in rtw89_phy_ul_tb_waveform_ctrl()
4953 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_ctrl_track()
4959 if (!chip->ul_tb_waveform_ctrl && !chip->ul_tb_pwr_diff) in rtw89_phy_ul_tb_ctrl_track()
4962 if (rtwdev->total_sta_assoc != 1) in rtw89_phy_ul_tb_ctrl_track()
4977 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_info_init()
4978 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_info_init()
4980 if (!chip->ul_tb_waveform_ctrl) in rtw89_phy_ul_tb_info_init()
4983 ul_tb_info->dyn_tb_tri_en = true; in rtw89_phy_ul_tb_info_init()
4984 ul_tb_info->def_if_bandedge = in rtw89_phy_ul_tb_info_init()
4991 ewma_rssi_init(&antdiv_sts->cck_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
4992 ewma_rssi_init(&antdiv_sts->ofdm_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
4993 ewma_rssi_init(&antdiv_sts->non_legacy_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
4994 antdiv_sts->pkt_cnt_cck = 0; in rtw89_phy_antdiv_sts_instance_reset()
4995 antdiv_sts->pkt_cnt_ofdm = 0; in rtw89_phy_antdiv_sts_instance_reset()
4996 antdiv_sts->pkt_cnt_non_legacy = 0; in rtw89_phy_antdiv_sts_instance_reset()
4997 antdiv_sts->evm = 0; in rtw89_phy_antdiv_sts_instance_reset()
5004 if (rtw89_get_data_rate_mode(rtwdev, phy_ppdu->rate) == DATA_RATE_MODE_NON_HT) { in rtw89_phy_antdiv_sts_instance_add()
5005 if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6) { in rtw89_phy_antdiv_sts_instance_add()
5006 ewma_rssi_add(&stats->cck_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
5007 stats->pkt_cnt_cck++; in rtw89_phy_antdiv_sts_instance_add()
5009 ewma_rssi_add(&stats->ofdm_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
5010 stats->pkt_cnt_ofdm++; in rtw89_phy_antdiv_sts_instance_add()
5011 stats->evm += phy_ppdu->ofdm.evm_min; in rtw89_phy_antdiv_sts_instance_add()
5014 ewma_rssi_add(&stats->non_legacy_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
5015 stats->pkt_cnt_non_legacy++; in rtw89_phy_antdiv_sts_instance_add()
5016 stats->evm += phy_ppdu->ofdm.evm_min; in rtw89_phy_antdiv_sts_instance_add()
5022 if (stats->pkt_cnt_non_legacy >= stats->pkt_cnt_cck && in rtw89_phy_antdiv_sts_instance_get_rssi()
5023 stats->pkt_cnt_non_legacy >= stats->pkt_cnt_ofdm) in rtw89_phy_antdiv_sts_instance_get_rssi()
5024 return ewma_rssi_read(&stats->non_legacy_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
5025 else if (stats->pkt_cnt_ofdm >= stats->pkt_cnt_cck && in rtw89_phy_antdiv_sts_instance_get_rssi()
5026 stats->pkt_cnt_ofdm >= stats->pkt_cnt_non_legacy) in rtw89_phy_antdiv_sts_instance_get_rssi()
5027 return ewma_rssi_read(&stats->ofdm_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
5029 return ewma_rssi_read(&stats->cck_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
5034 return phy_div(stats->evm, stats->pkt_cnt_non_legacy + stats->pkt_cnt_ofdm); in rtw89_phy_antdiv_sts_instance_get_evm()
5040 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_parse()
5041 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_parse()
5043 if (!hal->ant_diversity || hal->ant_diversity_fixed) in rtw89_phy_antdiv_parse()
5046 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->target_stats); in rtw89_phy_antdiv_parse()
5048 if (!antdiv->get_stats) in rtw89_phy_antdiv_parse()
5051 if (hal->antenna_rx == RF_A) in rtw89_phy_antdiv_parse()
5052 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->main_stats); in rtw89_phy_antdiv_parse()
5053 else if (hal->antenna_rx == RF_B) in rtw89_phy_antdiv_parse()
5054 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->aux_stats); in rtw89_phy_antdiv_parse()
5087 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_sts_reset()
5089 rtw89_phy_antdiv_sts_instance_reset(&antdiv->target_stats); in rtw89_phy_antdiv_sts_reset()
5090 rtw89_phy_antdiv_sts_instance_reset(&antdiv->main_stats); in rtw89_phy_antdiv_sts_reset()
5091 rtw89_phy_antdiv_sts_instance_reset(&antdiv->aux_stats); in rtw89_phy_antdiv_sts_reset()
5096 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_init()
5097 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_init()
5099 if (!hal->ant_diversity) in rtw89_phy_antdiv_init()
5102 antdiv->get_stats = false; in rtw89_phy_antdiv_init()
5103 antdiv->rssi_pre = 0; in rtw89_phy_antdiv_init()
5110 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_thermal_protect()
5111 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_thermal_protect()
5112 u8 th_max = phystat->last_thermal_max; in rtw89_phy_thermal_protect()
5113 u8 lv = hal->thermal_prot_lv; in rtw89_phy_thermal_protect()
5115 if (!hal->thermal_prot_th || in rtw89_phy_thermal_protect()
5116 (hal->disabled_dm_bitmap & BIT(RTW89_DM_THERMAL_PROTECT))) in rtw89_phy_thermal_protect()
5119 if (th_max > hal->thermal_prot_th && lv < RTW89_THERMAL_PROT_LV_MAX) in rtw89_phy_thermal_protect()
5121 else if (th_max < hal->thermal_prot_th - 2 && lv > 0) in rtw89_phy_thermal_protect()
5122 lv--; in rtw89_phy_thermal_protect()
5126 hal->thermal_prot_lv = lv; in rtw89_phy_thermal_protect()
5130 rtw89_fw_h2c_tx_duty(rtwdev, hal->thermal_prot_lv); in rtw89_phy_thermal_protect()
5135 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_thermal_update()
5139 for (i = 0; i < rtwdev->chip->rf_path_num; i++) { in rtw89_phy_stat_thermal_update()
5142 ewma_thermal_add(&phystat->avg_thermal[i], th); in rtw89_phy_stat_thermal_update()
5146 ewma_thermal_read(&phystat->avg_thermal[i])); in rtw89_phy_stat_thermal_update()
5151 phystat->last_thermal_max = th_max; in rtw89_phy_stat_thermal_update()
5163 struct rtw89_vif_link *rtwvif_link = rtwsta_link->rtwvif_link; in __rtw89_phy_stat_rssi_update_iter()
5164 struct rtw89_dev *rtwdev = rssi_data->rtwdev; in __rtw89_phy_stat_rssi_update_iter()
5169 rssi_curr = ewma_rssi_read(&rtwsta_link->avg_rssi); in __rtw89_phy_stat_rssi_update_iter()
5170 bb = rtw89_get_bb_ctx(rtwdev, rtwvif_link->phy_idx); in __rtw89_phy_stat_rssi_update_iter()
5171 ch_info = &bb->ch_info; in __rtw89_phy_stat_rssi_update_iter()
5173 if (rssi_curr < ch_info->rssi_min) { in __rtw89_phy_stat_rssi_update_iter()
5174 ch_info->rssi_min = rssi_curr; in __rtw89_phy_stat_rssi_update_iter()
5175 ch_info->rssi_min_macid = rtwsta_link->mac_id; in __rtw89_phy_stat_rssi_update_iter()
5178 if (rtwsta_link->prev_rssi == 0) { in __rtw89_phy_stat_rssi_update_iter()
5179 rtwsta_link->prev_rssi = rssi_curr; in __rtw89_phy_stat_rssi_update_iter()
5180 } else if (abs((int)rtwsta_link->prev_rssi - (int)rssi_curr) > in __rtw89_phy_stat_rssi_update_iter()
5182 rtwsta_link->prev_rssi = rssi_curr; in __rtw89_phy_stat_rssi_update_iter()
5183 rssi_data->rssi_changed = true; in __rtw89_phy_stat_rssi_update_iter()
5207 bb->ch_info.rssi_min = U8_MAX; in rtw89_phy_stat_rssi_update()
5209 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_stat_rssi_update()
5218 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_init()
5221 for (i = 0; i < rtwdev->chip->rf_path_num; i++) in rtw89_phy_stat_init()
5222 ewma_thermal_init(&phystat->avg_thermal[i]); in rtw89_phy_stat_init()
5226 memset(&phystat->cur_pkt_stat, 0, sizeof(phystat->cur_pkt_stat)); in rtw89_phy_stat_init()
5227 memset(&phystat->last_pkt_stat, 0, sizeof(phystat->last_pkt_stat)); in rtw89_phy_stat_init()
5229 ewma_rssi_init(&phystat->bcn_rssi); in rtw89_phy_stat_init()
5231 rtwdev->hal.thermal_prot_lv = 0; in rtw89_phy_stat_init()
5236 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_track()
5242 phystat->last_pkt_stat = phystat->cur_pkt_stat; in rtw89_phy_stat_track()
5243 memset(&phystat->cur_pkt_stat, 0, sizeof(phystat->cur_pkt_stat)); in rtw89_phy_stat_track()
5249 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ccx_us_to_idx()
5251 return time_us >> (ilog2(CCX_US_BASE_RATIO) + env->ccx_unit_idx); in rtw89_phy_ccx_us_to_idx()
5257 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ccx_idx_to_us()
5259 return idx << (ilog2(CCX_US_BASE_RATIO) + env->ccx_unit_idx); in rtw89_phy_ccx_idx_to_us()
5265 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ccx_top_setting_init()
5266 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ccx_top_setting_init()
5267 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ccx_top_setting_init()
5269 env->ccx_manual_ctrl = false; in rtw89_phy_ccx_top_setting_init()
5270 env->ccx_ongoing = false; in rtw89_phy_ccx_top_setting_init()
5271 env->ccx_rac_lv = RTW89_RAC_RELEASE; in rtw89_phy_ccx_top_setting_init()
5272 env->ccx_period = 0; in rtw89_phy_ccx_top_setting_init()
5273 env->ccx_unit_idx = RTW89_CCX_32_US; in rtw89_phy_ccx_top_setting_init()
5275 rtw89_phy_write32_idx(rtwdev, ccx->setting_addr, ccx->en_mask, 1, bb->phy_idx); in rtw89_phy_ccx_top_setting_init()
5276 rtw89_phy_write32_idx(rtwdev, ccx->setting_addr, ccx->trig_opt_mask, 1, in rtw89_phy_ccx_top_setting_init()
5277 bb->phy_idx); in rtw89_phy_ccx_top_setting_init()
5278 rtw89_phy_write32_idx(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1, in rtw89_phy_ccx_top_setting_init()
5279 bb->phy_idx); in rtw89_phy_ccx_top_setting_init()
5280 rtw89_phy_write32_idx(rtwdev, ccx->setting_addr, ccx->edcca_opt_mask, in rtw89_phy_ccx_top_setting_init()
5281 RTW89_CCX_EDCCA_BW20_0, bb->phy_idx); in rtw89_phy_ccx_top_setting_init()
5288 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ccx_get_report()
5292 numer = report * score + (env->ccx_period >> 1); in rtw89_phy_ccx_get_report()
5293 if (env->ccx_period) in rtw89_phy_ccx_get_report()
5294 ret = numer / env->ccx_period; in rtw89_phy_ccx_get_report()
5296 return ret >= score ? score - 1 : ret; in rtw89_phy_ccx_get_report()
5331 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ccx_racing_release()
5334 "lv:(%d)->(0)\n", env->ccx_rac_lv); in rtw89_phy_ccx_racing_release()
5336 env->ccx_ongoing = false; in rtw89_phy_ccx_racing_release()
5337 env->ccx_rac_lv = RTW89_RAC_RELEASE; in rtw89_phy_ccx_racing_release()
5338 env->ifs_clm_app = RTW89_IFS_CLM_BACKGROUND; in rtw89_phy_ccx_racing_release()
5345 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ifs_clm_th_update_check()
5346 bool is_update = env->ifs_clm_app != para->ifs_clm_app; in rtw89_phy_ifs_clm_th_update_check()
5348 u16 *ifs_th_l = env->ifs_clm_th_l; in rtw89_phy_ifs_clm_th_update_check()
5349 u16 *ifs_th_h = env->ifs_clm_th_h; in rtw89_phy_ifs_clm_th_update_check()
5356 switch (para->ifs_clm_app) { in rtw89_phy_ifs_clm_th_update_check()
5367 ifs_th0_us = para->ifs_clm_manual_th0; in rtw89_phy_ifs_clm_th_update_check()
5368 ifs_th_times = para->ifs_clm_manual_th_times; in rtw89_phy_ifs_clm_th_update_check()
5375 * low[i] = high[i-1] + 1 in rtw89_phy_ifs_clm_th_update_check()
5376 * high[i] = high[i-1] * ifs_th_times in rtw89_phy_ifs_clm_th_update_check()
5383 ifs_th_l[i] = ifs_th_h[i - 1] + 1; in rtw89_phy_ifs_clm_th_update_check()
5384 ifs_th_h_us[i] = ifs_th_h_us[i - 1] * ifs_th_times; in rtw89_phy_ifs_clm_th_update_check()
5399 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_set_th_reg()
5400 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ifs_clm_set_th_reg()
5401 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_set_th_reg()
5404 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5405 env->ifs_clm_th_l[0], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5406 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5407 env->ifs_clm_th_l[1], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5408 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5409 env->ifs_clm_th_l[2], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5410 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5411 env->ifs_clm_th_l[3], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5413 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5414 env->ifs_clm_th_h[0], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5415 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5416 env->ifs_clm_th_h[1], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5417 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5418 env->ifs_clm_th_h[2], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5419 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5420 env->ifs_clm_th_h[3], bb->phy_idx); in rtw89_phy_ifs_clm_set_th_reg()
5425 i + 1, env->ifs_clm_th_l[i], env->ifs_clm_th_h[i]); in rtw89_phy_ifs_clm_set_th_reg()
5431 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_setting_init()
5432 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ifs_clm_setting_init()
5433 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_setting_init()
5436 env->ifs_clm_app = RTW89_IFS_CLM_BACKGROUND; in rtw89_phy_ifs_clm_setting_init()
5437 env->ifs_clm_mntr_time = 0; in rtw89_phy_ifs_clm_setting_init()
5443 rtw89_phy_write32_idx(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_collect_en_mask, true, in rtw89_phy_ifs_clm_setting_init()
5444 bb->phy_idx); in rtw89_phy_ifs_clm_setting_init()
5445 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_en_mask, true, in rtw89_phy_ifs_clm_setting_init()
5446 bb->phy_idx); in rtw89_phy_ifs_clm_setting_init()
5447 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_en_mask, true, in rtw89_phy_ifs_clm_setting_init()
5448 bb->phy_idx); in rtw89_phy_ifs_clm_setting_init()
5449 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_en_mask, true, in rtw89_phy_ifs_clm_setting_init()
5450 bb->phy_idx); in rtw89_phy_ifs_clm_setting_init()
5451 rtw89_phy_write32_idx(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_en_mask, true, in rtw89_phy_ifs_clm_setting_init()
5452 bb->phy_idx); in rtw89_phy_ifs_clm_setting_init()
5459 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ccx_racing_ctrl()
5465 return -EINVAL; in rtw89_phy_ccx_racing_ctrl()
5469 "ccx_ongoing=%d, level:(%d)->(%d)\n", env->ccx_ongoing, in rtw89_phy_ccx_racing_ctrl()
5470 env->ccx_rac_lv, level); in rtw89_phy_ccx_racing_ctrl()
5472 if (env->ccx_ongoing) { in rtw89_phy_ccx_racing_ctrl()
5473 if (level <= env->ccx_rac_lv) in rtw89_phy_ccx_racing_ctrl()
5474 ret = -EINVAL; in rtw89_phy_ccx_racing_ctrl()
5476 env->ccx_ongoing = false; in rtw89_phy_ccx_racing_ctrl()
5480 env->ccx_rac_lv = level; in rtw89_phy_ccx_racing_ctrl()
5491 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ccx_trigger()
5492 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ccx_trigger()
5493 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ccx_trigger()
5495 rtw89_phy_write32_idx(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_clm_cnt_clear_mask, 0, in rtw89_phy_ccx_trigger()
5496 bb->phy_idx); in rtw89_phy_ccx_trigger()
5497 rtw89_phy_write32_idx(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 0, in rtw89_phy_ccx_trigger()
5498 bb->phy_idx); in rtw89_phy_ccx_trigger()
5499 rtw89_phy_write32_idx(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_clm_cnt_clear_mask, 1, in rtw89_phy_ccx_trigger()
5500 bb->phy_idx); in rtw89_phy_ccx_trigger()
5501 rtw89_phy_write32_idx(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1, in rtw89_phy_ccx_trigger()
5502 bb->phy_idx); in rtw89_phy_ccx_trigger()
5504 env->ccx_ongoing = true; in rtw89_phy_ccx_trigger()
5510 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ifs_clm_get_utility()
5514 env->ifs_clm_tx_ratio = in rtw89_phy_ifs_clm_get_utility()
5515 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_tx, PERCENT); in rtw89_phy_ifs_clm_get_utility()
5516 env->ifs_clm_edcca_excl_cca_ratio = in rtw89_phy_ifs_clm_get_utility()
5517 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_edcca_excl_cca, in rtw89_phy_ifs_clm_get_utility()
5519 env->ifs_clm_cck_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5520 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_cckfa, PERCENT); in rtw89_phy_ifs_clm_get_utility()
5521 env->ifs_clm_ofdm_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5522 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_ofdmfa, PERCENT); in rtw89_phy_ifs_clm_get_utility()
5523 env->ifs_clm_cck_cca_excl_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5524 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_cckcca_excl_fa, in rtw89_phy_ifs_clm_get_utility()
5526 env->ifs_clm_ofdm_cca_excl_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5527 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_ofdmcca_excl_fa, in rtw89_phy_ifs_clm_get_utility()
5529 env->ifs_clm_cck_fa_permil = in rtw89_phy_ifs_clm_get_utility()
5530 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_cckfa, PERMIL); in rtw89_phy_ifs_clm_get_utility()
5531 env->ifs_clm_ofdm_fa_permil = in rtw89_phy_ifs_clm_get_utility()
5532 rtw89_phy_ccx_get_report(rtwdev, bb, env->ifs_clm_ofdmfa, PERMIL); in rtw89_phy_ifs_clm_get_utility()
5535 if (env->ifs_clm_his[i] > ENV_MNTR_IFSCLM_HIS_MAX) { in rtw89_phy_ifs_clm_get_utility()
5536 env->ifs_clm_ifs_avg[i] = ENV_MNTR_FAIL_DWORD; in rtw89_phy_ifs_clm_get_utility()
5538 env->ifs_clm_ifs_avg[i] = in rtw89_phy_ifs_clm_get_utility()
5540 env->ifs_clm_avg[i]); in rtw89_phy_ifs_clm_get_utility()
5543 res = rtw89_phy_ccx_idx_to_us(rtwdev, bb, env->ifs_clm_cca[i]); in rtw89_phy_ifs_clm_get_utility()
5544 res += env->ifs_clm_his[i] >> 1; in rtw89_phy_ifs_clm_get_utility()
5545 if (env->ifs_clm_his[i]) in rtw89_phy_ifs_clm_get_utility()
5546 res /= env->ifs_clm_his[i]; in rtw89_phy_ifs_clm_get_utility()
5549 env->ifs_clm_cca_avg[i] = res; in rtw89_phy_ifs_clm_get_utility()
5553 "IFS-CLM ratio {Tx, EDCCA_exclu_cca} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5554 env->ifs_clm_tx_ratio, env->ifs_clm_edcca_excl_cca_ratio); in rtw89_phy_ifs_clm_get_utility()
5556 "IFS-CLM FA ratio {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5557 env->ifs_clm_cck_fa_ratio, env->ifs_clm_ofdm_fa_ratio); in rtw89_phy_ifs_clm_get_utility()
5559 "IFS-CLM FA permil {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5560 env->ifs_clm_cck_fa_permil, env->ifs_clm_ofdm_fa_permil); in rtw89_phy_ifs_clm_get_utility()
5562 "IFS-CLM CCA_exclu_FA ratio {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5563 env->ifs_clm_cck_cca_excl_fa_ratio, in rtw89_phy_ifs_clm_get_utility()
5564 env->ifs_clm_ofdm_cca_excl_fa_ratio); in rtw89_phy_ifs_clm_get_utility()
5569 i + 1, env->ifs_clm_his[i], env->ifs_clm_ifs_avg[i], in rtw89_phy_ifs_clm_get_utility()
5570 env->ifs_clm_cca_avg[i]); in rtw89_phy_ifs_clm_get_utility()
5576 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_get_result()
5577 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ifs_clm_get_result()
5578 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_get_result()
5581 if (rtw89_phy_read32_idx(rtwdev, ccx->ifs_total_addr, in rtw89_phy_ifs_clm_get_result()
5582 ccx->ifs_cnt_done_mask, bb->phy_idx) == 0) { in rtw89_phy_ifs_clm_get_result()
5588 env->ifs_clm_tx = in rtw89_phy_ifs_clm_get_result()
5589 rtw89_phy_read32_idx(rtwdev, ccx->ifs_clm_tx_cnt_addr, in rtw89_phy_ifs_clm_get_result()
5590 ccx->ifs_clm_tx_cnt_msk, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5591 env->ifs_clm_edcca_excl_cca = in rtw89_phy_ifs_clm_get_result()
5592 rtw89_phy_read32_idx(rtwdev, ccx->ifs_clm_tx_cnt_addr, in rtw89_phy_ifs_clm_get_result()
5593 ccx->ifs_clm_edcca_excl_cca_fa_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5594 env->ifs_clm_cckcca_excl_fa = in rtw89_phy_ifs_clm_get_result()
5595 rtw89_phy_read32_idx(rtwdev, ccx->ifs_clm_cca_addr, in rtw89_phy_ifs_clm_get_result()
5596 ccx->ifs_clm_cckcca_excl_fa_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5597 env->ifs_clm_ofdmcca_excl_fa = in rtw89_phy_ifs_clm_get_result()
5598 rtw89_phy_read32_idx(rtwdev, ccx->ifs_clm_cca_addr, in rtw89_phy_ifs_clm_get_result()
5599 ccx->ifs_clm_ofdmcca_excl_fa_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5600 env->ifs_clm_cckfa = in rtw89_phy_ifs_clm_get_result()
5601 rtw89_phy_read32_idx(rtwdev, ccx->ifs_clm_fa_addr, in rtw89_phy_ifs_clm_get_result()
5602 ccx->ifs_clm_cck_fa_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5603 env->ifs_clm_ofdmfa = in rtw89_phy_ifs_clm_get_result()
5604 rtw89_phy_read32_idx(rtwdev, ccx->ifs_clm_fa_addr, in rtw89_phy_ifs_clm_get_result()
5605 ccx->ifs_clm_ofdm_fa_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5607 env->ifs_clm_his[0] = in rtw89_phy_ifs_clm_get_result()
5608 rtw89_phy_read32_idx(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5609 ccx->ifs_t1_his_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5610 env->ifs_clm_his[1] = in rtw89_phy_ifs_clm_get_result()
5611 rtw89_phy_read32_idx(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5612 ccx->ifs_t2_his_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5613 env->ifs_clm_his[2] = in rtw89_phy_ifs_clm_get_result()
5614 rtw89_phy_read32_idx(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5615 ccx->ifs_t3_his_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5616 env->ifs_clm_his[3] = in rtw89_phy_ifs_clm_get_result()
5617 rtw89_phy_read32_idx(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5618 ccx->ifs_t4_his_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5620 env->ifs_clm_avg[0] = in rtw89_phy_ifs_clm_get_result()
5621 rtw89_phy_read32_idx(rtwdev, ccx->ifs_avg_l_addr, in rtw89_phy_ifs_clm_get_result()
5622 ccx->ifs_t1_avg_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5623 env->ifs_clm_avg[1] = in rtw89_phy_ifs_clm_get_result()
5624 rtw89_phy_read32_idx(rtwdev, ccx->ifs_avg_l_addr, in rtw89_phy_ifs_clm_get_result()
5625 ccx->ifs_t2_avg_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5626 env->ifs_clm_avg[2] = in rtw89_phy_ifs_clm_get_result()
5627 rtw89_phy_read32_idx(rtwdev, ccx->ifs_avg_h_addr, in rtw89_phy_ifs_clm_get_result()
5628 ccx->ifs_t3_avg_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5629 env->ifs_clm_avg[3] = in rtw89_phy_ifs_clm_get_result()
5630 rtw89_phy_read32_idx(rtwdev, ccx->ifs_avg_h_addr, in rtw89_phy_ifs_clm_get_result()
5631 ccx->ifs_t4_avg_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5633 env->ifs_clm_cca[0] = in rtw89_phy_ifs_clm_get_result()
5634 rtw89_phy_read32_idx(rtwdev, ccx->ifs_cca_l_addr, in rtw89_phy_ifs_clm_get_result()
5635 ccx->ifs_t1_cca_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5636 env->ifs_clm_cca[1] = in rtw89_phy_ifs_clm_get_result()
5637 rtw89_phy_read32_idx(rtwdev, ccx->ifs_cca_l_addr, in rtw89_phy_ifs_clm_get_result()
5638 ccx->ifs_t2_cca_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5639 env->ifs_clm_cca[2] = in rtw89_phy_ifs_clm_get_result()
5640 rtw89_phy_read32_idx(rtwdev, ccx->ifs_cca_h_addr, in rtw89_phy_ifs_clm_get_result()
5641 ccx->ifs_t3_cca_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5642 env->ifs_clm_cca[3] = in rtw89_phy_ifs_clm_get_result()
5643 rtw89_phy_read32_idx(rtwdev, ccx->ifs_cca_h_addr, in rtw89_phy_ifs_clm_get_result()
5644 ccx->ifs_t4_cca_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5646 env->ifs_clm_total_ifs = in rtw89_phy_ifs_clm_get_result()
5647 rtw89_phy_read32_idx(rtwdev, ccx->ifs_total_addr, in rtw89_phy_ifs_clm_get_result()
5648 ccx->ifs_total_mask, bb->phy_idx); in rtw89_phy_ifs_clm_get_result()
5650 rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "IFS-CLM total_ifs = %d\n", in rtw89_phy_ifs_clm_get_result()
5651 env->ifs_clm_total_ifs); in rtw89_phy_ifs_clm_get_result()
5654 env->ifs_clm_tx, env->ifs_clm_edcca_excl_cca); in rtw89_phy_ifs_clm_get_result()
5656 "IFS-CLM FA{CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_result()
5657 env->ifs_clm_cckfa, env->ifs_clm_ofdmfa); in rtw89_phy_ifs_clm_get_result()
5659 "IFS-CLM CCA_exclu_FA{CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_result()
5660 env->ifs_clm_cckcca_excl_fa, env->ifs_clm_ofdmcca_excl_fa); in rtw89_phy_ifs_clm_get_result()
5665 "T%d:[%d, %d, %d]\n", i + 1, env->ifs_clm_his[i], in rtw89_phy_ifs_clm_get_result()
5666 env->ifs_clm_avg[i], env->ifs_clm_cca[i]); in rtw89_phy_ifs_clm_get_result()
5677 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_set()
5678 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_ifs_clm_set()
5679 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_set()
5683 if (para->mntr_time == 0) { in rtw89_phy_ifs_clm_set()
5686 return -EINVAL; in rtw89_phy_ifs_clm_set()
5689 if (rtw89_phy_ccx_racing_ctrl(rtwdev, bb, para->rac_lv)) in rtw89_phy_ifs_clm_set()
5690 return -EINVAL; in rtw89_phy_ifs_clm_set()
5692 if (para->mntr_time != env->ifs_clm_mntr_time) { in rtw89_phy_ifs_clm_set()
5693 rtw89_phy_ccx_ms_to_period_unit(rtwdev, para->mntr_time, in rtw89_phy_ifs_clm_set()
5695 rtw89_phy_write32_idx(rtwdev, ccx->ifs_cnt_addr, in rtw89_phy_ifs_clm_set()
5696 ccx->ifs_clm_period_mask, period, bb->phy_idx); in rtw89_phy_ifs_clm_set()
5697 rtw89_phy_write32_idx(rtwdev, ccx->ifs_cnt_addr, in rtw89_phy_ifs_clm_set()
5698 ccx->ifs_clm_cnt_unit_mask, in rtw89_phy_ifs_clm_set()
5699 unit_idx, bb->phy_idx); in rtw89_phy_ifs_clm_set()
5702 "Update IFS-CLM time ((%d)) -> ((%d))\n", in rtw89_phy_ifs_clm_set()
5703 env->ifs_clm_mntr_time, para->mntr_time); in rtw89_phy_ifs_clm_set()
5705 env->ifs_clm_mntr_time = para->mntr_time; in rtw89_phy_ifs_clm_set()
5706 env->ccx_period = (u16)period; in rtw89_phy_ifs_clm_set()
5707 env->ccx_unit_idx = (u8)unit_idx; in rtw89_phy_ifs_clm_set()
5711 env->ifs_clm_app = para->ifs_clm_app; in rtw89_phy_ifs_clm_set()
5721 struct rtw89_env_monitor_info *env = &bb->env_monitor; in __rtw89_phy_env_monitor_track()
5725 env->ccx_watchdog_result = RTW89_PHY_ENV_MON_CCX_FAIL; in __rtw89_phy_env_monitor_track()
5726 if (env->ccx_manual_ctrl) { in __rtw89_phy_env_monitor_track()
5733 "BB-%d env_monitor track\n", bb->phy_idx); in __rtw89_phy_env_monitor_track()
5737 env->ccx_watchdog_result |= RTW89_PHY_ENV_MON_IFS_CLM; in __rtw89_phy_env_monitor_track()
5751 env->ccx_watchdog_result, chk_result); in __rtw89_phy_env_monitor_track()
5768 *ie_page -= 1; in rtw89_physts_ie_page_valid()
5798 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_physts_set_ie_bitmap()
5804 if (chip->chip_id == RTL8852A) in rtw89_physts_set_ie_bitmap()
5830 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_physts_enable_fail_report()
5831 const struct rtw89_physts_regs *physts = phy->physts; in rtw89_physts_enable_fail_report()
5834 rtw89_phy_write32_idx_clr(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5835 physts->dis_trigger_fail_mask, phy_idx); in rtw89_physts_enable_fail_report()
5836 rtw89_phy_write32_idx_clr(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5837 physts->dis_trigger_brk_mask, phy_idx); in rtw89_physts_enable_fail_report()
5839 rtw89_phy_write32_idx_set(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5840 physts->dis_trigger_fail_mask, phy_idx); in rtw89_physts_enable_fail_report()
5841 rtw89_phy_write32_idx_set(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5842 physts->dis_trigger_brk_mask, phy_idx); in rtw89_physts_enable_fail_report()
5878 if (rtwdev->dbcc_en) in rtw89_physts_parsing_init()
5885 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_dig_read_gain_table()
5887 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_read_gain_table()
5896 gain_arr = dig->lna_gain_g; in rtw89_phy_dig_read_gain_table()
5898 cfg = chip->dig_table->cfg_lna_g; in rtw89_phy_dig_read_gain_table()
5902 gain_arr = dig->tia_gain_g; in rtw89_phy_dig_read_gain_table()
5904 cfg = chip->dig_table->cfg_tia_g; in rtw89_phy_dig_read_gain_table()
5908 gain_arr = dig->lna_gain_a; in rtw89_phy_dig_read_gain_table()
5910 cfg = chip->dig_table->cfg_lna_a; in rtw89_phy_dig_read_gain_table()
5914 gain_arr = dig->tia_gain_a; in rtw89_phy_dig_read_gain_table()
5916 cfg = chip->dig_table->cfg_tia_a; in rtw89_phy_dig_read_gain_table()
5923 for (i = 0; i < cfg->size; i++) { in rtw89_phy_dig_read_gain_table()
5924 tmp = rtw89_phy_read32_idx(rtwdev, cfg->table[i].addr, in rtw89_phy_dig_read_gain_table()
5925 cfg->table[i].mask, bb->phy_idx); in rtw89_phy_dig_read_gain_table()
5938 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_update_gain_para()
5942 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_update_gain_para()
5946 B_PATH0_IB_PKPW_MSK, bb->phy_idx); in rtw89_phy_dig_update_gain_para()
5947 dig->ib_pkpwr = sign_extend32(tmp >> DIG_GAIN_SHIFT, U8_MAX_BIT); in rtw89_phy_dig_update_gain_para()
5948 dig->ib_pbk = rtw89_phy_read32_idx(rtwdev, R_PATH0_IB_PBK, in rtw89_phy_dig_update_gain_para()
5949 B_PATH0_IB_PBK_MSK, bb->phy_idx); in rtw89_phy_dig_update_gain_para()
5951 dig->ib_pkpwr, dig->ib_pbk); in rtw89_phy_dig_update_gain_para()
5966 struct rtw89_phy_ch_info *ch_info = &bb->ch_info; in rtw89_phy_dig_update_rssi_info()
5967 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_update_rssi_info()
5968 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig_update_rssi_info()
5971 dig->igi_rssi = ch_info->rssi_min >> 1; in rtw89_phy_dig_update_rssi_info()
5974 dig->igi_rssi = rssi_nolink; in rtw89_phy_dig_update_rssi_info()
5981 const struct rtw89_chan *chan = rtw89_mgnt_chan_get(rtwdev, bb->phy_idx); in rtw89_phy_dig_update_para()
5982 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_update_para()
5983 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig_update_para()
5986 switch (chan->band_type) { in rtw89_phy_dig_update_para()
5988 dig->lna_gain = dig->lna_gain_g; in rtw89_phy_dig_update_para()
5989 dig->tia_gain = dig->tia_gain_g; in rtw89_phy_dig_update_para()
5991 dig->force_gaincode_idx_en = false; in rtw89_phy_dig_update_para()
5992 dig->dyn_pd_th_en = true; in rtw89_phy_dig_update_para()
5996 dig->lna_gain = dig->lna_gain_a; in rtw89_phy_dig_update_para()
5997 dig->tia_gain = dig->tia_gain_a; in rtw89_phy_dig_update_para()
5999 dig->force_gaincode_idx_en = true; in rtw89_phy_dig_update_para()
6000 dig->dyn_pd_th_en = true; in rtw89_phy_dig_update_para()
6003 memcpy(dig->fa_th, fa_th_src, sizeof(dig->fa_th)); in rtw89_phy_dig_update_para()
6004 memcpy(dig->igi_rssi_th, igi_rssi_th, sizeof(dig->igi_rssi_th)); in rtw89_phy_dig_update_para()
6014 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_para_reset()
6016 dig->cur_gaincode.lna_idx = LNA_IDX_MAX; in rtw89_phy_dig_para_reset()
6017 dig->cur_gaincode.tia_idx = TIA_IDX_MAX; in rtw89_phy_dig_para_reset()
6018 dig->cur_gaincode.rxb_idx = RXB_IDX_MAX; in rtw89_phy_dig_para_reset()
6019 dig->force_gaincode.lna_idx = LNA_IDX_MAX; in rtw89_phy_dig_para_reset()
6020 dig->force_gaincode.tia_idx = TIA_IDX_MAX; in rtw89_phy_dig_para_reset()
6021 dig->force_gaincode.rxb_idx = RXB_IDX_MAX; in rtw89_phy_dig_para_reset()
6023 dig->dyn_igi_max = igi_max_performance_mode; in rtw89_phy_dig_para_reset()
6024 dig->dyn_igi_min = dynamic_igi_min; in rtw89_phy_dig_para_reset()
6025 dig->dyn_pd_th_max = dynamic_pd_threshold_max; in rtw89_phy_dig_para_reset()
6026 dig->pd_low_th_ofst = pd_low_th_offset; in rtw89_phy_dig_para_reset()
6027 dig->is_linked_pre = false; in rtw89_phy_dig_para_reset()
6033 rtw89_debug(rtwdev, RTW89_DBG_DIG, "BB-%d dig_init\n", bb->phy_idx); in __rtw89_phy_dig_init()
6050 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_lna_idx_by_rssi()
6053 if (rssi < dig->igi_rssi_th[0]) in rtw89_phy_dig_lna_idx_by_rssi()
6055 else if (rssi < dig->igi_rssi_th[1]) in rtw89_phy_dig_lna_idx_by_rssi()
6057 else if (rssi < dig->igi_rssi_th[2]) in rtw89_phy_dig_lna_idx_by_rssi()
6059 else if (rssi < dig->igi_rssi_th[3]) in rtw89_phy_dig_lna_idx_by_rssi()
6061 else if (rssi < dig->igi_rssi_th[4]) in rtw89_phy_dig_lna_idx_by_rssi()
6072 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_tia_idx_by_rssi()
6075 if (rssi < dig->igi_rssi_th[0]) in rtw89_phy_dig_tia_idx_by_rssi()
6089 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_rxb_idx_by_rssi()
6090 s8 lna_gain = dig->lna_gain[set->lna_idx]; in rtw89_phy_dig_rxb_idx_by_rssi()
6091 s8 tia_gain = dig->tia_gain[set->tia_idx]; in rtw89_phy_dig_rxb_idx_by_rssi()
6096 rxb_idx_tmp += dig->ib_pkpwr - dig->ib_pbk - wb_rssi; in rtw89_phy_dig_rxb_idx_by_rssi()
6109 set->lna_idx = rtw89_phy_dig_lna_idx_by_rssi(rtwdev, bb, rssi); in rtw89_phy_dig_gaincode_by_rssi()
6110 set->tia_idx = rtw89_phy_dig_tia_idx_by_rssi(rtwdev, bb, rssi); in rtw89_phy_dig_gaincode_by_rssi()
6111 set->rxb_idx = rtw89_phy_dig_rxb_idx_by_rssi(rtwdev, bb, rssi, set); in rtw89_phy_dig_gaincode_by_rssi()
6115 rssi, set->lna_idx, set->tia_idx, set->rxb_idx); in rtw89_phy_dig_gaincode_by_rssi()
6123 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_igi_offset_by_env()
6124 struct rtw89_env_monitor_info *env = &bb->env_monitor; in rtw89_phy_dig_igi_offset_by_env()
6126 u8 igi_offset = dig->fa_rssi_ofst; in rtw89_phy_dig_igi_offset_by_env()
6129 fa_ratio = env->ifs_clm_cck_fa_permil + env->ifs_clm_ofdm_fa_permil; in rtw89_phy_dig_igi_offset_by_env()
6131 if (fa_ratio < dig->fa_th[0]) in rtw89_phy_dig_igi_offset_by_env()
6133 else if (fa_ratio < dig->fa_th[1]) in rtw89_phy_dig_igi_offset_by_env()
6135 else if (fa_ratio < dig->fa_th[2]) in rtw89_phy_dig_igi_offset_by_env()
6137 else if (fa_ratio < dig->fa_th[3]) in rtw89_phy_dig_igi_offset_by_env()
6148 dig->fa_rssi_ofst = igi_offset; in rtw89_phy_dig_igi_offset_by_env()
6151 "fa_th: [+6 (%d) +4 (%d) +2 (%d) 0 (%d) -2 ]\n", in rtw89_phy_dig_igi_offset_by_env()
6152 dig->fa_th[3], dig->fa_th[2], dig->fa_th[1], dig->fa_th[0]); in rtw89_phy_dig_igi_offset_by_env()
6156 env->ifs_clm_cck_fa_permil, env->ifs_clm_ofdm_fa_permil, in rtw89_phy_dig_igi_offset_by_env()
6157 env->ifs_clm_cck_fa_permil + env->ifs_clm_ofdm_fa_permil, in rtw89_phy_dig_igi_offset_by_env()
6164 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_lna_idx()
6166 rtw89_phy_write32_idx(rtwdev, dig_regs->p0_lna_init.addr, in rtw89_phy_dig_set_lna_idx()
6167 dig_regs->p0_lna_init.mask, lna_idx, bb->phy_idx); in rtw89_phy_dig_set_lna_idx()
6168 rtw89_phy_write32_idx(rtwdev, dig_regs->p1_lna_init.addr, in rtw89_phy_dig_set_lna_idx()
6169 dig_regs->p1_lna_init.mask, lna_idx, bb->phy_idx); in rtw89_phy_dig_set_lna_idx()
6175 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_tia_idx()
6177 rtw89_phy_write32_idx(rtwdev, dig_regs->p0_tia_init.addr, in rtw89_phy_dig_set_tia_idx()
6178 dig_regs->p0_tia_init.mask, tia_idx, bb->phy_idx); in rtw89_phy_dig_set_tia_idx()
6179 rtw89_phy_write32_idx(rtwdev, dig_regs->p1_tia_init.addr, in rtw89_phy_dig_set_tia_idx()
6180 dig_regs->p1_tia_init.mask, tia_idx, bb->phy_idx); in rtw89_phy_dig_set_tia_idx()
6186 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_rxb_idx()
6188 rtw89_phy_write32_idx(rtwdev, dig_regs->p0_rxb_init.addr, in rtw89_phy_dig_set_rxb_idx()
6189 dig_regs->p0_rxb_init.mask, rxb_idx, bb->phy_idx); in rtw89_phy_dig_set_rxb_idx()
6190 rtw89_phy_write32_idx(rtwdev, dig_regs->p1_rxb_init.addr, in rtw89_phy_dig_set_rxb_idx()
6191 dig_regs->p1_rxb_init.mask, rxb_idx, bb->phy_idx); in rtw89_phy_dig_set_rxb_idx()
6198 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_set_igi_cr()
6213 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_sdagc_follow_pagc_config()
6215 rtw89_phy_write32_idx(rtwdev, dig_regs->p0_p20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
6216 dig_regs->p0_p20_pagcugc_en.mask, enable, bb->phy_idx); in rtw89_phy_dig_sdagc_follow_pagc_config()
6217 rtw89_phy_write32_idx(rtwdev, dig_regs->p0_s20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
6218 dig_regs->p0_s20_pagcugc_en.mask, enable, bb->phy_idx); in rtw89_phy_dig_sdagc_follow_pagc_config()
6219 rtw89_phy_write32_idx(rtwdev, dig_regs->p1_p20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
6220 dig_regs->p1_p20_pagcugc_en.mask, enable, bb->phy_idx); in rtw89_phy_dig_sdagc_follow_pagc_config()
6221 rtw89_phy_write32_idx(rtwdev, dig_regs->p1_s20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
6222 dig_regs->p1_s20_pagcugc_en.mask, enable, bb->phy_idx); in rtw89_phy_dig_sdagc_follow_pagc_config()
6230 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_config_igi()
6232 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_config_igi()
6235 if (dig->force_gaincode_idx_en) { in rtw89_phy_dig_config_igi()
6236 rtw89_phy_dig_set_igi_cr(rtwdev, bb, dig->force_gaincode); in rtw89_phy_dig_config_igi()
6240 rtw89_phy_dig_gaincode_by_rssi(rtwdev, bb, dig->igi_fa_rssi, in rtw89_phy_dig_config_igi()
6241 &dig->cur_gaincode); in rtw89_phy_dig_config_igi()
6242 rtw89_phy_dig_set_igi_cr(rtwdev, bb, dig->cur_gaincode); in rtw89_phy_dig_config_igi()
6250 const struct rtw89_chan *chan = rtw89_mgnt_chan_get(rtwdev, bb->phy_idx); in rtw89_phy_dig_dyn_pd_th()
6251 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_dyn_pd_th()
6252 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_dig_dyn_pd_th()
6253 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_dyn_pd_th()
6254 u8 final_rssi = 0, under_region = dig->pd_low_th_ofst; in rtw89_phy_dig_dyn_pd_th()
6259 if (rtwdev->chip->chip_gen == RTW89_CHIP_AX) in rtw89_phy_dig_dyn_pd_th()
6279 dig->dyn_pd_th_max = dig->igi_rssi; in rtw89_phy_dig_dyn_pd_th()
6281 final_rssi = min_t(u8, rssi, dig->igi_rssi); in rtw89_phy_dig_dyn_pd_th()
6286 pd_val = (ofdm_cca_th - under_region - PD_TH_MIN_RSSI) >> 1; in rtw89_phy_dig_dyn_pd_th()
6295 rtw89_phy_write32_idx(rtwdev, dig_regs->seg0_pd_reg, in rtw89_phy_dig_dyn_pd_th()
6296 dig_regs->pd_lower_bound_mask, pd_val, bb->phy_idx); in rtw89_phy_dig_dyn_pd_th()
6297 rtw89_phy_write32_idx(rtwdev, dig_regs->seg0_pd_reg, in rtw89_phy_dig_dyn_pd_th()
6298 dig_regs->pd_spatial_reuse_en, enable, bb->phy_idx); in rtw89_phy_dig_dyn_pd_th()
6300 if (!rtwdev->hal.support_cckpd) in rtw89_phy_dig_dyn_pd_th()
6303 cck_cca_th = max_t(s8, final_rssi - under_region, CCKPD_TH_MIN_RSSI); in rtw89_phy_dig_dyn_pd_th()
6304 pd_val = (u32)(cck_cca_th - IGI_RSSI_MAX); in rtw89_phy_dig_dyn_pd_th()
6310 rtw89_phy_write32_idx(rtwdev, dig_regs->bmode_pd_reg, in rtw89_phy_dig_dyn_pd_th()
6311 dig_regs->bmode_cca_rssi_limit_en, enable, bb->phy_idx); in rtw89_phy_dig_dyn_pd_th()
6312 rtw89_phy_write32_idx(rtwdev, dig_regs->bmode_pd_lower_bound_reg, in rtw89_phy_dig_dyn_pd_th()
6313 dig_regs->bmode_rssi_nocca_low_th_mask, pd_val, bb->phy_idx); in rtw89_phy_dig_dyn_pd_th()
6318 struct rtw89_dig_info *dig = &bb->dig; in rtw89_phy_dig_reset()
6320 dig->bypass_dig = false; in rtw89_phy_dig_reset()
6322 rtw89_phy_dig_set_igi_cr(rtwdev, bb, dig->force_gaincode); in rtw89_phy_dig_reset()
6332 struct rtw89_dig_info *dig = &bb->dig; in __rtw89_phy_dig()
6333 bool is_linked = rtwdev->total_sta_assoc > 0; in __rtw89_phy_dig()
6336 if (unlikely(dig->bypass_dig)) { in __rtw89_phy_dig()
6337 dig->bypass_dig = false; in __rtw89_phy_dig()
6341 rtw89_debug(rtwdev, RTW89_DBG_DIG, "BB-%d dig track\n", bb->phy_idx); in __rtw89_phy_dig()
6345 if (!dig->is_linked_pre && is_linked) { in __rtw89_phy_dig()
6348 dig->igi_fa_rssi = dig->igi_rssi; in __rtw89_phy_dig()
6349 } else if (dig->is_linked_pre && !is_linked) { in __rtw89_phy_dig()
6352 dig->igi_fa_rssi = dig->igi_rssi; in __rtw89_phy_dig()
6354 dig->is_linked_pre = is_linked; in __rtw89_phy_dig()
6358 igi_min = max_t(int, dig->igi_rssi - IGI_RSSI_MIN, 0); in __rtw89_phy_dig()
6359 dig->dyn_igi_max = min(igi_min + IGI_OFFSET_MAX, igi_max_performance_mode); in __rtw89_phy_dig()
6360 dig->dyn_igi_min = max(igi_min, ABS_IGI_MIN); in __rtw89_phy_dig()
6362 if (dig->dyn_igi_max >= dig->dyn_igi_min) { in __rtw89_phy_dig()
6363 dig->igi_fa_rssi += dig->fa_rssi_ofst; in __rtw89_phy_dig()
6364 dig->igi_fa_rssi = clamp(dig->igi_fa_rssi, dig->dyn_igi_min, in __rtw89_phy_dig()
6365 dig->dyn_igi_max); in __rtw89_phy_dig()
6367 dig->igi_fa_rssi = dig->dyn_igi_max; in __rtw89_phy_dig()
6372 dig->igi_rssi, dig->dyn_igi_max, dig->dyn_igi_min, in __rtw89_phy_dig()
6373 dig->igi_fa_rssi); in __rtw89_phy_dig()
6377 rtw89_phy_dig_dyn_pd_th(rtwdev, bb, dig->igi_fa_rssi, dig->dyn_pd_th_en); in __rtw89_phy_dig()
6379 if (dig->dyn_pd_th_en && dig->igi_fa_rssi > dig->dyn_pd_th_max) in __rtw89_phy_dig()
6396 struct rtw89_hal *hal = &rtwdev->hal; in __rtw89_phy_tx_path_div_sta_iter()
6400 rssi_a = ewma_rssi_read(&rtwsta_link->rssi[RF_PATH_A]); in __rtw89_phy_tx_path_div_sta_iter()
6401 rssi_b = ewma_rssi_read(&rtwsta_link->rssi[RF_PATH_B]); in __rtw89_phy_tx_path_div_sta_iter()
6410 if (hal->antenna_tx == candidate) in __rtw89_phy_tx_path_div_sta_iter()
6413 hal->antenna_tx = candidate; in __rtw89_phy_tx_path_div_sta_iter()
6416 if (hal->antenna_tx == RF_A) { in __rtw89_phy_tx_path_div_sta_iter()
6419 } else if (hal->antenna_tx == RF_B) { in __rtw89_phy_tx_path_div_sta_iter()
6428 struct rtw89_dev *rtwdev = rtwsta->rtwdev; in rtw89_phy_tx_path_div_sta_iter()
6429 struct rtw89_vif *rtwvif = rtwsta->rtwvif; in rtw89_phy_tx_path_div_sta_iter()
6439 if (sta->tdls) in rtw89_phy_tx_path_div_sta_iter()
6446 rtwvif_link = rtwsta_link->rtwvif_link; in rtw89_phy_tx_path_div_sta_iter()
6447 if (rtwvif_link->wifi_role != RTW89_WIFI_ROLE_STATION) in rtw89_phy_tx_path_div_sta_iter()
6458 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_tx_path_div_track()
6461 if (!hal->tx_path_diversity) in rtw89_phy_tx_path_div_track()
6464 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_tx_path_div_track()
6474 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_set_ant()
6477 if (!hal->ant_diversity || hal->antenna_tx == 0) in rtw89_phy_antdiv_set_ant()
6480 if (hal->antenna_tx == RF_B) { in rtw89_phy_antdiv_set_ant()
6500 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_swap_hal_antenna()
6502 hal->antenna_rx = hal->antenna_rx == RF_A ? RF_B : RF_A; in rtw89_phy_swap_hal_antenna()
6503 hal->antenna_tx = hal->antenna_rx; in rtw89_phy_swap_hal_antenna()
6508 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_decision_state()
6509 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_decision_state()
6515 antdiv->get_stats = false; in rtw89_phy_antdiv_decision_state()
6516 antdiv->training_count = 0; in rtw89_phy_antdiv_decision_state()
6518 main_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->main_stats); in rtw89_phy_antdiv_decision_state()
6519 main_evm = rtw89_phy_antdiv_sts_instance_get_evm(&antdiv->main_stats); in rtw89_phy_antdiv_decision_state()
6520 aux_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->aux_stats); in rtw89_phy_antdiv_decision_state()
6521 aux_evm = rtw89_phy_antdiv_sts_instance_get_evm(&antdiv->aux_stats); in rtw89_phy_antdiv_decision_state()
6540 hal->antenna_tx = candidate; in rtw89_phy_antdiv_decision_state()
6541 hal->antenna_rx = candidate; in rtw89_phy_antdiv_decision_state()
6546 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_training_state()
6549 if (antdiv->training_count % 2 == 0) { in rtw89_phy_antdiv_training_state()
6550 if (antdiv->training_count == 0) in rtw89_phy_antdiv_training_state()
6553 antdiv->get_stats = true; in rtw89_phy_antdiv_training_state()
6556 antdiv->get_stats = false; in rtw89_phy_antdiv_training_state()
6563 antdiv->training_count++; in rtw89_phy_antdiv_training_state()
6564 wiphy_delayed_work_queue(rtwdev->hw->wiphy, &rtwdev->antdiv_work, in rtw89_phy_antdiv_training_state()
6572 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_work()
6576 if (antdiv->training_count <= ANTDIV_TRAINNING_CNT) { in rtw89_phy_antdiv_work()
6586 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_track()
6587 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_track()
6590 if (!hal->ant_diversity || hal->ant_diversity_fixed) in rtw89_phy_antdiv_track()
6593 rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->target_stats); in rtw89_phy_antdiv_track()
6594 rssi_pre = antdiv->rssi_pre; in rtw89_phy_antdiv_track()
6595 antdiv->rssi_pre = rssi; in rtw89_phy_antdiv_track()
6596 rtw89_phy_antdiv_sts_instance_reset(&antdiv->target_stats); in rtw89_phy_antdiv_track()
6598 if (abs((int)rssi - (int)rssi_pre) < ANTDIV_RSSI_DIFF_TH) in rtw89_phy_antdiv_track()
6601 antdiv->training_count = 0; in rtw89_phy_antdiv_track()
6602 wiphy_delayed_work_queue(rtwdev->hw->wiphy, &rtwdev->antdiv_work, 0); in rtw89_phy_antdiv_track()
6609 "BB-%d env_monitor init\n", bb->phy_idx); in __rtw89_phy_env_monitor_init()
6626 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in __rtw89_phy_edcca_init()
6627 struct rtw89_edcca_bak *edcca_bak = &bb->edcca_bak; in __rtw89_phy_edcca_init()
6629 rtw89_debug(rtwdev, RTW89_DBG_EDCCA, "BB-%d edcca init\n", bb->phy_idx); in __rtw89_phy_edcca_init()
6633 if (rtwdev->chip->chip_id == RTL8922A && rtwdev->hal.cv == CHIP_CAV) { in __rtw89_phy_edcca_init()
6645 rtw89_phy_write32_idx(rtwdev, edcca_regs->tx_collision_t2r_st, in __rtw89_phy_edcca_init()
6646 edcca_regs->tx_collision_t2r_st_mask, 0x29, bb->phy_idx); in __rtw89_phy_edcca_init()
6693 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_set_bss_color()
6694 const struct rtw89_reg_def *bss_clr_vld = &chip->bss_clr_vld; in rtw89_phy_set_bss_color()
6695 enum rtw89_phy_idx phy_idx = rtwvif_link->phy_idx; in rtw89_phy_set_bss_color()
6702 if (!bss_conf->he_support || !vif->cfg.assoc) { in rtw89_phy_set_bss_color()
6707 bss_color = bss_conf->he_bss_color.color; in rtw89_phy_set_bss_color()
6711 rtw89_phy_write32_idx(rtwdev, bss_clr_vld->addr, bss_clr_vld->mask, 0x1, in rtw89_phy_set_bss_color()
6713 rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_TGT, in rtw89_phy_set_bss_color()
6715 rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_STAID, in rtw89_phy_set_bss_color()
6716 vif->cfg.aid, phy_idx); in rtw89_phy_set_bss_color()
6721 return desc->ch != 0; in rfk_chan_validate_desc()
6730 if (desc->ch != chan->channel) in rfk_chan_is_equivalent()
6733 if (desc->has_band && desc->band != chan->band_type) in rfk_chan_is_equivalent()
6736 if (desc->has_bw && desc->bw != chan->band_width) in rfk_chan_is_equivalent()
6751 if (rfk_chan_is_equivalent(&iter_data->desc, chan)) in rfk_chan_iter_search()
6752 iter_data->found++; in rfk_chan_iter_search()
6761 int sel = -1; in rtw89_rfk_chan_lookup()
6773 if (!iter_data.found && sel == -1) in rtw89_rfk_chan_lookup()
6777 if (sel == -1) { in rtw89_rfk_chan_lookup()
6790 rtw89_write_rf(rtwdev, def->path, def->addr, def->mask, def->data); in _rfk_write_rf()
6796 rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data); in _rfk_write32_mask()
6802 rtw89_phy_write32_set(rtwdev, def->addr, def->mask); in _rfk_write32_set()
6808 rtw89_phy_write32_clr(rtwdev, def->addr, def->mask); in _rfk_write32_clr()
6814 udelay(def->data); in _rfk_delay()
6831 const struct rtw89_reg5_def *p = tbl->defs; in rtw89_rfk_parser()
6832 const struct rtw89_reg5_def *end = tbl->defs + tbl->size; in rtw89_rfk_parser()
6835 _rfk_handler[p->flag](rtwdev, p); in rtw89_rfk_parser()
6916 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_tssi_ctrl_set_bandedge_cfg()
6930 data = chip->tssi_dbw_table->data[bandedge_cfg]; in rtw89_phy_tssi_ctrl_set_bandedge_cfg()
6982 for (idx = last; idx >= first; idx--) in rtw89_encode_chan_idx()
6993 (central_ch - rtw89_ch_base_table[idx]) >> 1); in rtw89_encode_chan_idx()
7020 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_config_edcca()
7021 struct rtw89_edcca_bak *edcca_bak = &bb->edcca_bak; in rtw89_phy_config_edcca()
7024 edcca_bak->a = in rtw89_phy_config_edcca()
7025 rtw89_phy_read32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
7026 edcca_regs->edcca_mask, bb->phy_idx); in rtw89_phy_config_edcca()
7027 edcca_bak->p = in rtw89_phy_config_edcca()
7028 rtw89_phy_read32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
7029 edcca_regs->edcca_p_mask, bb->phy_idx); in rtw89_phy_config_edcca()
7030 edcca_bak->ppdu = in rtw89_phy_config_edcca()
7031 rtw89_phy_read32_idx(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_config_edcca()
7032 edcca_regs->ppdu_mask, bb->phy_idx); in rtw89_phy_config_edcca()
7034 rtw89_phy_write32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
7035 edcca_regs->edcca_mask, EDCCA_MAX, bb->phy_idx); in rtw89_phy_config_edcca()
7036 rtw89_phy_write32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
7037 edcca_regs->edcca_p_mask, EDCCA_MAX, bb->phy_idx); in rtw89_phy_config_edcca()
7038 rtw89_phy_write32_idx(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_config_edcca()
7039 edcca_regs->ppdu_mask, EDCCA_MAX, bb->phy_idx); in rtw89_phy_config_edcca()
7041 rtw89_phy_write32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
7042 edcca_regs->edcca_mask, in rtw89_phy_config_edcca()
7043 edcca_bak->a, bb->phy_idx); in rtw89_phy_config_edcca()
7044 rtw89_phy_write32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
7045 edcca_regs->edcca_p_mask, in rtw89_phy_config_edcca()
7046 edcca_bak->p, bb->phy_idx); in rtw89_phy_config_edcca()
7047 rtw89_phy_write32_idx(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_config_edcca()
7048 edcca_regs->ppdu_mask, in rtw89_phy_config_edcca()
7049 edcca_bak->ppdu, bb->phy_idx); in rtw89_phy_config_edcca()
7055 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_edcca_log()
7066 if (bb->phy_idx == RTW89_PHY_1) in rtw89_phy_edcca_log()
7067 edcca_p_regs = &edcca_regs->p[RTW89_PHY_1]; in rtw89_phy_edcca_log()
7069 edcca_p_regs = &edcca_regs->p[RTW89_PHY_0]; in rtw89_phy_edcca_log()
7071 if (rtwdev->chip->chip_id == RTL8922A) in rtw89_phy_edcca_log()
7072 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel_be, in rtw89_phy_edcca_log()
7073 edcca_regs->rpt_sel_be_mask, 0); in rtw89_phy_edcca_log()
7075 rtw89_phy_write32_mask(rtwdev, edcca_p_regs->rpt_sel, in rtw89_phy_edcca_log()
7076 edcca_p_regs->rpt_sel_mask, 0); in rtw89_phy_edcca_log()
7077 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_b); in rtw89_phy_edcca_log()
7088 rtw89_phy_write32_mask(rtwdev, edcca_p_regs->rpt_sel, in rtw89_phy_edcca_log()
7089 edcca_p_regs->rpt_sel_mask, 4); in rtw89_phy_edcca_log()
7090 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_b); in rtw89_phy_edcca_log()
7094 per20_bitmap = rtw89_phy_read32_mask(rtwdev, edcca_p_regs->rpt_a, in rtw89_phy_edcca_log()
7097 if (rtwdev->chip->chip_id == RTL8922A) { in rtw89_phy_edcca_log()
7098 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel_be, in rtw89_phy_edcca_log()
7099 edcca_regs->rpt_sel_be_mask, 4); in rtw89_phy_edcca_log()
7100 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_b); in rtw89_phy_edcca_log()
7106 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel_be, in rtw89_phy_edcca_log()
7107 edcca_regs->rpt_sel_be_mask, 5); in rtw89_phy_edcca_log()
7108 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_b); in rtw89_phy_edcca_log()
7114 rtw89_phy_write32_mask(rtwdev, edcca_p_regs->rpt_sel, in rtw89_phy_edcca_log()
7115 edcca_p_regs->rpt_sel_mask, 0); in rtw89_phy_edcca_log()
7116 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_a); in rtw89_phy_edcca_log()
7120 rtw89_phy_write32_mask(rtwdev, edcca_p_regs->rpt_sel, in rtw89_phy_edcca_log()
7121 edcca_p_regs->rpt_sel_mask, 1); in rtw89_phy_edcca_log()
7122 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_a); in rtw89_phy_edcca_log()
7126 rtw89_phy_write32_mask(rtwdev, edcca_p_regs->rpt_sel, in rtw89_phy_edcca_log()
7127 edcca_p_regs->rpt_sel_mask, 2); in rtw89_phy_edcca_log()
7128 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_a); in rtw89_phy_edcca_log()
7132 rtw89_phy_write32_mask(rtwdev, edcca_p_regs->rpt_sel, in rtw89_phy_edcca_log()
7133 edcca_p_regs->rpt_sel_mask, 3); in rtw89_phy_edcca_log()
7134 tmp = rtw89_phy_read32(rtwdev, edcca_p_regs->rpt_a); in rtw89_phy_edcca_log()
7159 struct rtw89_phy_ch_info *ch_info = &bb->ch_info; in rtw89_phy_edcca_get_thre_by_rssi()
7160 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_edcca_get_thre_by_rssi()
7161 u8 rssi_min = ch_info->rssi_min >> 1; in rtw89_phy_edcca_get_thre_by_rssi()
7167 edcca_thre = rssi_min - RSSI_UNIT_CONVER + EDCCA_UNIT_CONVER - in rtw89_phy_edcca_get_thre_by_rssi()
7177 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_edcca_thre_calc()
7178 struct rtw89_edcca_bak *edcca_bak = &bb->edcca_bak; in rtw89_phy_edcca_thre_calc()
7182 if (th == edcca_bak->th_old) in rtw89_phy_edcca_thre_calc()
7185 edcca_bak->th_old = th; in rtw89_phy_edcca_thre_calc()
7190 rtw89_phy_write32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_edcca_thre_calc()
7191 edcca_regs->edcca_mask, th, bb->phy_idx); in rtw89_phy_edcca_thre_calc()
7192 rtw89_phy_write32_idx(rtwdev, edcca_regs->edcca_level, in rtw89_phy_edcca_thre_calc()
7193 edcca_regs->edcca_p_mask, th, bb->phy_idx); in rtw89_phy_edcca_thre_calc()
7194 rtw89_phy_write32_idx(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_edcca_thre_calc()
7195 edcca_regs->ppdu_mask, th, bb->phy_idx); in rtw89_phy_edcca_thre_calc()
7201 rtw89_debug(rtwdev, RTW89_DBG_EDCCA, "BB-%d edcca track\n", bb->phy_idx); in __rtw89_phy_edcca_track()
7209 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_edcca_track()
7212 if (hal->disabled_dm_bitmap & BIT(RTW89_DM_DYNAMIC_EDCCA)) in rtw89_phy_edcca_track()
7224 rtwdev->dbcc_en, rtwdev->mlo_dbcc_mode, phy_idx); in rtw89_phy_get_kpath()
7226 switch (rtwdev->mlo_dbcc_mode) { in rtw89_phy_get_kpath()
7258 rtwdev->dbcc_en, rtwdev->mlo_dbcc_mode, phy_idx); in rtw89_phy_get_syn_sel()
7260 switch (rtwdev->mlo_dbcc_mode) { in rtw89_phy_get_syn_sel()