1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020  Realtek Corporation
43 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_mem_write()
44 	u32 addr = mac->mem_base_addrs[sel] + offset;  in rtw89_mac_mem_write()
46 	rtw89_write32(rtwdev, mac->filter_model_addr, addr);  in rtw89_mac_mem_write()
47 	rtw89_write32(rtwdev, mac->indir_access_addr, val);  in rtw89_mac_mem_write()
53 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_mem_read()
54 	u32 addr = mac->mem_base_addrs[sel] + offset;  in rtw89_mac_mem_read()
56 	rtw89_write32(rtwdev, mac->filter_model_addr, addr);  in rtw89_mac_mem_read()
57 	return rtw89_read32(rtwdev, mac->indir_access_addr);  in rtw89_mac_mem_read()
75 		return -EINVAL;  in rtw89_mac_check_mac_en_ax()
79 		return -EFAULT;  in rtw89_mac_check_mac_en_ax()
122 	switch (ctrl->type) {  in rtw89_mac_dle_dfi_cfg()
126 		ctrl_data = FIELD_PREP(B_AX_WDE_DFI_TRGSEL_MASK, ctrl->target) |  in rtw89_mac_dle_dfi_cfg()
127 			    FIELD_PREP(B_AX_WDE_DFI_ADDR_MASK, ctrl->addr) |  in rtw89_mac_dle_dfi_cfg()
133 		ctrl_data = FIELD_PREP(B_AX_PLE_DFI_TRGSEL_MASK, ctrl->target) |  in rtw89_mac_dle_dfi_cfg()
134 			    FIELD_PREP(B_AX_PLE_DFI_ADDR_MASK, ctrl->addr) |  in rtw89_mac_dle_dfi_cfg()
138 		rtw89_warn(rtwdev, "[ERR] dfi ctrl type %d\n", ctrl->type);  in rtw89_mac_dle_dfi_cfg()
139 		return -EINVAL;  in rtw89_mac_dle_dfi_cfg()
152 	ctrl->out_data = rtw89_read32(rtwdev, data_reg);  in rtw89_mac_dle_dfi_cfg()
162 	ctrl.type = quota->dle_type;  in rtw89_mac_dle_dfi_quota_cfg()
164 	ctrl.addr = quota->qtaid;  in rtw89_mac_dle_dfi_quota_cfg()
171 	quota->rsv_pgnum = FIELD_GET(B_AX_DLE_RSV_PGNUM, ctrl.out_data);  in rtw89_mac_dle_dfi_quota_cfg()
172 	quota->use_pgnum = FIELD_GET(B_AX_DLE_USE_PGNUM, ctrl.out_data);  in rtw89_mac_dle_dfi_quota_cfg()
182 	ctrl.type = qempty->dle_type;  in rtw89_mac_dle_dfi_qempty_cfg()
184 	ctrl.addr = qempty->grpsel;  in rtw89_mac_dle_dfi_qempty_cfg()
191 	qempty->qempty = FIELD_GET(B_AX_DLE_QEMPTY_GRP, ctrl.out_data);  in rtw89_mac_dle_dfi_qempty_cfg()
305 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_dump_l0_to_l1()
314 		mac->dump_qta_lost(rtwdev);  in rtw89_mac_dump_l0_to_l1()
323 	const struct rtw89_chip_info *chip = rtwdev->chip;  in rtw89_mac_dump_dmac_err_status()
343 		if (chip->chip_id == RTL8852C) {  in rtw89_mac_dump_dmac_err_status()
360 		if (chip->chip_id == RTL8852C)  in rtw89_mac_dump_dmac_err_status()
369 		if (chip->chip_id == RTL8852C) {  in rtw89_mac_dump_dmac_err_status()
401 		} else if (chip->chip_id == RTL8922A) {  in rtw89_mac_dump_dmac_err_status()
452 		if (chip->chip_id == RTL8922A) {  in rtw89_mac_dump_dmac_err_status()
477 		if (chip->chip_id == RTL8852C || chip->chip_id == RTL8922A) {  in rtw89_mac_dump_dmac_err_status()
515 		if (chip->chip_id == RTL8922A) {  in rtw89_mac_dump_dmac_err_status()
529 			if (chip->chip_id == RTL8852C) {  in rtw89_mac_dump_dmac_err_status()
555 		if (chip->chip_id == RTL8922A) {  in rtw89_mac_dump_dmac_err_status()
585 		if (chip->chip_id == RTL8852C || chip->chip_id == RTL8922A) {  in rtw89_mac_dump_dmac_err_status()
610 		if (chip->chip_id == RTL8922A) {  in rtw89_mac_dump_dmac_err_status()
619 		if (chip->chip_id == RTL8922A) {  in rtw89_mac_dump_dmac_err_status()
624 		} else if (chip->chip_id == RTL8852C) {  in rtw89_mac_dump_dmac_err_status()
659 	const struct rtw89_chip_info *chip = rtwdev->chip;  in rtw89_mac_dump_cmac_err_status_ax()
699 		if (chip->chip_id == RTL8852C) {  in rtw89_mac_dump_cmac_err_status_ax()
711 		if (chip->chip_id == RTL8852C) {  in rtw89_mac_dump_cmac_err_status_ax()
730 		if (chip->chip_id == RTL8852C) {  in rtw89_mac_dump_cmac_err_status_ax()
757 	rtw89_info(rtwdev, "--->\nerr=0x%x\n", err);  in rtw89_mac_dump_err_status_ax()
771 	rtwdev->hci.ops->dump_err_status(rtwdev);  in rtw89_mac_dump_err_status_ax()
776 	rtw89_info(rtwdev, "<---\n");  in rtw89_mac_dump_err_status_ax()
781 	struct rtw89_ser *ser = &rtwdev->ser;  in rtw89_mac_suppress_log()
785 	if (rtwdev->chip->chip_id == RTL8852C) {  in rtw89_mac_suppress_log()
797 				set_bit(RTW89_SER_SUPPRESS_LOG, ser->flags);  in rtw89_mac_suppress_log()
801 			if (test_bit(RTW89_SER_SUPPRESS_LOG, ser->flags))  in rtw89_mac_suppress_log()
804 			if (test_and_clear_bit(RTW89_SER_SUPPRESS_LOG, ser->flags))  in rtw89_mac_suppress_log()
814 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_get_err_status()
840 	mac->dump_err_status(rtwdev, err);  in rtw89_mac_get_err_status()
848 	struct rtw89_ser *ser = &rtwdev->ser;  in rtw89_mac_set_err_status()
853 		rtw89_err(rtwdev, "Bad set-err-status value 0x%08x\n", err);  in rtw89_mac_set_err_status()
854 		return -EINVAL;  in rtw89_mac_set_err_status()
861 		return -EFAULT;  in rtw89_mac_set_err_status()
866 	if (ser->prehandle_l1 &&  in rtw89_mac_set_err_status()
878 	struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param;  in hfc_reset_param()
880 	u8 qta_mode = rtwdev->mac.dle_info.qta_mode;  in hfc_reset_param()
882 	switch (rtwdev->hci.type) {  in hfc_reset_param()
884 		param_ini = rtwdev->chip->hfc_param_ini[qta_mode];  in hfc_reset_param()
885 		param->en = 0;  in hfc_reset_param()
888 		return -EINVAL;  in hfc_reset_param()
892 		param->pub_cfg = *param_ini.pub_cfg;  in hfc_reset_param()
895 		param->prec_cfg = *param_ini.prec_cfg;  in hfc_reset_param()
898 		param->ch_cfg = param_ini.ch_cfg;  in hfc_reset_param()
900 	memset(&param->ch_info, 0, sizeof(param->ch_info));  in hfc_reset_param()
901 	memset(&param->pub_info, 0, sizeof(param->pub_info));  in hfc_reset_param()
902 	param->mode = param_ini.mode;  in hfc_reset_param()
907 static int hfc_ch_cfg_chk(struct rtw89_dev *rtwdev, u8 ch)  in hfc_ch_cfg_chk()  argument
909 	struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param;  in hfc_ch_cfg_chk()
910 	const struct rtw89_hfc_ch_cfg *ch_cfg = param->ch_cfg;  in hfc_ch_cfg_chk()
911 	const struct rtw89_hfc_pub_cfg *pub_cfg = &param->pub_cfg;  in hfc_ch_cfg_chk()
912 	const struct rtw89_hfc_prec_cfg *prec_cfg = &param->prec_cfg;  in hfc_ch_cfg_chk()
914 	if (ch >= RTW89_DMA_CH_NUM)  in hfc_ch_cfg_chk()
915 		return -EINVAL;  in hfc_ch_cfg_chk()
917 	if ((ch_cfg[ch].min && ch_cfg[ch].min < prec_cfg->ch011_prec) ||  in hfc_ch_cfg_chk()
918 	    ch_cfg[ch].max > pub_cfg->pub_max)  in hfc_ch_cfg_chk()
919 		return -EINVAL;  in hfc_ch_cfg_chk()
920 	if (ch_cfg[ch].grp >= grp_num)  in hfc_ch_cfg_chk()
921 		return -EINVAL;  in hfc_ch_cfg_chk()
928 	struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param;  in hfc_pub_info_chk()
929 	const struct rtw89_hfc_pub_cfg *cfg = &param->pub_cfg;  in hfc_pub_info_chk()
930 	struct rtw89_hfc_pub_info *info = &param->pub_info;  in hfc_pub_info_chk()
932 	if (info->g0_used + info->g1_used + info->pub_aval != cfg->pub_max) {  in hfc_pub_info_chk()
933 		if (rtwdev->chip->chip_id == RTL8852A)  in hfc_pub_info_chk()
936 			return -EFAULT;  in hfc_pub_info_chk()
944 	struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param;  in hfc_pub_cfg_chk()
945 	const struct rtw89_hfc_pub_cfg *pub_cfg = &param->pub_cfg;  in hfc_pub_cfg_chk()
947 	if (pub_cfg->grp0 + pub_cfg->grp1 != pub_cfg->pub_max)  in hfc_pub_cfg_chk()
948 		return -EFAULT;  in hfc_pub_cfg_chk()
953 static int hfc_ch_ctrl(struct rtw89_dev *rtwdev, u8 ch)  in hfc_ch_ctrl()  argument
955 	const struct rtw89_chip_info *chip = rtwdev->chip;  in hfc_ch_ctrl()
956 	const struct rtw89_page_regs *regs = chip->page_regs;  in hfc_ch_ctrl()
957 	struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param;  in hfc_ch_ctrl()
958 	const struct rtw89_hfc_ch_cfg *cfg = param->ch_cfg;  in hfc_ch_ctrl()
966 	ret = hfc_ch_cfg_chk(rtwdev, ch);  in hfc_ch_ctrl()
970 	if (ch > RTW89_DMA_B1HI)  in hfc_ch_ctrl()
971 		return -EINVAL;  in hfc_ch_ctrl()
973 	val = u32_encode_bits(cfg[ch].min, B_AX_MIN_PG_MASK) |  in hfc_ch_ctrl()
974 	      u32_encode_bits(cfg[ch].max, B_AX_MAX_PG_MASK) |  in hfc_ch_ctrl()
975 	      (cfg[ch].grp ? B_AX_GRP : 0);  in hfc_ch_ctrl()
976 	rtw89_write32(rtwdev, regs->ach_page_ctrl + ch * 4, val);  in hfc_ch_ctrl()
981 static int hfc_upd_ch_info(struct rtw89_dev *rtwdev, u8 ch)  in hfc_upd_ch_info()  argument
983 	const struct rtw89_chip_info *chip = rtwdev->chip;  in hfc_upd_ch_info()
984 	const struct rtw89_page_regs *regs = chip->page_regs;  in hfc_upd_ch_info()
985 	struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param;  in hfc_upd_ch_info()
986 	struct rtw89_hfc_ch_info *info = param->ch_info;  in hfc_upd_ch_info()
987 	const struct rtw89_hfc_ch_cfg *cfg = param->ch_cfg;  in hfc_upd_ch_info()
995 	if (ch > RTW89_DMA_H2C)  in hfc_upd_ch_info()
996 		return -EINVAL;  in hfc_upd_ch_info()
998 	val = rtw89_read32(rtwdev, regs->ach_page_info + ch * 4);  in hfc_upd_ch_info()
999 	info[ch].aval = u32_get_bits(val, B_AX_AVAL_PG_MASK);  in hfc_upd_ch_info()
1000 	if (ch < RTW89_DMA_H2C)  in hfc_upd_ch_info()
1001 		info[ch].used = u32_get_bits(val, B_AX_USE_PG_MASK);  in hfc_upd_ch_info()
1003 		info[ch].used = cfg[ch].min - info[ch].aval;  in hfc_upd_ch_info()
1010 	const struct rtw89_chip_info *chip = rtwdev->chip;  in hfc_pub_ctrl()
1011 	const struct rtw89_page_regs *regs = chip->page_regs;  in hfc_pub_ctrl()
1012 	const struct rtw89_hfc_pub_cfg *cfg = &rtwdev->mac.hfc_param.pub_cfg;  in hfc_pub_ctrl()
1024 	val = u32_encode_bits(cfg->grp0, B_AX_PUBPG_G0_MASK) |  in hfc_pub_ctrl()
1025 	      u32_encode_bits(cfg->grp1, B_AX_PUBPG_G1_MASK);  in hfc_pub_ctrl()
1026 	rtw89_write32(rtwdev, regs->pub_page_ctrl1, val);  in hfc_pub_ctrl()
1028 	val = u32_encode_bits(cfg->wp_thrd, B_AX_WP_THRD_MASK);  in hfc_pub_ctrl()
1029 	rtw89_write32(rtwdev, regs->wp_page_ctrl2, val);  in hfc_pub_ctrl()
1036 	const struct rtw89_chip_info *chip = rtwdev->chip;  in hfc_get_mix_info_ax()
1037 	const struct rtw89_page_regs *regs = chip->page_regs;  in hfc_get_mix_info_ax()
1038 	struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param;  in hfc_get_mix_info_ax()
1039 	struct rtw89_hfc_pub_cfg *pub_cfg = &param->pub_cfg;  in hfc_get_mix_info_ax()
1040 	struct rtw89_hfc_prec_cfg *prec_cfg = &param->prec_cfg;  in hfc_get_mix_info_ax()
1041 	struct rtw89_hfc_pub_info *info = &param->pub_info;  in hfc_get_mix_info_ax()
1044 	val = rtw89_read32(rtwdev, regs->pub_page_info1);  in hfc_get_mix_info_ax()
1045 	info->g0_used = u32_get_bits(val, B_AX_G0_USE_PG_MASK);  in hfc_get_mix_info_ax()
1046 	info->g1_used = u32_get_bits(val, B_AX_G1_USE_PG_MASK);  in hfc_get_mix_info_ax()
1047 	val = rtw89_read32(rtwdev, regs->pub_page_info3);  in hfc_get_mix_info_ax()
1048 	info->g0_aval = u32_get_bits(val, B_AX_G0_AVAL_PG_MASK);  in hfc_get_mix_info_ax()
1049 	info->g1_aval = u32_get_bits(val, B_AX_G1_AVAL_PG_MASK);  in hfc_get_mix_info_ax()
1050 	info->pub_aval =  in hfc_get_mix_info_ax()
1051 		u32_get_bits(rtw89_read32(rtwdev, regs->pub_page_info2),  in hfc_get_mix_info_ax()
1053 	info->wp_aval =  in hfc_get_mix_info_ax()
1054 		u32_get_bits(rtw89_read32(rtwdev, regs->wp_page_info1),  in hfc_get_mix_info_ax()
1057 	val = rtw89_read32(rtwdev, regs->hci_fc_ctrl);  in hfc_get_mix_info_ax()
1058 	param->en = val & B_AX_HCI_FC_EN ? 1 : 0;  in hfc_get_mix_info_ax()
1059 	param->h2c_en = val & B_AX_HCI_FC_CH12_EN ? 1 : 0;  in hfc_get_mix_info_ax()
1060 	param->mode = u32_get_bits(val, B_AX_HCI_FC_MODE_MASK);  in hfc_get_mix_info_ax()
1061 	prec_cfg->ch011_full_cond =  in hfc_get_mix_info_ax()
1063 	prec_cfg->h2c_full_cond =  in hfc_get_mix_info_ax()
1065 	prec_cfg->wp_ch07_full_cond =  in hfc_get_mix_info_ax()
1067 	prec_cfg->wp_ch811_full_cond =  in hfc_get_mix_info_ax()
1070 	val = rtw89_read32(rtwdev, regs->ch_page_ctrl);  in hfc_get_mix_info_ax()
1071 	prec_cfg->ch011_prec = u32_get_bits(val, B_AX_PREC_PAGE_CH011_MASK);  in hfc_get_mix_info_ax()
1072 	prec_cfg->h2c_prec = u32_get_bits(val, B_AX_PREC_PAGE_CH12_MASK);  in hfc_get_mix_info_ax()
1074 	val = rtw89_read32(rtwdev, regs->pub_page_ctrl2);  in hfc_get_mix_info_ax()
1075 	pub_cfg->pub_max = u32_get_bits(val, B_AX_PUBPG_ALL_MASK);  in hfc_get_mix_info_ax()
1077 	val = rtw89_read32(rtwdev, regs->wp_page_ctrl1);  in hfc_get_mix_info_ax()
1078 	prec_cfg->wp_ch07_prec = u32_get_bits(val, B_AX_PREC_PAGE_WP_CH07_MASK);  in hfc_get_mix_info_ax()
1079 	prec_cfg->wp_ch811_prec = u32_get_bits(val, B_AX_PREC_PAGE_WP_CH811_MASK);  in hfc_get_mix_info_ax()
1081 	val = rtw89_read32(rtwdev, regs->wp_page_ctrl2);  in hfc_get_mix_info_ax()
1082 	pub_cfg->wp_thrd = u32_get_bits(val, B_AX_WP_THRD_MASK);  in hfc_get_mix_info_ax()
1084 	val = rtw89_read32(rtwdev, regs->pub_page_ctrl1);  in hfc_get_mix_info_ax()
1085 	pub_cfg->grp0 = u32_get_bits(val, B_AX_PUBPG_G0_MASK);  in hfc_get_mix_info_ax()
1086 	pub_cfg->grp1 = u32_get_bits(val, B_AX_PUBPG_G1_MASK);  in hfc_get_mix_info_ax()
1091 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in hfc_upd_mix_info()
1092 	struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param;  in hfc_upd_mix_info()
1099 	mac->hfc_get_mix_info(rtwdev);  in hfc_upd_mix_info()
1102 	if (param->en && ret)  in hfc_upd_mix_info()
1110 	const struct rtw89_chip_info *chip = rtwdev->chip;  in hfc_h2c_cfg_ax()
1111 	const struct rtw89_page_regs *regs = chip->page_regs;  in hfc_h2c_cfg_ax()
1112 	struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param;  in hfc_h2c_cfg_ax()
1113 	const struct rtw89_hfc_prec_cfg *prec_cfg = &param->prec_cfg;  in hfc_h2c_cfg_ax()
1116 	val = u32_encode_bits(prec_cfg->h2c_prec, B_AX_PREC_PAGE_CH12_MASK);  in hfc_h2c_cfg_ax()
1117 	rtw89_write32(rtwdev, regs->ch_page_ctrl, val);  in hfc_h2c_cfg_ax()
1119 	rtw89_write32_mask(rtwdev, regs->hci_fc_ctrl,  in hfc_h2c_cfg_ax()
1121 			   prec_cfg->h2c_full_cond);  in hfc_h2c_cfg_ax()
1126 	const struct rtw89_chip_info *chip = rtwdev->chip;  in hfc_mix_cfg_ax()
1127 	const struct rtw89_page_regs *regs = chip->page_regs;  in hfc_mix_cfg_ax()
1128 	struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param;  in hfc_mix_cfg_ax()
1129 	const struct rtw89_hfc_pub_cfg *pub_cfg = &param->pub_cfg;  in hfc_mix_cfg_ax()
1130 	const struct rtw89_hfc_prec_cfg *prec_cfg = &param->prec_cfg;  in hfc_mix_cfg_ax()
1133 	val = u32_encode_bits(prec_cfg->ch011_prec, B_AX_PREC_PAGE_CH011_MASK) |  in hfc_mix_cfg_ax()
1134 	      u32_encode_bits(prec_cfg->h2c_prec, B_AX_PREC_PAGE_CH12_MASK);  in hfc_mix_cfg_ax()
1135 	rtw89_write32(rtwdev, regs->ch_page_ctrl, val);  in hfc_mix_cfg_ax()
1137 	val = u32_encode_bits(pub_cfg->pub_max, B_AX_PUBPG_ALL_MASK);  in hfc_mix_cfg_ax()
1138 	rtw89_write32(rtwdev, regs->pub_page_ctrl2, val);  in hfc_mix_cfg_ax()
1140 	val = u32_encode_bits(prec_cfg->wp_ch07_prec,  in hfc_mix_cfg_ax()
1142 	      u32_encode_bits(prec_cfg->wp_ch811_prec,  in hfc_mix_cfg_ax()
1144 	rtw89_write32(rtwdev, regs->wp_page_ctrl1, val);  in hfc_mix_cfg_ax()
1146 	val = u32_replace_bits(rtw89_read32(rtwdev, regs->hci_fc_ctrl),  in hfc_mix_cfg_ax()
1147 			       param->mode, B_AX_HCI_FC_MODE_MASK);  in hfc_mix_cfg_ax()
1148 	val = u32_replace_bits(val, prec_cfg->ch011_full_cond,  in hfc_mix_cfg_ax()
1150 	val = u32_replace_bits(val, prec_cfg->h2c_full_cond,  in hfc_mix_cfg_ax()
1152 	val = u32_replace_bits(val, prec_cfg->wp_ch07_full_cond,  in hfc_mix_cfg_ax()
1154 	val = u32_replace_bits(val, prec_cfg->wp_ch811_full_cond,  in hfc_mix_cfg_ax()
1156 	rtw89_write32(rtwdev, regs->hci_fc_ctrl, val);  in hfc_mix_cfg_ax()
1161 	const struct rtw89_chip_info *chip = rtwdev->chip;  in hfc_func_en_ax()
1162 	const struct rtw89_page_regs *regs = chip->page_regs;  in hfc_func_en_ax()
1163 	struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param;  in hfc_func_en_ax()
1166 	val = rtw89_read32(rtwdev, regs->hci_fc_ctrl);  in hfc_func_en_ax()
1167 	param->en = en;  in hfc_func_en_ax()
1168 	param->h2c_en = h2c_en;  in hfc_func_en_ax()
1172 	rtw89_write32(rtwdev, regs->hci_fc_ctrl, val);  in hfc_func_en_ax()
1177 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_hfc_init()
1178 	const struct rtw89_chip_info *chip = rtwdev->chip;  in rtw89_mac_hfc_init()
1179 	u32 dma_ch_mask = chip->dma_ch_mask;  in rtw89_mac_hfc_init()
1180 	u8 ch;  in rtw89_mac_hfc_init()  local
1192 	mac->hfc_func_en(rtwdev, false, false);  in rtw89_mac_hfc_init()
1195 		mac->hfc_h2c_cfg(rtwdev);  in rtw89_mac_hfc_init()
1196 		mac->hfc_func_en(rtwdev, en, h2c_en);  in rtw89_mac_hfc_init()
1200 	for (ch = RTW89_DMA_ACH0; ch < RTW89_DMA_H2C; ch++) {  in rtw89_mac_hfc_init()
1201 		if (dma_ch_mask & BIT(ch))  in rtw89_mac_hfc_init()
1203 		ret = hfc_ch_ctrl(rtwdev, ch);  in rtw89_mac_hfc_init()
1212 	mac->hfc_mix_cfg(rtwdev);  in rtw89_mac_hfc_init()
1214 		mac->hfc_func_en(rtwdev, en, h2c_en);  in rtw89_mac_hfc_init()
1217 	for (ch = RTW89_DMA_ACH0; ch < RTW89_DMA_H2C; ch++) {  in rtw89_mac_hfc_init()
1218 		if (dma_ch_mask & BIT(ch))  in rtw89_mac_hfc_init()
1220 		ret = hfc_upd_ch_info(rtwdev, ch);  in rtw89_mac_hfc_init()
1235 	u32 addr = cfg->base == PWR_INTF_MSK_SDIO ?  in pwr_cmd_poll()
1236 		   cfg->addr | SDIO_LOCAL_BASE_ADDR : cfg->addr;  in pwr_cmd_poll()
1238 	ret = read_poll_timeout(rtw89_read8, val, !((val ^ cfg->val) & cfg->msk),  in pwr_cmd_poll()
1245 	rtw89_warn(rtwdev, "[ERR] addr: %X, %X\n", addr, cfg->addr);  in pwr_cmd_poll()
1246 	rtw89_warn(rtwdev, "[ERR] val: %X, %X\n", val, cfg->val);  in pwr_cmd_poll()
1248 	return -EBUSY;  in pwr_cmd_poll()
1258 	for (cur_cfg = cfg; cur_cfg->cmd != PWR_CMD_END; cur_cfg++) {  in rtw89_mac_sub_pwr_seq()
1259 		if (!(cur_cfg->intf_msk & intf_msk) ||  in rtw89_mac_sub_pwr_seq()
1260 		    !(cur_cfg->cv_msk & cv_msk))  in rtw89_mac_sub_pwr_seq()
1263 		switch (cur_cfg->cmd) {  in rtw89_mac_sub_pwr_seq()
1265 			addr = cur_cfg->addr;  in rtw89_mac_sub_pwr_seq()
1267 			if (cur_cfg->base == PWR_BASE_SDIO)  in rtw89_mac_sub_pwr_seq()
1271 			val &= ~(cur_cfg->msk);  in rtw89_mac_sub_pwr_seq()
1272 			val |= (cur_cfg->val & cur_cfg->msk);  in rtw89_mac_sub_pwr_seq()
1278 				return -EBUSY;  in rtw89_mac_sub_pwr_seq()
1281 			if (cur_cfg->val == PWR_DELAY_US)  in rtw89_mac_sub_pwr_seq()
1282 				udelay(cur_cfg->addr);  in rtw89_mac_sub_pwr_seq()
1284 				fsleep(cur_cfg->addr * 1000);  in rtw89_mac_sub_pwr_seq()
1287 			return -EINVAL;  in rtw89_mac_sub_pwr_seq()
1300 		ret = rtw89_mac_sub_pwr_seq(rtwdev, BIT(rtwdev->hal.cv),  in rtw89_mac_pwr_seq()
1303 			return -EBUSY;  in rtw89_mac_pwr_seq()
1314 	switch (rtwdev->ps_mode) {  in rtw89_mac_get_req_pwr_state()
1337 	spin_lock_bh(&rtwdev->rpwm_lock);  in rtw89_mac_send_rpwm()
1346 		rtwdev->mac.rpwm_seq_num = (rtwdev->mac.rpwm_seq_num + 1) &  in rtw89_mac_send_rpwm()
1349 				      rtwdev->mac.rpwm_seq_num);  in rtw89_mac_send_rpwm()
1354 	rtw89_write16(rtwdev, rtwdev->hci.rpwm_addr, request);  in rtw89_mac_send_rpwm()
1356 	spin_unlock_bh(&rtwdev->rpwm_lock);  in rtw89_mac_send_rpwm()
1380 		return -EPERM;  in rtw89_mac_check_cpwm_state()
1385 	rpwm_req_num = rtwdev->mac.rpwm_seq_num;  in rtw89_mac_check_cpwm_state()
1386 	cpwm_rsp_seq = rtw89_read16_mask(rtwdev, rtwdev->hci.cpwm_addr,  in rtw89_mac_check_cpwm_state()
1390 		return -EPERM;  in rtw89_mac_check_cpwm_state()
1392 	rtwdev->mac.cpwm_seq_num = (rtwdev->mac.cpwm_seq_num + 1) &  in rtw89_mac_check_cpwm_state()
1395 	cpwm_seq = rtw89_read16_mask(rtwdev, rtwdev->hci.cpwm_addr, PS_CPWM_SEQ_NUM);  in rtw89_mac_check_cpwm_state()
1396 	if (cpwm_seq != rtwdev->mac.cpwm_seq_num)  in rtw89_mac_check_cpwm_state()
1397 		return -EPERM;  in rtw89_mac_check_cpwm_state()
1399 	cpwm_status = rtw89_read16_mask(rtwdev, rtwdev->hci.cpwm_addr, PS_CPWM_STATE);  in rtw89_mac_check_cpwm_state()
1401 		return -EPERM;  in rtw89_mac_check_cpwm_state()
1426 		if (i == RPWM_TRY_CNT - 1)  in rtw89_mac_power_mode_change()
1447 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_power_switch()
1448 	const struct rtw89_chip_info *chip = rtwdev->chip;  in rtw89_mac_power_switch()
1455 		cfg_seq = chip->pwr_on_seq;  in rtw89_mac_power_switch()
1456 		cfg_func = chip->ops->pwr_on_func;  in rtw89_mac_power_switch()
1458 		cfg_seq = chip->pwr_off_seq;  in rtw89_mac_power_switch()
1459 		cfg_func = chip->ops->pwr_off_func;  in rtw89_mac_power_switch()
1462 	if (test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags))  in rtw89_mac_power_switch()
1468 		return -EBUSY;  in rtw89_mac_power_switch()
1476 		if (!test_bit(RTW89_FLAG_PROBE_DONE, rtwdev->flags))  in rtw89_mac_power_switch()
1477 			mac->efuse_read_fw_secure(rtwdev);  in rtw89_mac_power_switch()
1479 		set_bit(RTW89_FLAG_POWERON, rtwdev->flags);  in rtw89_mac_power_switch()
1480 		set_bit(RTW89_FLAG_DMAC_FUNC, rtwdev->flags);  in rtw89_mac_power_switch()
1481 		set_bit(RTW89_FLAG_CMAC0_FUNC, rtwdev->flags);  in rtw89_mac_power_switch()
1484 		clear_bit(RTW89_FLAG_POWERON, rtwdev->flags);  in rtw89_mac_power_switch()
1485 		clear_bit(RTW89_FLAG_DMAC_FUNC, rtwdev->flags);  in rtw89_mac_power_switch()
1486 		clear_bit(RTW89_FLAG_CMAC0_FUNC, rtwdev->flags);  in rtw89_mac_power_switch()
1487 		clear_bit(RTW89_FLAG_CMAC1_FUNC, rtwdev->flags);  in rtw89_mac_power_switch()
1488 		clear_bit(RTW89_FLAG_FW_RDY, rtwdev->flags);  in rtw89_mac_power_switch()
1566 	enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;  in dmac_func_en_ax()
1600 	enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;  in chip_func_en_ax()
1719 	struct rtw89_mac_info *mac = &rtwdev->mac;  in get_dle_mem_cfg()
1722 	cfg = &rtwdev->chip->dle_mem[mode];  in get_dle_mem_cfg()
1726 	if (cfg->mode != mode) {  in get_dle_mem_cfg()
1731 	mac->dle_info.rsvd_qt = cfg->rsvd_qt;  in get_dle_mem_cfg()
1732 	mac->dle_info.ple_pg_size = cfg->ple_size->pge_size;  in get_dle_mem_cfg()
1733 	mac->dle_info.ple_free_pg = cfg->ple_size->lnk_pge_num;  in get_dle_mem_cfg()
1734 	mac->dle_info.qta_mode = mode;  in get_dle_mem_cfg()
1735 	mac->dle_info.c0_rx_qta = cfg->ple_min_qt->cma0_dma;  in get_dle_mem_cfg()
1736 	mac->dle_info.c1_rx_qta = cfg->ple_min_qt->cma1_dma;  in get_dle_mem_cfg()
1745 	struct rtw89_dle_info *dle_info = &rtwdev->mac.dle_info;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1746 	const struct rtw89_rsvd_quota *rsvd_qt = dle_info->rsvd_qt;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1750 		cfg->pktid = dle_info->ple_free_pg;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1751 		cfg->pg_num = rsvd_qt->mpdu_info_tbl;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1754 		cfg->pktid = dle_info->ple_free_pg + rsvd_qt->mpdu_info_tbl;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1755 		cfg->pg_num = rsvd_qt->b0_csi;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1758 		cfg->pktid = dle_info->ple_free_pg +  in rtw89_mac_get_dle_rsvd_qt_cfg()
1759 			     rsvd_qt->mpdu_info_tbl + rsvd_qt->b0_csi;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1760 		cfg->pg_num = rsvd_qt->b1_csi;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1763 		cfg->pktid = dle_info->ple_free_pg +  in rtw89_mac_get_dle_rsvd_qt_cfg()
1764 			     rsvd_qt->mpdu_info_tbl + rsvd_qt->b0_csi + rsvd_qt->b1_csi;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1765 		cfg->pg_num = rsvd_qt->b0_lmr;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1768 		cfg->pktid = dle_info->ple_free_pg +  in rtw89_mac_get_dle_rsvd_qt_cfg()
1769 			     rsvd_qt->mpdu_info_tbl + rsvd_qt->b0_csi + rsvd_qt->b1_csi +  in rtw89_mac_get_dle_rsvd_qt_cfg()
1770 			     rsvd_qt->b0_lmr;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1771 		cfg->pg_num = rsvd_qt->b1_lmr;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1774 		cfg->pktid = dle_info->ple_free_pg +  in rtw89_mac_get_dle_rsvd_qt_cfg()
1775 			     rsvd_qt->mpdu_info_tbl + rsvd_qt->b0_csi + rsvd_qt->b1_csi +  in rtw89_mac_get_dle_rsvd_qt_cfg()
1776 			     rsvd_qt->b0_lmr + rsvd_qt->b1_lmr;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1777 		cfg->pg_num = rsvd_qt->b0_ftm;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1780 		cfg->pktid = dle_info->ple_free_pg +  in rtw89_mac_get_dle_rsvd_qt_cfg()
1781 			     rsvd_qt->mpdu_info_tbl + rsvd_qt->b0_csi + rsvd_qt->b1_csi +  in rtw89_mac_get_dle_rsvd_qt_cfg()
1782 			     rsvd_qt->b0_lmr + rsvd_qt->b1_lmr + rsvd_qt->b0_ftm;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1783 		cfg->pg_num = rsvd_qt->b1_ftm;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1786 		return -EINVAL;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1789 	cfg->size = (u32)cfg->pg_num * dle_info->ple_pg_size;  in rtw89_mac_get_dle_rsvd_qt_cfg()
1800 	grpnum = rtwdev->chip->wde_qempty_acq_grpnum;  in mac_is_txq_empty_ax()
1819 	qempty.grpsel = rtwdev->chip->wde_qempty_mgq_grpsel;  in mac_is_txq_empty_ax()
1829 	if (rtwdev->dbcc_en) {  in mac_is_txq_empty_ax()
1850 	const struct rtw89_dle_size *wde = cfg->wde_size;  in dle_used_size()
1851 	const struct rtw89_dle_size *ple = cfg->ple_size;  in dle_used_size()
1854 	used = wde->pge_size * (wde->lnk_pge_num + wde->unlnk_pge_num) +  in dle_used_size()
1855 	       ple->pge_size * (ple->lnk_pge_num + ple->unlnk_pge_num);  in dle_used_size()
1857 	if (cfg->rsvd0_size && cfg->rsvd1_size) {  in dle_used_size()
1858 		used += cfg->rsvd0_size->size;  in dle_used_size()
1859 		used += cfg->rsvd1_size->size;  in dle_used_size()
1868 	u32 size = rtwdev->chip->fifo_size;  in dle_expected_used_size()
1871 		size -= rtwdev->chip->dle_scc_rsvd_size;  in dle_expected_used_size()
1891 		if (rtwdev->chip->chip_id == RTL8851B)  in dle_clk_en_ax()
1906 	size_cfg = cfg->wde_size;  in dle_mix_cfg_ax()
1908 	switch (size_cfg->pge_size) {  in dle_mix_cfg_ax()
1920 		return -EINVAL;  in dle_mix_cfg_ax()
1924 	val = u32_replace_bits(val, size_cfg->lnk_pge_num,  in dle_mix_cfg_ax()
1929 	bound = (size_cfg->lnk_pge_num + size_cfg->unlnk_pge_num)  in dle_mix_cfg_ax()
1930 				* size_cfg->pge_size / DLE_BOUND_UNIT;  in dle_mix_cfg_ax()
1931 	size_cfg = cfg->ple_size;  in dle_mix_cfg_ax()
1933 	switch (size_cfg->pge_size) {  in dle_mix_cfg_ax()
1937 		return -EINVAL;  in dle_mix_cfg_ax()
1949 	val = u32_replace_bits(val, size_cfg->lnk_pge_num,  in dle_mix_cfg_ax()
1983 	SET_QUOTA_VAL(min_cfg->_x, max_cfg->_x, _module, _idx)
1991 			  ext_wde_min_qt_wcpu : min_cfg->wcpu;  in wde_quota_cfg_ax()
1995 	SET_QUOTA_VAL(min_qt_wcpu, max_cfg->wcpu, WDE, 1);  in wde_quota_cfg_ax()
2017 	if (rtwdev->chip->chip_id == RTL8852C)  in ple_quota_cfg_ax()
2027 	if (rtwdev->chip->chip_id == RTL8852C)  in rtw89_mac_resize_ple_rx_quota()
2030 	if (rtwdev->mac.qta_mode != RTW89_QTA_SCC) {  in rtw89_mac_resize_ple_rx_quota()
2032 		return -EINVAL;  in rtw89_mac_resize_ple_rx_quota()
2041 		return -EINVAL;  in rtw89_mac_resize_ple_rx_quota()
2044 	min_cfg = cfg->ple_min_qt;  in rtw89_mac_resize_ple_rx_quota()
2045 	max_cfg = cfg->ple_max_qt;  in rtw89_mac_resize_ple_rx_quota()
2055 	const struct rtw89_chip_info *chip = rtwdev->chip;  in rtw89_mac_hw_mgnt_sec()
2058 	if (rtwdev->chip->chip_gen != RTW89_CHIP_AX)  in rtw89_mac_hw_mgnt_sec()
2062 	if (chip->chip_id == RTL8852C)  in rtw89_mac_hw_mgnt_sec()
2075 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in dle_quota_cfg()
2077 	mac->wde_quota_cfg(rtwdev, cfg->wde_min_qt, cfg->wde_max_qt, ext_wde_min_qt_wcpu);  in dle_quota_cfg()
2078 	mac->ple_quota_cfg(rtwdev, cfg->ple_min_qt, cfg->ple_max_qt);  in dle_quota_cfg()
2084 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_dle_init()
2096 		ret = -EINVAL;  in rtw89_mac_dle_init()
2105 			ret = -EINVAL;  in rtw89_mac_dle_init()
2108 		ext_wde_min_qt_wcpu = ext_cfg->wde_min_qt->wcpu;  in rtw89_mac_dle_init()
2113 		ret = -EINVAL;  in rtw89_mac_dle_init()
2117 	mac->dle_func_en(rtwdev, false);  in rtw89_mac_dle_init()
2118 	mac->dle_clk_en(rtwdev, true);  in rtw89_mac_dle_init()
2120 	ret = mac->dle_mix_cfg(rtwdev, cfg);  in rtw89_mac_dle_init()
2127 	mac->dle_func_en(rtwdev, true);  in rtw89_mac_dle_init()
2129 	ret = mac->chk_dle_rdy(rtwdev, true);  in rtw89_mac_dle_init()
2135 	ret = mac->chk_dle_rdy(rtwdev, false);  in rtw89_mac_dle_init()
2143 	mac->dle_func_en(rtwdev, false);  in rtw89_mac_dle_init()
2175 	return rtwdev->hci.type == RTW89_HCI_TYPE_PCIE;  in is_qta_poh()
2181 	const struct rtw89_chip_info *chip = rtwdev->chip;  in rtw89_mac_preload_init()
2183 	if (chip->chip_id == RTL8852A || rtw89_is_rtl885xb(rtwdev) ||  in rtw89_mac_preload_init()
2218 	const struct rtw89_chip_info *chip = rtwdev->chip;  in _patch_ss2f_path()
2220 	if (chip->chip_id == RTL8852A || rtw89_is_rtl885xb(rtwdev))  in _patch_ss2f_path()
2275 	const struct rtw89_chip_info *chip = rtwdev->chip;  in sec_eng_init_ax()
2289 	if (chip->chip_id == RTL8852C)  in sec_eng_init_ax()
2291 	if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B ||  in sec_eng_init_ax()
2292 	    chip->chip_id == RTL8851B)  in sec_eng_init_ax()
2303 	if (chip->chip_id == RTL8852C)  in sec_eng_init_ax()
2314 	ret = rtw89_mac_dle_init(rtwdev, rtwdev->mac.qta_mode, RTW89_QTA_INVALID);  in dmac_init_ax()
2320 	ret = rtw89_mac_preload_init(rtwdev, RTW89_MAC_0, rtwdev->mac.qta_mode);  in dmac_init_ax()
2391 	if (rtwdev->chip->chip_id == RTL8852C)  in scheduler_init_ax()
2407 	if (rtwdev->chip->chip_id == RTL8852C) {  in scheduler_init_ax()
2441 		return -EINVAL;  in rtw89_mac_typ_fltr_opt_ax()
2456 		return -EINVAL;  in rtw89_mac_typ_fltr_opt_ax()
2478 	mac_ftlr = rtwdev->hal.rx_fltr;  in rx_fltr_init_ax()
2502 	switch (rtwdev->chip->chip_id) {  in _patch_dis_resp_chk()
2608 	const struct rtw89_chip_info *chip = rtwdev->chip;  in trxptcl_init_ax()
2609 	const struct rtw89_rrsr_cfgs *rrsr = chip->rrsr_cfgs;  in trxptcl_init_ax()
2622 	switch (rtwdev->chip->chip_id) {  in trxptcl_init_ax()
2642 	reg = rtw89_mac_reg_by_idx(rtwdev, rrsr->ref_rate.addr, mac_idx);  in trxptcl_init_ax()
2643 	rtw89_write32_mask(rtwdev, reg, rrsr->ref_rate.mask, rrsr->ref_rate.data);  in trxptcl_init_ax()
2644 	reg = rtw89_mac_reg_by_idx(rtwdev, rrsr->rsc.addr, mac_idx);  in trxptcl_init_ax()
2645 	rtw89_write32_mask(rtwdev, reg, rrsr->rsc.mask, rrsr->rsc.data);  in trxptcl_init_ax()
2672 	enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;  in rmac_init_ax()
2702 		rx_qta = rtwdev->mac.dle_info.c0_rx_qta;  in rmac_init_ax()
2704 		rx_qta = rtwdev->mac.dle_info.c1_rx_qta;  in rmac_init_ax()
2706 	rx_max_len = rx_qta * rtwdev->mac.dle_info.ple_pg_size;  in rmac_init_ax()
2711 	if (chip_id == RTL8852A && rtwdev->hal.cv == CHIP_CBV) {  in rmac_init_ax()
2727 	enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;  in cmac_com_init_ax()
2760 	return (cfg->ple_min_qt->cma1_dma && cfg->ple_max_qt->cma1_dma);  in rtw89_mac_is_qta_dbcc()
2765 	enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;  in ptcl_init_ax()
2773 	if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) {  in ptcl_init_ax()
2918 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_read_phycap()
2919 	const struct rtw89_chip_info *chip = rtwdev->chip;  in rtw89_mac_read_phycap()
2925 	if (chip->chip_gen == RTW89_CHIP_AX)  in rtw89_mac_read_phycap()
2938 		return -EINVAL;  in rtw89_mac_read_phycap()
2941 	mac->cnv_efuse_state(rtwdev, false);  in rtw89_mac_read_phycap()
2951 	if (c2h_info->id != c2h_type)  in rtw89_mac_read_phycap()
2952 		ret = -EINVAL;  in rtw89_mac_read_phycap()
2955 	mac->cnv_efuse_state(rtwdev, true);  in rtw89_mac_read_phycap()
2962 	const struct rtw89_chip_info *chip = rtwdev->chip;  in rtw89_mac_setup_phycap_part0()
2964 	struct rtw89_efuse *efuse = &rtwdev->efuse;  in rtw89_mac_setup_phycap_part0()
2966 	struct rtw89_hal *hal = &rtwdev->hal;  in rtw89_mac_setup_phycap_part0()
2979 	tx_nss = u32_get_bits(phycap->w1, RTW89_C2HREG_PHYCAP_W1_TX_NSS);  in rtw89_mac_setup_phycap_part0()
2980 	rx_nss = u32_get_bits(phycap->w0, RTW89_C2HREG_PHYCAP_W0_RX_NSS);  in rtw89_mac_setup_phycap_part0()
2981 	tx_ant = u32_get_bits(phycap->w3, RTW89_C2HREG_PHYCAP_W3_ANT_TX_NUM);  in rtw89_mac_setup_phycap_part0()
2982 	rx_ant = u32_get_bits(phycap->w3, RTW89_C2HREG_PHYCAP_W3_ANT_RX_NUM);  in rtw89_mac_setup_phycap_part0()
2984 	hal->tx_nss = tx_nss ? min_t(u8, tx_nss, chip->tx_nss) : chip->tx_nss;  in rtw89_mac_setup_phycap_part0()
2985 	hal->rx_nss = rx_nss ? min_t(u8, rx_nss, chip->rx_nss) : chip->rx_nss;  in rtw89_mac_setup_phycap_part0()
2988 		hal->antenna_tx = RF_B;  in rtw89_mac_setup_phycap_part0()
2990 		hal->antenna_rx = RF_B;  in rtw89_mac_setup_phycap_part0()
2993 		hal->antenna_tx = RF_B;  in rtw89_mac_setup_phycap_part0()
2994 		hal->tx_path_diversity = true;  in rtw89_mac_setup_phycap_part0()
2997 	if (chip->rf_path_num == 1) {  in rtw89_mac_setup_phycap_part0()
2998 		hal->antenna_tx = RF_A;  in rtw89_mac_setup_phycap_part0()
2999 		hal->antenna_rx = RF_A;  in rtw89_mac_setup_phycap_part0()
3000 		if ((efuse->rfe_type % 3) == 2)  in rtw89_mac_setup_phycap_part0()
3001 			hal->ant_diversity = true;  in rtw89_mac_setup_phycap_part0()
3006 		    hal->tx_nss, tx_nss, chip->tx_nss,  in rtw89_mac_setup_phycap_part0()
3007 		    hal->rx_nss, rx_nss, chip->rx_nss);  in rtw89_mac_setup_phycap_part0()
3010 		    tx_ant, hal->antenna_tx, rx_ant, hal->antenna_rx);  in rtw89_mac_setup_phycap_part0()
3011 	rtw89_debug(rtwdev, RTW89_DBG_FW, "TX path diversity=%d\n", hal->tx_path_diversity);  in rtw89_mac_setup_phycap_part0()
3012 	rtw89_debug(rtwdev, RTW89_DBG_FW, "Antenna diversity=%d\n", hal->ant_diversity);  in rtw89_mac_setup_phycap_part0()
3019 	const struct rtw89_chip_variant *variant = rtwdev->variant;  in rtw89_mac_setup_phycap_part1()
3022 	struct rtw89_hal *hal = &rtwdev->hal;  in rtw89_mac_setup_phycap_part1()
3032 	qam_raw = u32_get_bits(phycap->w2, RTW89_C2HREG_PHYCAP_P1_W2_QAM);  in rtw89_mac_setup_phycap_part1()
3045 	if ((variant && variant->no_mcs_12_13) ||  in rtw89_mac_setup_phycap_part1()
3047 		hal->no_mcs_12_13 = true;  in rtw89_mac_setup_phycap_part1()
3050 		    qam_raw, qam, hal->no_mcs_12_13);  in rtw89_mac_setup_phycap_part1()
3057 	const struct rtw89_chip_info *chip = rtwdev->chip;  in rtw89_mac_setup_phycap()
3064 	if (chip->chip_gen == RTW89_CHIP_AX ||  in rtw89_mac_setup_phycap()
3065 	    RTW89_CHK_FW_FEATURE(NO_PHYCAP_P1, &rtwdev->fw))  in rtw89_mac_setup_phycap()
3080 	h2c_info.content_len = sizeof(*sch_tx_en) - RTW89_H2CREG_HDR_LEN;  in rtw89_hw_sch_tx_en_h2c()
3082 	u32p_replace_bits(&sch_tx_en->w0, tx_en_u16, RTW89_H2CREG_SCH_TX_EN_W0_EN);  in rtw89_hw_sch_tx_en_h2c()
3083 	u32p_replace_bits(&sch_tx_en->w1, mask_u16, RTW89_H2CREG_SCH_TX_EN_W1_MASK);  in rtw89_hw_sch_tx_en_h2c()
3084 	u32p_replace_bits(&sch_tx_en->w1, band, RTW89_H2CREG_SCH_TX_EN_W1_BAND);  in rtw89_hw_sch_tx_en_h2c()
3091 		return -EINVAL;  in rtw89_hw_sch_tx_en_h2c()
3107 	if (test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags))  in rtw89_set_hw_sch_tx_en()
3262 		return -ENOENT;  in dle_buf_req_ax()
3273 	cmd_type = ctrl_para->cmd_type;  in set_cpuio_ax()
3277 	val = u32_replace_bits(val, ctrl_para->start_pktid,  in set_cpuio_ax()
3279 	val = u32_replace_bits(val, ctrl_para->end_pktid,  in set_cpuio_ax()
3285 	val = u32_replace_bits(val, ctrl_para->src_pid,  in set_cpuio_ax()
3287 	val = u32_replace_bits(val, ctrl_para->src_qid,  in set_cpuio_ax()
3289 	val = u32_replace_bits(val, ctrl_para->dst_pid,  in set_cpuio_ax()
3291 	val = u32_replace_bits(val, ctrl_para->dst_qid,  in set_cpuio_ax()
3299 	val = u32_replace_bits(val, ctrl_para->macid,  in set_cpuio_ax()
3301 	val = u32_replace_bits(val, ctrl_para->pkt_num,  in set_cpuio_ax()
3315 		ctrl_para->pktid = FIELD_GET(B_AX_WD_CPUQ_OP_PKTID_MASK, val);  in set_cpuio_ax()
3323 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_dle_quota_change()
3329 		return -EINVAL;  in rtw89_mac_dle_quota_change()
3334 		return -EINVAL;  in rtw89_mac_dle_quota_change()
3339 	return mac->dle_quota_change(rtwdev, band1_en);  in rtw89_mac_dle_quota_change()
3344 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in dle_quota_change_ax()
3349 	ret = mac->dle_buf_req(rtwdev, 0x20, true, &pkt_id);  in dle_quota_change_ax()
3361 	ret = mac->set_cpuio(rtwdev, &ctrl_para, true);  in dle_quota_change_ax()
3364 		return -EFAULT;  in dle_quota_change_ax()
3367 	ret = mac->dle_buf_req(rtwdev, 0x20, false, &pkt_id);  in dle_quota_change_ax()
3379 	ret = mac->set_cpuio(rtwdev, &ctrl_para, false);  in dle_quota_change_ax()
3382 		return -EFAULT;  in dle_quota_change_ax()
3437 	ret = rtw89_mac_dle_quota_change(rtwdev, rtwdev->mac.qta_mode, true);  in band1_enable_ax()
3456 		rtw89_err(rtwdev, "[ERR]CMAC1 func en %d\n", ret);  in band1_enable_ax()
3474 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;  in rtw89_wdrls_imr_enable()
3477 	rtw89_write32_set(rtwdev, R_AX_WDRLS_ERR_IMR, imr->wdrls_imr_set);  in rtw89_wdrls_imr_enable()
3482 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;  in rtw89_wsec_imr_enable()
3484 	rtw89_write32_set(rtwdev, imr->wsec_imr_reg, imr->wsec_imr_set);  in rtw89_wsec_imr_enable()
3489 	enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;  in rtw89_mpdu_trx_imr_enable()
3490 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;  in rtw89_mpdu_trx_imr_enable()
3505 			  imr->mpdu_tx_imr_set);  in rtw89_mpdu_trx_imr_enable()
3512 			  imr->mpdu_rx_imr_set);  in rtw89_mpdu_trx_imr_enable()
3517 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;  in rtw89_sta_sch_imr_enable()
3524 			  imr->sta_sch_imr_set);  in rtw89_sta_sch_imr_enable()
3529 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;  in rtw89_txpktctl_imr_enable()
3531 	rtw89_write32_clr(rtwdev, imr->txpktctl_imr_b0_reg,  in rtw89_txpktctl_imr_enable()
3532 			  imr->txpktctl_imr_b0_clr);  in rtw89_txpktctl_imr_enable()
3533 	rtw89_write32_set(rtwdev, imr->txpktctl_imr_b0_reg,  in rtw89_txpktctl_imr_enable()
3534 			  imr->txpktctl_imr_b0_set);  in rtw89_txpktctl_imr_enable()
3535 	rtw89_write32_clr(rtwdev, imr->txpktctl_imr_b1_reg,  in rtw89_txpktctl_imr_enable()
3536 			  imr->txpktctl_imr_b1_clr);  in rtw89_txpktctl_imr_enable()
3537 	rtw89_write32_set(rtwdev, imr->txpktctl_imr_b1_reg,  in rtw89_txpktctl_imr_enable()
3538 			  imr->txpktctl_imr_b1_set);  in rtw89_txpktctl_imr_enable()
3543 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;  in rtw89_wde_imr_enable()
3545 	rtw89_write32_clr(rtwdev, R_AX_WDE_ERR_IMR, imr->wde_imr_clr);  in rtw89_wde_imr_enable()
3546 	rtw89_write32_set(rtwdev, R_AX_WDE_ERR_IMR, imr->wde_imr_set);  in rtw89_wde_imr_enable()
3551 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;  in rtw89_ple_imr_enable()
3553 	rtw89_write32_clr(rtwdev, R_AX_PLE_ERR_IMR, imr->ple_imr_clr);  in rtw89_ple_imr_enable()
3554 	rtw89_write32_set(rtwdev, R_AX_PLE_ERR_IMR, imr->ple_imr_set);  in rtw89_ple_imr_enable()
3565 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;  in rtw89_dispatcher_imr_enable()
3568 			  imr->host_disp_imr_clr);  in rtw89_dispatcher_imr_enable()
3570 			  imr->host_disp_imr_set);  in rtw89_dispatcher_imr_enable()
3572 			  imr->cpu_disp_imr_clr);  in rtw89_dispatcher_imr_enable()
3574 			  imr->cpu_disp_imr_set);  in rtw89_dispatcher_imr_enable()
3576 			  imr->other_disp_imr_clr);  in rtw89_dispatcher_imr_enable()
3578 			  imr->other_disp_imr_set);  in rtw89_dispatcher_imr_enable()
3589 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;  in rtw89_bbrpt_imr_enable()
3591 	rtw89_write32_set(rtwdev, imr->bbrpt_com_err_imr_reg,  in rtw89_bbrpt_imr_enable()
3593 	rtw89_write32_clr(rtwdev, imr->bbrpt_chinfo_err_imr_reg,  in rtw89_bbrpt_imr_enable()
3595 	rtw89_write32_set(rtwdev, imr->bbrpt_chinfo_err_imr_reg,  in rtw89_bbrpt_imr_enable()
3596 			  imr->bbrpt_err_imr_set);  in rtw89_bbrpt_imr_enable()
3597 	rtw89_write32_set(rtwdev, imr->bbrpt_dfs_err_imr_reg,  in rtw89_bbrpt_imr_enable()
3614 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;  in rtw89_ptcl_imr_enable()
3618 	rtw89_write32_clr(rtwdev, reg, imr->ptcl_imr_clr);  in rtw89_ptcl_imr_enable()
3619 	rtw89_write32_set(rtwdev, reg, imr->ptcl_imr_set);  in rtw89_ptcl_imr_enable()
3624 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;  in rtw89_cdma_imr_enable()
3625 	enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;  in rtw89_cdma_imr_enable()
3628 	reg = rtw89_mac_reg_by_idx(rtwdev, imr->cdma_imr_0_reg, mac_idx);  in rtw89_cdma_imr_enable()
3629 	rtw89_write32_clr(rtwdev, reg, imr->cdma_imr_0_clr);  in rtw89_cdma_imr_enable()
3630 	rtw89_write32_set(rtwdev, reg, imr->cdma_imr_0_set);  in rtw89_cdma_imr_enable()
3633 		reg = rtw89_mac_reg_by_idx(rtwdev, imr->cdma_imr_1_reg, mac_idx);  in rtw89_cdma_imr_enable()
3634 		rtw89_write32_clr(rtwdev, reg, imr->cdma_imr_1_clr);  in rtw89_cdma_imr_enable()
3635 		rtw89_write32_set(rtwdev, reg, imr->cdma_imr_1_set);  in rtw89_cdma_imr_enable()
3641 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;  in rtw89_phy_intf_imr_enable()
3644 	reg = rtw89_mac_reg_by_idx(rtwdev, imr->phy_intf_imr_reg, mac_idx);  in rtw89_phy_intf_imr_enable()
3645 	rtw89_write32_clr(rtwdev, reg, imr->phy_intf_imr_clr);  in rtw89_phy_intf_imr_enable()
3646 	rtw89_write32_set(rtwdev, reg, imr->phy_intf_imr_set);  in rtw89_phy_intf_imr_enable()
3651 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;  in rtw89_rmac_imr_enable()
3654 	reg = rtw89_mac_reg_by_idx(rtwdev, imr->rmac_imr_reg, mac_idx);  in rtw89_rmac_imr_enable()
3655 	rtw89_write32_clr(rtwdev, reg, imr->rmac_imr_clr);  in rtw89_rmac_imr_enable()
3656 	rtw89_write32_set(rtwdev, reg, imr->rmac_imr_set);  in rtw89_rmac_imr_enable()
3661 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;  in rtw89_tmac_imr_enable()
3664 	reg = rtw89_mac_reg_by_idx(rtwdev, imr->tmac_imr_reg, mac_idx);  in rtw89_tmac_imr_enable()
3665 	rtw89_write32_clr(rtwdev, reg, imr->tmac_imr_clr);  in rtw89_tmac_imr_enable()
3666 	rtw89_write32_set(rtwdev, reg, imr->tmac_imr_set);  in rtw89_tmac_imr_enable()
3701 		return -EINVAL;  in enable_imr_ax()
3713 	if (!rtw89_is_rtl885xb(rtwdev) && rtwdev->mac.dle_info.c1_rx_qta)  in err_imr_ctrl_ax()
3736 		return -EINVAL;  in dbcc_enable_ax()
3744 	if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) {  in set_host_rpr_ax()
3764 	enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;  in trx_init_ax()
3765 	enum rtw89_qta_mode qta_mode = rtwdev->mac.qta_mode;  in trx_init_ax()
3820 	const struct rtw89_chip_info *chip = rtwdev->chip;  in rtw89_mac_feat_init()
3823 	if (chip->bacam_ver != RTW89_BACAM_V1)  in rtw89_mac_feat_init()
3858 	clear_bit(RTW89_FLAG_FW_RDY, rtwdev->flags);  in rtw89_mac_disable_cpu_ax()
3878 		return -EFAULT;  in rtw89_mac_enable_cpu_ax()
3920 	enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;  in rtw89_mac_hci_func_en_ax()
3934 	enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;  in rtw89_mac_dmac_func_pre_en_ax()
3963 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_dmac_pre_init()
3966 	mac->hci_func_en(rtwdev);  in rtw89_mac_dmac_pre_init()
3967 	mac->dmac_func_pre_en(rtwdev);  in rtw89_mac_dmac_pre_init()
3969 	ret = rtw89_mac_dle_init(rtwdev, RTW89_QTA_DLFW, rtwdev->mac.qta_mode);  in rtw89_mac_dmac_pre_init()
4018 		if (rtwdev->dbcc_en)  in rtw89_mac_partial_init()
4026 	if (rtwdev->hci.ops->mac_pre_init) {  in rtw89_mac_partial_init()
4027 		ret = rtwdev->hci.ops->mac_pre_init(rtwdev);  in rtw89_mac_partial_init()
4041 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_init()
4042 	const struct rtw89_chip_info *chip = rtwdev->chip;  in rtw89_mac_init()
4043 	bool include_bb = !!chip->bbmcu_nr;  in rtw89_mac_init()
4058 	ret = mac->sys_init(rtwdev);  in rtw89_mac_init()
4062 	ret = mac->trx_init(rtwdev);  in rtw89_mac_init()
4070 	if (rtwdev->hci.ops->mac_post_init) {  in rtw89_mac_init()
4071 		ret = rtwdev->hci.ops->mac_post_init(rtwdev);  in rtw89_mac_init()
4088 	struct rtw89_fw_secure *sec = &rtwdev->fw.sec;  in rtw89_mac_dmac_tbl_init()
4091 	if (rtwdev->chip->chip_gen != RTW89_CHIP_AX || sec->secure_boot)  in rtw89_mac_dmac_tbl_init()
4103 	struct rtw89_fw_secure *sec = &rtwdev->fw.sec;  in rtw89_mac_cmac_tbl_init()
4105 	if (rtwdev->chip->chip_gen != RTW89_CHIP_AX || sec->secure_boot)  in rtw89_mac_cmac_tbl_init()
4127 	 * be power-off, so ignore this operation.  in rtw89_mac_set_macid_pause()
4129 	if (test_bit(RTW89_FLAG_CHANGING_INTERFACE, rtwdev->flags) &&  in rtw89_mac_set_macid_pause()
4130 	    !test_bit(RTW89_FLAG_POWERON, rtwdev->flags))  in rtw89_mac_set_macid_pause()
4174 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_check_packet_ctrl()
4175 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_check_packet_ctrl()
4176 	u8 mask = B_AX_PTCL_DBG_INFO_MASK_BY_PORT(rtwvif_link->port);  in rtw89_mac_check_packet_ctrl()
4181 	reg_info = rtw89_mac_reg_by_idx(rtwdev, p->ptcl_dbg_info, rtwvif_link->mac_idx);  in rtw89_mac_check_packet_ctrl()
4182 	reg_ctrl = rtw89_mac_reg_by_idx(rtwdev, p->ptcl_dbg, rtwvif_link->mac_idx);  in rtw89_mac_check_packet_ctrl()
4197 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_bcn_drop()
4198 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_bcn_drop()
4200 	rtw89_write32_set(rtwdev, p->bcn_drop_all, BIT(rtwvif_link->port));  in rtw89_mac_bcn_drop()
4201 	rtw89_write32_port_mask(rtwdev, rtwvif_link, p->tbtt_prohib, B_AX_TBTT_SETUP_MASK,  in rtw89_mac_bcn_drop()
4203 	rtw89_write32_port_mask(rtwdev, rtwvif_link, p->bcn_area, B_AX_BCN_MSK_AREA_MASK,  in rtw89_mac_bcn_drop()
4205 	rtw89_write32_port_mask(rtwdev, rtwvif_link, p->tbtt_prohib, B_AX_TBTT_HOLD_MASK,  in rtw89_mac_bcn_drop()
4207 	rtw89_write32_port_mask(rtwdev, rtwvif_link, p->bcn_early, B_AX_BCNERLY_MASK, 2);  in rtw89_mac_bcn_drop()
4208 	rtw89_write16_port_mask(rtwdev, rtwvif_link, p->tbtt_early,  in rtw89_mac_bcn_drop()
4210 	rtw89_write32_port_mask(rtwdev, rtwvif_link, p->bcn_space,  in rtw89_mac_bcn_drop()
4212 	rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, B_AX_BCNTX_EN);  in rtw89_mac_bcn_drop()
4215 	if (rtwvif_link->port == RTW89_PORT_0)  in rtw89_mac_bcn_drop()
4218 	rtw89_write32_clr(rtwdev, p->bcn_drop_all, BIT(rtwvif_link->port));  in rtw89_mac_bcn_drop()
4219 	rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, B_AX_TBTT_PROHIB_EN);  in rtw89_mac_bcn_drop()
4235 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_func_sw()
4236 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_func_sw()
4237 	const struct rtw89_chip_info *chip = rtwdev->chip;  in rtw89_mac_port_cfg_func_sw()
4243 	if (!rtw89_read32_port_mask(rtwdev, rtwvif_link, p->port_cfg, B_AX_PORT_FUNC_EN))  in rtw89_mac_port_cfg_func_sw()
4246 	if (chip->chip_id == RTL8852A && rtwvif_link->port != RTW89_PORT_0) {  in rtw89_mac_port_cfg_func_sw()
4248 		backup_val = rtw89_read32_port(rtwdev, rtwvif_link, p->tbtt_prohib);  in rtw89_mac_port_cfg_func_sw()
4251 	if (rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE)  in rtw89_mac_port_cfg_func_sw()
4254 	if (chip->chip_id == RTL8852A) {  in rtw89_mac_port_cfg_func_sw()
4255 		rtw89_write32_port_clr(rtwdev, rtwvif_link, p->tbtt_prohib,  in rtw89_mac_port_cfg_func_sw()
4257 		rtw89_write32_port_mask(rtwdev, rtwvif_link, p->tbtt_prohib,  in rtw89_mac_port_cfg_func_sw()
4259 		rtw89_write16_port_clr(rtwdev, rtwvif_link, p->tbtt_early,  in rtw89_mac_port_cfg_func_sw()
4261 		rtw89_write16_port_clr(rtwdev, rtwvif_link, p->bcn_early,  in rtw89_mac_port_cfg_func_sw()
4268 	beacon_int = bss_conf->beacon_int;  in rtw89_mac_port_cfg_func_sw()
4273 	rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, B_AX_PORT_FUNC_EN |  in rtw89_mac_port_cfg_func_sw()
4275 	rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, B_AX_TSFTR_RST);  in rtw89_mac_port_cfg_func_sw()
4276 	rtw89_write32_port(rtwdev, rtwvif_link, p->bcn_cnt_tmr, 0);  in rtw89_mac_port_cfg_func_sw()
4279 		rtw89_write32_port(rtwdev, rtwvif_link, p->tbtt_prohib, backup_val);  in rtw89_mac_port_cfg_func_sw()
4285 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_tx_rpt()
4286 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_tx_rpt()
4289 		rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg,  in rtw89_mac_port_cfg_tx_rpt()
4292 		rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg,  in rtw89_mac_port_cfg_tx_rpt()
4299 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_rx_rpt()
4300 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_rx_rpt()
4303 		rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg,  in rtw89_mac_port_cfg_rx_rpt()
4306 		rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg,  in rtw89_mac_port_cfg_rx_rpt()
4313 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_net_type()
4314 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_net_type()
4316 	rtw89_write32_port_mask(rtwdev, rtwvif_link, p->port_cfg, B_AX_NET_TYPE_MASK,  in rtw89_mac_port_cfg_net_type()
4317 				rtwvif_link->net_type);  in rtw89_mac_port_cfg_net_type()
4323 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_bcn_prct()
4324 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_bcn_prct()
4325 	bool en = rtwvif_link->net_type != RTW89_NET_TYPE_NO_LINK;  in rtw89_mac_port_cfg_bcn_prct()
4329 		rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, bits);  in rtw89_mac_port_cfg_bcn_prct()
4331 		rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, bits);  in rtw89_mac_port_cfg_bcn_prct()
4337 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_rx_sw()
4338 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_rx_sw()
4339 	bool en = rtwvif_link->net_type == RTW89_NET_TYPE_INFRA ||  in rtw89_mac_port_cfg_rx_sw()
4340 		  rtwvif_link->net_type == RTW89_NET_TYPE_AD_HOC;  in rtw89_mac_port_cfg_rx_sw()
4344 		rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, bit);  in rtw89_mac_port_cfg_rx_sw()
4346 		rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, bit);  in rtw89_mac_port_cfg_rx_sw()
4352 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_rx_sync()
4353 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_rx_sync()
4356 		rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, B_AX_TSF_UDT_EN);  in rtw89_mac_port_cfg_rx_sync()
4358 		rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, B_AX_TSF_UDT_EN);  in rtw89_mac_port_cfg_rx_sync()
4364 	bool en = rtwvif_link->net_type == RTW89_NET_TYPE_INFRA ||  in rtw89_mac_port_cfg_rx_sync_by_nettype()
4365 		  rtwvif_link->net_type == RTW89_NET_TYPE_AD_HOC;  in rtw89_mac_port_cfg_rx_sync_by_nettype()
4373 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_tx_sw()
4374 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_tx_sw()
4377 		rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, B_AX_BCNTX_EN);  in rtw89_mac_port_cfg_tx_sw()
4379 		rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, B_AX_BCNTX_EN);  in rtw89_mac_port_cfg_tx_sw()
4385 	bool en = rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE ||  in rtw89_mac_port_cfg_tx_sw_by_nettype()
4386 		  rtwvif_link->net_type == RTW89_NET_TYPE_AD_HOC;  in rtw89_mac_port_cfg_tx_sw_by_nettype()
4399 			if (rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE)  in rtw89_mac_enable_beacon_for_ap_vifs()
4406 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_bcn_intv()
4407 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_bcn_intv()
4414 	if (bss_conf->beacon_int)  in rtw89_mac_port_cfg_bcn_intv()
4415 		bcn_int = bss_conf->beacon_int;  in rtw89_mac_port_cfg_bcn_intv()
4421 	rtw89_write32_port_mask(rtwdev, rtwvif_link, p->bcn_space, B_AX_BCN_SPACE_MASK,  in rtw89_mac_port_cfg_bcn_intv()
4428 	u8 win = rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE ? 16 : 0;  in rtw89_mac_port_cfg_hiq_win()
4429 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_hiq_win()
4430 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_hiq_win()
4431 	u8 port = rtwvif_link->port;  in rtw89_mac_port_cfg_hiq_win()
4434 	reg = rtw89_mac_reg_by_idx(rtwdev, p->hiq_win[port], rtwvif_link->mac_idx);  in rtw89_mac_port_cfg_hiq_win()
4441 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_hiq_dtim()
4442 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_hiq_dtim()
4450 	dtim_period = bss_conf->dtim_period;  in rtw89_mac_port_cfg_hiq_dtim()
4454 	addr = rtw89_mac_reg_by_idx(rtwdev, p->md_tsft, rtwvif_link->mac_idx);  in rtw89_mac_port_cfg_hiq_dtim()
4457 	rtw89_write16_port_mask(rtwdev, rtwvif_link, p->dtim_ctrl, B_AX_DTIM_NUM_MASK,  in rtw89_mac_port_cfg_hiq_dtim()
4464 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_bcn_setup_time()
4465 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_bcn_setup_time()
4467 	rtw89_write32_port_mask(rtwdev, rtwvif_link, p->tbtt_prohib,  in rtw89_mac_port_cfg_bcn_setup_time()
4474 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_bcn_hold_time()
4475 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_bcn_hold_time()
4477 	rtw89_write32_port_mask(rtwdev, rtwvif_link, p->tbtt_prohib,  in rtw89_mac_port_cfg_bcn_hold_time()
4484 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_bcn_mask_area()
4485 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_bcn_mask_area()
4487 	rtw89_write32_port_mask(rtwdev, rtwvif_link, p->bcn_area,  in rtw89_mac_port_cfg_bcn_mask_area()
4494 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_tbtt_early()
4495 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_tbtt_early()
4497 	rtw89_write16_port_mask(rtwdev, rtwvif_link, p->tbtt_early,  in rtw89_mac_port_cfg_tbtt_early()
4504 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_bss_color()
4505 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_bss_color()
4512 	u8 port = rtwvif_link->port;  in rtw89_mac_port_cfg_bss_color()
4520 	bss_color = bss_conf->he_bss_color.color;  in rtw89_mac_port_cfg_bss_color()
4524 	reg_base = port >= 4 ? p->bss_color + 4 : p->bss_color;  in rtw89_mac_port_cfg_bss_color()
4525 	reg = rtw89_mac_reg_by_idx(rtwdev, reg_base, rtwvif_link->mac_idx);  in rtw89_mac_port_cfg_bss_color()
4532 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_mbssid()
4533 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_mbssid()
4534 	u8 port = rtwvif_link->port;  in rtw89_mac_port_cfg_mbssid()
4537 	if (rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE)  in rtw89_mac_port_cfg_mbssid()
4541 		reg = rtw89_mac_reg_by_idx(rtwdev, p->mbssid, rtwvif_link->mac_idx);  in rtw89_mac_port_cfg_mbssid()
4549 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_hiq_drop()
4550 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_hiq_drop()
4551 	u8 port = rtwvif_link->port;  in rtw89_mac_port_cfg_hiq_drop()
4555 	reg = rtw89_mac_reg_by_idx(rtwdev, p->mbssid_drop, rtwvif_link->mac_idx);  in rtw89_mac_port_cfg_hiq_drop()
4566 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_func_en()
4567 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_func_en()
4570 		rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg,  in rtw89_mac_port_cfg_func_en()
4573 		rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg,  in rtw89_mac_port_cfg_func_en()
4580 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_bcn_early()
4581 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_bcn_early()
4583 	rtw89_write32_port_mask(rtwdev, rtwvif_link, p->bcn_early, B_AX_BCNERLY_MASK,  in rtw89_mac_port_cfg_bcn_early()
4590 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_cfg_tbtt_shift()
4591 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_cfg_tbtt_shift()
4594 	if (rtwdev->chip->chip_id != RTL8852C)  in rtw89_mac_port_cfg_tbtt_shift()
4597 	if (rtwvif_link->wifi_role != RTW89_WIFI_ROLE_P2P_CLIENT &&  in rtw89_mac_port_cfg_tbtt_shift()
4598 	    rtwvif_link->wifi_role != RTW89_WIFI_ROLE_STATION)  in rtw89_mac_port_cfg_tbtt_shift()
4604 	rtw89_write16_port_mask(rtwdev, rtwvif_link, p->tbtt_shift,  in rtw89_mac_port_cfg_tbtt_shift()
4613 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_tsf_sync()
4614 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_tsf_sync()
4618 	reg = rtw89_mac_reg_by_idx(rtwdev, p->tsf_sync + rtwvif_link->port * 4,  in rtw89_mac_port_tsf_sync()
4619 				   rtwvif_link->mac_idx);  in rtw89_mac_port_tsf_sync()
4621 	rtw89_write32_mask(rtwdev, reg, B_AX_SYNC_PORT_SRC, rtwvif_src->port);  in rtw89_mac_port_tsf_sync()
4631 	if (rtwvif_link->net_type != RTW89_NET_TYPE_AP_MODE || rtwvif_link == rtwvif_src)  in rtw89_mac_port_tsf_sync_rand()
4635 	offset = offset - offset / 4 + get_random_u32() % (offset / 2);  in rtw89_mac_port_tsf_sync_rand()
4652 			if (!src || tmp->net_type == RTW89_NET_TYPE_INFRA)  in rtw89_mac_port_tsf_resync_all()
4654 			if (tmp->net_type == RTW89_NET_TYPE_AP_MODE)  in rtw89_mac_port_tsf_resync_all()
4678 	rtw89_mac_dmac_tbl_init(rtwdev, rtwvif_link->mac_id);  in rtw89_mac_vif_init()
4679 	rtw89_mac_cmac_tbl_init(rtwdev, rtwvif_link->mac_id);  in rtw89_mac_vif_init()
4681 	ret = rtw89_mac_set_macid_pause(rtwdev, rtwvif_link->mac_id, false);  in rtw89_mac_vif_init()
4731 	u8 port = rtwvif_link->port;  in rtw89_mac_port_update()
4734 		return -EINVAL;  in rtw89_mac_port_update()
4766 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_port_get_tsf()
4767 	const struct rtw89_port_reg *p = mac->port_base;  in rtw89_mac_port_get_tsf()
4771 	ret = rtw89_mac_check_mac_en(rtwdev, rtwvif_link->mac_idx, RTW89_CMAC_SEL);  in rtw89_mac_port_get_tsf()
4775 	tsf_low = rtw89_read32_port(rtwdev, rtwvif_link, p->tsftr_l);  in rtw89_mac_port_get_tsf()
4776 	tsf_high = rtw89_read32_port(rtwdev, rtwvif_link, p->tsftr_h);  in rtw89_mac_port_get_tsf()
4791 	ies = rcu_dereference(bss->ies);  in rtw89_mac_check_he_obss_narrow_bw_ru_iter()
4792 	elem = cfg80211_find_elem(WLAN_EID_EXT_CAPABILITY, ies->data,  in rtw89_mac_check_he_obss_narrow_bw_ru_iter()
4793 				  ies->len);  in rtw89_mac_check_he_obss_narrow_bw_ru_iter()
4795 	if (!elem || elem->datalen < 10 ||  in rtw89_mac_check_he_obss_narrow_bw_ru_iter()
4796 	    !(elem->data[10] & WLAN_EXT_CAPA10_OBSS_NARROW_BW_RU_TOLERANCE_SUPPORT))  in rtw89_mac_check_he_obss_narrow_bw_ru_iter()
4805 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_set_he_obss_narrow_bw_ru()
4806 	struct ieee80211_hw *hw = rtwdev->hw;  in rtw89_mac_set_he_obss_narrow_bw_ru()
4815 	if (!bss_conf->he_support || vif->type != NL80211_IFTYPE_STATION) {  in rtw89_mac_set_he_obss_narrow_bw_ru()
4820 	oper = bss_conf->chanreq.oper;  in rtw89_mac_set_he_obss_narrow_bw_ru()
4821 	if (!(oper.chan->flags & IEEE80211_CHAN_RADAR)) {  in rtw89_mac_set_he_obss_narrow_bw_ru()
4828 	cfg80211_bss_iter(hw->wiphy, &oper,  in rtw89_mac_set_he_obss_narrow_bw_ru()
4832 	reg = rtw89_mac_reg_by_idx(rtwdev, mac->narrow_bw_ru_dis.addr,  in rtw89_mac_set_he_obss_narrow_bw_ru()
4833 				   rtwvif_link->mac_idx);  in rtw89_mac_set_he_obss_narrow_bw_ru()
4835 		rtw89_write32_clr(rtwdev, reg, mac->narrow_bw_ru_dis.mask);  in rtw89_mac_set_he_obss_narrow_bw_ru()
4837 		rtw89_write32_set(rtwdev, reg, mac->narrow_bw_ru_dis.mask);  in rtw89_mac_set_he_obss_narrow_bw_ru()
4847 	if (rtwdev->chip->chip_gen != RTW89_CHIP_BE)  in rtw89_mac_set_he_tb()
4853 	set = bss_conf->he_support && !bss_conf->eht_support;  in rtw89_mac_set_he_tb()
4858 				   rtwvif_link->mac_idx);  in rtw89_mac_set_he_tb()
4888 	const struct rtw89_chan *op = &rtwdev->scan_info.op_chan;  in rtw89_is_op_chan()
4890 	return band == op->band_type && channel == op->primary_channel;  in rtw89_is_op_chan()
4898 		(const struct rtw89_c2h_scanofld *)skb->data;  in rtw89_mac_c2h_scanofld_rsp()
4899 	struct rtw89_vif_link *rtwvif_link = rtwdev->scan_info.scanning_vif;  in rtw89_mac_c2h_scanofld_rsp()
4902 	u32 last_chan = rtwdev->scan_info.last_chan_idx, report_tsf;  in rtw89_mac_c2h_scanofld_rsp()
4913 	rtwvif = rtwvif_link->rtwvif;  in rtw89_mac_c2h_scanofld_rsp()
4915 	if (RTW89_CHK_FW_FEATURE(CH_INFO_BE_V0, &rtwdev->fw))  in rtw89_mac_c2h_scanofld_rsp()
4918 	tx_fail = le32_get_bits(c2h->w5, RTW89_C2H_SCANOFLD_W5_TX_FAIL);  in rtw89_mac_c2h_scanofld_rsp()
4919 	status = le32_get_bits(c2h->w2, RTW89_C2H_SCANOFLD_W2_STATUS);  in rtw89_mac_c2h_scanofld_rsp()
4920 	chan = le32_get_bits(c2h->w2, RTW89_C2H_SCANOFLD_W2_PRI_CH);  in rtw89_mac_c2h_scanofld_rsp()
4921 	reason = le32_get_bits(c2h->w2, RTW89_C2H_SCANOFLD_W2_RSN);  in rtw89_mac_c2h_scanofld_rsp()
4922 	band = le32_get_bits(c2h->w5, RTW89_C2H_SCANOFLD_W5_BAND);  in rtw89_mac_c2h_scanofld_rsp()
4923 	actual_period = le32_get_bits(c2h->w2, RTW89_C2H_SCANOFLD_W2_PERIOD);  in rtw89_mac_c2h_scanofld_rsp()
4924 	mac_idx = le32_get_bits(c2h->w5, RTW89_C2H_SCANOFLD_W5_MAC_IDX);  in rtw89_mac_c2h_scanofld_rsp()
4927 	if (!(rtwdev->chip->support_bands & BIT(NL80211_BAND_6GHZ)))  in rtw89_mac_c2h_scanofld_rsp()
4930 	if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) {  in rtw89_mac_c2h_scanofld_rsp()
4931 		sw_def = le32_get_bits(c2h->w6, RTW89_C2H_SCANOFLD_W6_SW_DEF);  in rtw89_mac_c2h_scanofld_rsp()
4932 		fw_def = le32_get_bits(c2h->w6, RTW89_C2H_SCANOFLD_W6_FW_DEF);  in rtw89_mac_c2h_scanofld_rsp()
4933 		report_tsf = le32_get_bits(c2h->w7, RTW89_C2H_SCANOFLD_W7_REPORT_TSF);  in rtw89_mac_c2h_scanofld_rsp()
4936 				le32_get_bits(c2h->w6, RTW89_C2H_SCANOFLD_W6_EXPECT_PERIOD);  in rtw89_mac_c2h_scanofld_rsp()
4938 			actual_period = le32_get_bits(c2h->w8, RTW89_C2H_SCANOFLD_W8_PERIOD_V1);  in rtw89_mac_c2h_scanofld_rsp()
4940 				le32_get_bits(c2h->w8, RTW89_C2H_SCANOFLD_W8_EXPECT_PERIOD_V1);  in rtw89_mac_c2h_scanofld_rsp()
4957 			ieee80211_stop_queues(rtwdev->hw);  in rtw89_mac_c2h_scanofld_rsp()
4961 		if (rtwdev->scan_info.abort)  in rtw89_mac_c2h_scanofld_rsp()
4964 		if (rtwvif_link && rtwvif->scan_req &&  in rtw89_mac_c2h_scanofld_rsp()
4965 		    last_chan < rtwvif->scan_req->n_channels) {  in rtw89_mac_c2h_scanofld_rsp()
4978 			rtw89_assign_entity_chan(rtwdev, rtwvif_link->chanctx_idx,  in rtw89_mac_c2h_scanofld_rsp()
4979 						 &rtwdev->scan_info.op_chan);  in rtw89_mac_c2h_scanofld_rsp()
4981 			ieee80211_wake_queues(rtwdev->hw);  in rtw89_mac_c2h_scanofld_rsp()
4985 			rtw89_assign_entity_chan(rtwdev, rtwvif_link->chanctx_idx,  in rtw89_mac_c2h_scanofld_rsp()
4999 	struct rtw89_vif *rtwvif = rtwvif_link->rtwvif;  in rtw89_mac_bcn_fltr_rpt()
5002 		(const struct rtw89_c2h_mac_bcnfltr_rpt *)skb->data;  in rtw89_mac_bcn_fltr_rpt()
5006 	type = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_TYPE);  in rtw89_mac_bcn_fltr_rpt()
5007 	sig = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_MA) - MAX_RSSI;  in rtw89_mac_bcn_fltr_rpt()
5008 	event = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_EVENT);  in rtw89_mac_bcn_fltr_rpt()
5009 	mac_id = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_MACID);  in rtw89_mac_bcn_fltr_rpt()
5011 	if (mac_id != rtwvif_link->mac_id)  in rtw89_mac_bcn_fltr_rpt()
5020 		if (!rtwdev->scanning && !rtwvif->offchan)  in rtw89_mac_bcn_fltr_rpt()
5062 		    "C2H rev ack recv, cat: %d, class: %d, func: %d, seq : %d\n",  in rtw89_mac_c2h_rec_ack()
5063 		    RTW89_GET_MAC_C2H_REV_ACK_CAT(c2h->data),  in rtw89_mac_c2h_rec_ack()
5064 		    RTW89_GET_MAC_C2H_REV_ACK_CLASS(c2h->data),  in rtw89_mac_c2h_rec_ack()
5065 		    RTW89_GET_MAC_C2H_REV_ACK_FUNC(c2h->data),  in rtw89_mac_c2h_rec_ack()
5066 		    RTW89_GET_MAC_C2H_REV_ACK_H2C_SEQ(c2h->data));  in rtw89_mac_c2h_rec_ack()
5073 	struct rtw89_wait_info *fw_ofld_wait = &rtwdev->mac.fw_ofld_wait;  in rtw89_mac_c2h_done_ack()
5074 	struct rtw89_wait_info *ps_wait = &rtwdev->mac.ps_wait;  in rtw89_mac_c2h_done_ack()
5076 		(const struct rtw89_c2h_done_ack *)skb_c2h->data;  in rtw89_mac_c2h_done_ack()
5077 	u8 h2c_cat = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_CAT);  in rtw89_mac_c2h_done_ack()
5078 	u8 h2c_class = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_CLASS);  in rtw89_mac_c2h_done_ack()
5079 	u8 h2c_func = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_FUNC);  in rtw89_mac_c2h_done_ack()
5080 	u8 h2c_return = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_H2C_RETURN);  in rtw89_mac_c2h_done_ack()
5081 	u8 h2c_seq = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_H2C_SEQ);  in rtw89_mac_c2h_done_ack()
5086 		    "C2H done ack recv, cat: %d, class: %d, func: %d, ret: %d, seq : %d\n",  in rtw89_mac_c2h_done_ack()
5131 	rtw89_fw_log_dump(rtwdev, c2h->data, len);  in rtw89_mac_c2h_log()
5143 	struct rtw89_wait_info *wait = &rtwdev->mac.fw_ofld_wait;  in rtw89_mac_c2h_pkt_ofld_rsp()
5145 		(const struct rtw89_c2h_pkt_ofld_rsp *)skb_c2h->data;  in rtw89_mac_c2h_pkt_ofld_rsp()
5146 	u16 pkt_len = le32_get_bits(c2h->w2, RTW89_C2H_PKT_OFLD_RSP_W2_PTK_LEN);  in rtw89_mac_c2h_pkt_ofld_rsp()
5147 	u8 pkt_id = le32_get_bits(c2h->w2, RTW89_C2H_PKT_OFLD_RSP_W2_PTK_ID);  in rtw89_mac_c2h_pkt_ofld_rsp()
5148 	u8 pkt_op = le32_get_bits(c2h->w2, RTW89_C2H_PKT_OFLD_RSP_W2_PTK_OP);  in rtw89_mac_c2h_pkt_ofld_rsp()
5165 		(struct rtw89_c2h_tx_duty_rpt *)skb_c2h->data;  in rtw89_mac_c2h_tx_duty_rpt()
5168 	err = le32_get_bits(c2h->w2, RTW89_C2H_TX_DUTY_RPT_W2_TIMER_ERR);  in rtw89_mac_c2h_tx_duty_rpt()
5183 	u8 group = RTW89_GET_MAC_C2H_MCC_RCV_ACK_GROUP(c2h->data);  in rtw89_mac_c2h_mcc_rcv_ack()
5184 	u8 func = RTW89_GET_MAC_C2H_MCC_RCV_ACK_H2C_FUNC(c2h->data);  in rtw89_mac_c2h_mcc_rcv_ack()  local
5186 	switch (func) {  in rtw89_mac_c2h_mcc_rcv_ack()
5199 			    "invalid MCC C2H RCV ACK: func %d\n", func);  in rtw89_mac_c2h_mcc_rcv_ack()
5204 		    "MCC C2H RCV ACK: group %d, func %d\n", group, func);  in rtw89_mac_c2h_mcc_rcv_ack()
5210 	u8 group = RTW89_GET_MAC_C2H_MCC_REQ_ACK_GROUP(c2h->data);  in rtw89_mac_c2h_mcc_req_ack()
5211 	u8 func = RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_FUNC(c2h->data);  in rtw89_mac_c2h_mcc_req_ack()  local
5212 	u8 retcode = RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_RETURN(c2h->data);  in rtw89_mac_c2h_mcc_req_ack()
5217 	switch (func) {  in rtw89_mac_c2h_mcc_req_ack()
5232 			    "invalid MCC C2H REQ ACK: func %d\n", func);  in rtw89_mac_c2h_mcc_req_ack()
5237 		    "MCC C2H REQ ACK: group %d, func %d, return code %d\n",  in rtw89_mac_c2h_mcc_req_ack()
5238 		    group, func, retcode);  in rtw89_mac_c2h_mcc_req_ack()
5244 	cond = RTW89_MCC_WAIT_COND(group, func);  in rtw89_mac_c2h_mcc_req_ack()
5245 	rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data);  in rtw89_mac_c2h_mcc_req_ack()
5251 	u8 group = RTW89_GET_MAC_C2H_MCC_TSF_RPT_GROUP(c2h->data);  in rtw89_mac_c2h_mcc_tsf_rpt()
5257 	rpt->macid_x = RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_X(c2h->data);  in rtw89_mac_c2h_mcc_tsf_rpt()
5258 	rpt->macid_y = RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_Y(c2h->data);  in rtw89_mac_c2h_mcc_tsf_rpt()
5259 	rpt->tsf_x_low = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_X(c2h->data);  in rtw89_mac_c2h_mcc_tsf_rpt()
5260 	rpt->tsf_x_high = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_X(c2h->data);  in rtw89_mac_c2h_mcc_tsf_rpt()
5261 	rpt->tsf_y_low = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_Y(c2h->data);  in rtw89_mac_c2h_mcc_tsf_rpt()
5262 	rpt->tsf_y_high = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_Y(c2h->data);  in rtw89_mac_c2h_mcc_tsf_rpt()
5266 		    rpt->macid_x, (u64)rpt->tsf_x_high << 32 | rpt->tsf_x_low,  in rtw89_mac_c2h_mcc_tsf_rpt()
5267 		    rpt->macid_y, (u64)rpt->tsf_y_high << 32 | rpt->tsf_y_low);  in rtw89_mac_c2h_mcc_tsf_rpt()
5270 	rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data);  in rtw89_mac_c2h_mcc_tsf_rpt()
5276 	u8 group = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_GROUP(c2h->data);  in rtw89_mac_c2h_mcc_status_rpt()
5277 	u8 macid = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_MACID(c2h->data);  in rtw89_mac_c2h_mcc_status_rpt()
5278 	u8 status = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_STATUS(c2h->data);  in rtw89_mac_c2h_mcc_status_rpt()
5279 	u32 tsf_low = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_LOW(c2h->data);  in rtw89_mac_c2h_mcc_status_rpt()
5280 	u32 tsf_high = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_HIGH(c2h->data);  in rtw89_mac_c2h_mcc_status_rpt()
5285 	u8 func;  in rtw89_mac_c2h_mcc_status_rpt()  local
5290 		func = H2C_FUNC_ADD_MCC;  in rtw89_mac_c2h_mcc_status_rpt()
5295 		func = H2C_FUNC_START_MCC;  in rtw89_mac_c2h_mcc_status_rpt()
5300 		func = H2C_FUNC_STOP_MCC;  in rtw89_mac_c2h_mcc_status_rpt()
5305 		func = H2C_FUNC_DEL_MCC_GROUP;  in rtw89_mac_c2h_mcc_status_rpt()
5310 		func = H2C_FUNC_RESET_MCC_GROUP;  in rtw89_mac_c2h_mcc_status_rpt()
5339 	cond = RTW89_MCC_WAIT_COND(group, func);  in rtw89_mac_c2h_mcc_status_rpt()
5340 	rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data);  in rtw89_mac_c2h_mcc_status_rpt()
5346 	struct rtw89_wait_info *wait = &rtwdev->mcc.wait;  in rtw89_mac_c2h_mrc_tsf_rpt()
5352 	c2h_rpt = (const struct rtw89_c2h_mrc_tsf_rpt *)c2h->data;  in rtw89_mac_c2h_mrc_tsf_rpt()
5354 	rpt->num = min_t(u8, RTW89_MAC_MRC_MAX_REQ_TSF_NUM,  in rtw89_mac_c2h_mrc_tsf_rpt()
5355 			 le32_get_bits(c2h_rpt->w2,  in rtw89_mac_c2h_mrc_tsf_rpt()
5358 	for (i = 0; i < rpt->num; i++) {  in rtw89_mac_c2h_mrc_tsf_rpt()
5359 		u32 tsf_high = le32_to_cpu(c2h_rpt->infos[i].tsf_high);  in rtw89_mac_c2h_mrc_tsf_rpt()
5360 		u32 tsf_low = le32_to_cpu(c2h_rpt->infos[i].tsf_low);  in rtw89_mac_c2h_mrc_tsf_rpt()
5362 		rpt->tsfs[i] = (u64)tsf_high << 32 | tsf_low;  in rtw89_mac_c2h_mrc_tsf_rpt()
5366 			    i, rpt->tsfs[i]);  in rtw89_mac_c2h_mrc_tsf_rpt()
5375 	struct rtw89_wow_param *rtw_wow = &rtwdev->wow;  in rtw89_mac_c2h_wow_aoac_rpt()
5376 	struct rtw89_wow_aoac_report *aoac_rpt = &rtw_wow->aoac_rpt;  in rtw89_mac_c2h_wow_aoac_rpt()
5377 	struct rtw89_wait_info *wait = &rtw_wow->wait;  in rtw89_mac_c2h_wow_aoac_rpt()
5379 		(const struct rtw89_c2h_wow_aoac_report *)skb->data;  in rtw89_mac_c2h_wow_aoac_rpt()
5382 	aoac_rpt->rpt_ver = c2h->rpt_ver;  in rtw89_mac_c2h_wow_aoac_rpt()
5383 	aoac_rpt->sec_type = c2h->sec_type;  in rtw89_mac_c2h_wow_aoac_rpt()
5384 	aoac_rpt->key_idx = c2h->key_idx;  in rtw89_mac_c2h_wow_aoac_rpt()
5385 	aoac_rpt->pattern_idx = c2h->pattern_idx;  in rtw89_mac_c2h_wow_aoac_rpt()
5386 	aoac_rpt->rekey_ok = u8_get_bits(c2h->rekey_ok,  in rtw89_mac_c2h_wow_aoac_rpt()
5388 	memcpy(aoac_rpt->ptk_tx_iv, c2h->ptk_tx_iv, sizeof(aoac_rpt->ptk_tx_iv));  in rtw89_mac_c2h_wow_aoac_rpt()
5389 	memcpy(aoac_rpt->eapol_key_replay_count, c2h->eapol_key_replay_count,  in rtw89_mac_c2h_wow_aoac_rpt()
5390 	       sizeof(aoac_rpt->eapol_key_replay_count));  in rtw89_mac_c2h_wow_aoac_rpt()
5391 	memcpy(aoac_rpt->gtk, c2h->gtk, sizeof(aoac_rpt->gtk));  in rtw89_mac_c2h_wow_aoac_rpt()
5392 	memcpy(aoac_rpt->ptk_rx_iv, c2h->ptk_rx_iv, sizeof(aoac_rpt->ptk_rx_iv));  in rtw89_mac_c2h_wow_aoac_rpt()
5393 	memcpy(aoac_rpt->gtk_rx_iv, c2h->gtk_rx_iv, sizeof(aoac_rpt->gtk_rx_iv));  in rtw89_mac_c2h_wow_aoac_rpt()
5394 	aoac_rpt->igtk_key_id = le64_to_cpu(c2h->igtk_key_id);  in rtw89_mac_c2h_wow_aoac_rpt()
5395 	aoac_rpt->igtk_ipn = le64_to_cpu(c2h->igtk_ipn);  in rtw89_mac_c2h_wow_aoac_rpt()
5396 	memcpy(aoac_rpt->igtk, c2h->igtk, sizeof(aoac_rpt->igtk));  in rtw89_mac_c2h_wow_aoac_rpt()
5404 	struct rtw89_wait_info *wait = &rtwdev->mcc.wait;  in rtw89_mac_c2h_mrc_status_rpt()
5413 	u8 func;  in rtw89_mac_c2h_mrc_status_rpt()  local
5415 	c2h_rpt = (const struct rtw89_c2h_mrc_status_rpt *)c2h->data;  in rtw89_mac_c2h_mrc_status_rpt()
5416 	sch_idx = le32_get_bits(c2h_rpt->w2, RTW89_C2H_MRC_STATUS_RPT_W2_SCH_IDX);  in rtw89_mac_c2h_mrc_status_rpt()
5417 	status = le32_get_bits(c2h_rpt->w2, RTW89_C2H_MRC_STATUS_RPT_W2_STATUS);  in rtw89_mac_c2h_mrc_status_rpt()
5418 	tsf_high = le32_to_cpu(c2h_rpt->tsf_high);  in rtw89_mac_c2h_mrc_status_rpt()
5419 	tsf_low = le32_to_cpu(c2h_rpt->tsf_low);  in rtw89_mac_c2h_mrc_status_rpt()
5423 		func = H2C_FUNC_START_MRC;  in rtw89_mac_c2h_mrc_status_rpt()
5427 		func = H2C_FUNC_DEL_MRC;  in rtw89_mac_c2h_mrc_status_rpt()
5431 		func = H2C_FUNC_DEL_MRC;  in rtw89_mac_c2h_mrc_status_rpt()
5463 			    "MRC C2H STS RPT: switch ch fail\n");  in rtw89_mac_c2h_mrc_status_rpt()
5467 			    "MRC C2H STS RPT: tx null-0 fail\n");  in rtw89_mac_c2h_mrc_status_rpt()
5471 			    "MRC C2H STS RPT: port func en fail\n");  in rtw89_mac_c2h_mrc_status_rpt()
5486 	cond = RTW89_MRC_WAIT_COND(sch_idx, func);  in rtw89_mac_c2h_mrc_status_rpt()
5500 	c2h = (const struct rtw89_c2h_pwr_int_notify *)skb->data;  in rtw89_mac_c2h_pwr_int_notify()
5501 	macid = le32_get_bits(c2h->w2, RTW89_C2H_PWR_INT_NOTIFY_W2_MACID);  in rtw89_mac_c2h_pwr_int_notify()
5502 	ps = le32_get_bits(c2h->w2, RTW89_C2H_PWR_INT_NOTIFY_W2_PWR_STATUS);  in rtw89_mac_c2h_pwr_int_notify()
5510 	rtwsta = rtwsta_link->rtwsta;  in rtw89_mac_c2h_pwr_int_notify()
5512 		set_bit(RTW89_REMOTE_STA_IN_PS, rtwsta->flags);  in rtw89_mac_c2h_pwr_int_notify()
5514 		clear_bit(RTW89_REMOTE_STA_IN_PS, rtwsta->flags);  in rtw89_mac_c2h_pwr_int_notify()
5578 		(const struct rtw89_c2h_scanofld *)skb->data;  in rtw89_mac_c2h_scanofld_rsp_atomic()
5579 	struct rtw89_wait_info *fw_ofld_wait = &rtwdev->mac.fw_ofld_wait;  in rtw89_mac_c2h_scanofld_rsp_atomic()
5584 	status = le32_get_bits(c2h->w2, RTW89_C2H_SCANOFLD_W2_STATUS);  in rtw89_mac_c2h_scanofld_rsp_atomic()
5585 	reason = le32_get_bits(c2h->w2, RTW89_C2H_SCANOFLD_W2_RSN);  in rtw89_mac_c2h_scanofld_rsp_atomic()
5589 		if (rtwdev->chip->chip_gen == RTW89_CHIP_BE)  in rtw89_mac_c2h_scanofld_rsp_atomic()
5599 			      u8 class, u8 func)  in rtw89_mac_c2h_chk_atomic()  argument
5605 		switch (func) {  in rtw89_mac_c2h_chk_atomic()
5613 		switch (func) {  in rtw89_mac_c2h_chk_atomic()
5629 		switch (func) {  in rtw89_mac_c2h_chk_atomic()
5639 			  u32 len, u8 class, u8 func)  in rtw89_mac_c2h_handle()  argument
5646 		if (func < RTW89_MAC_C2H_FUNC_INFO_MAX)  in rtw89_mac_c2h_handle()
5647 			handler = rtw89_mac_c2h_info_handler[func];  in rtw89_mac_c2h_handle()
5650 		if (func < RTW89_MAC_C2H_FUNC_OFLD_MAX)  in rtw89_mac_c2h_handle()
5651 			handler = rtw89_mac_c2h_ofld_handler[func];  in rtw89_mac_c2h_handle()
5654 		if (func < NUM_OF_RTW89_MAC_C2H_FUNC_MCC)  in rtw89_mac_c2h_handle()
5655 			handler = rtw89_mac_c2h_mcc_handler[func];  in rtw89_mac_c2h_handle()
5658 		if (func < NUM_OF_RTW89_MAC_C2H_FUNC_MRC)  in rtw89_mac_c2h_handle()
5659 			handler = rtw89_mac_c2h_mrc_handler[func];  in rtw89_mac_c2h_handle()
5662 		if (func < NUM_OF_RTW89_MAC_C2H_FUNC_WOW)  in rtw89_mac_c2h_handle()
5663 			handler = rtw89_mac_c2h_wow_handler[func];  in rtw89_mac_c2h_handle()
5666 		if (func < NUM_OF_RTW89_MAC_C2H_FUNC_AP)  in rtw89_mac_c2h_handle()
5667 			handler = rtw89_mac_c2h_ap_handler[func];  in rtw89_mac_c2h_handle()
5676 		rtw89_info(rtwdev, "MAC c2h class %d func %d not support\n", class,  in rtw89_mac_c2h_handle()
5677 			   func);  in rtw89_mac_c2h_handle()
5688 	enum rtw89_qta_mode mode = rtwdev->mac.qta_mode;  in rtw89_mac_get_txpwr_cr_ax()
5749 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in __rtw89_mac_update_rts_threshold()
5750 	struct ieee80211_hw *hw = rtwdev->hw;  in __rtw89_mac_update_rts_threshold()
5751 	u32 rts_threshold = hw->wiphy->rts_threshold;  in __rtw89_mac_update_rts_threshold()
5755 	if (rts_threshold == (u32)-1) {  in __rtw89_mac_update_rts_threshold()
5766 	reg = rtw89_mac_reg_by_idx(rtwdev, mac->agg_len_ht, mac_idx);  in __rtw89_mac_update_rts_threshold()
5774 	if (rtwdev->dbcc_en)  in rtw89_mac_update_rts_threshold()
5783 	if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags))  in rtw89_mac_flush_txq()
5788 	if (ret && !drop && (rtwdev->total_sta_assoc || rtwdev->scanning))  in rtw89_mac_flush_txq()
5794 	enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;  in rtw89_mac_coex_init()
5825 	switch (coex->pta_mode) {  in rtw89_mac_coex_init()
5859 		return -EINVAL;  in rtw89_mac_coex_init()
5862 	switch (coex->direction) {  in rtw89_mac_coex_init()
5879 		return -EINVAL;  in rtw89_mac_coex_init()
5895 	switch (coex->pta_mode) {  in rtw89_mac_coex_init_v1()
5907 		return -EINVAL;  in rtw89_mac_coex_init_v1()
5919 	if (gnt_cfg->band[0].gnt_bt)  in rtw89_mac_cfg_gnt()
5922 	if (gnt_cfg->band[0].gnt_bt_sw_en)  in rtw89_mac_cfg_gnt()
5925 	if (gnt_cfg->band[0].gnt_wl)  in rtw89_mac_cfg_gnt()
5928 	if (gnt_cfg->band[0].gnt_wl_sw_en)  in rtw89_mac_cfg_gnt()
5931 	if (gnt_cfg->band[1].gnt_bt)  in rtw89_mac_cfg_gnt()
5934 	if (gnt_cfg->band[1].gnt_bt_sw_en)  in rtw89_mac_cfg_gnt()
5937 	if (gnt_cfg->band[1].gnt_wl)  in rtw89_mac_cfg_gnt()
5940 	if (gnt_cfg->band[1].gnt_wl_sw_en)  in rtw89_mac_cfg_gnt()
5958 	if (gnt_cfg->band[0].gnt_bt)  in rtw89_mac_cfg_gnt_v1()
5964 	if (gnt_cfg->band[0].gnt_bt_sw_en)  in rtw89_mac_cfg_gnt_v1()
5968 	if (gnt_cfg->band[0].gnt_wl)  in rtw89_mac_cfg_gnt_v1()
5972 	if (gnt_cfg->band[0].gnt_wl_sw_en)  in rtw89_mac_cfg_gnt_v1()
5976 	if (gnt_cfg->band[1].gnt_bt)  in rtw89_mac_cfg_gnt_v1()
5982 	if (gnt_cfg->band[1].gnt_bt_sw_en)  in rtw89_mac_cfg_gnt_v1()
5986 	if (gnt_cfg->band[1].gnt_wl)  in rtw89_mac_cfg_gnt_v1()
5990 	if (gnt_cfg->band[1].gnt_wl_sw_en)  in rtw89_mac_cfg_gnt_v1()
6007 	ret = rtw89_mac_check_mac_en(rtwdev, plt->band, RTW89_CMAC_SEL);  in rtw89_mac_cfg_plt_ax()
6011 	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BT_PLT, plt->band);  in rtw89_mac_cfg_plt_ax()
6012 	val = (plt->tx & RTW89_MAC_AX_PLT_LTE_RX ? B_AX_TX_PLT_GNT_LTE_RX : 0) |  in rtw89_mac_cfg_plt_ax()
6013 	      (plt->tx & RTW89_MAC_AX_PLT_GNT_BT_TX ? B_AX_TX_PLT_GNT_BT_TX : 0) |  in rtw89_mac_cfg_plt_ax()
6014 	      (plt->tx & RTW89_MAC_AX_PLT_GNT_BT_RX ? B_AX_TX_PLT_GNT_BT_RX : 0) |  in rtw89_mac_cfg_plt_ax()
6015 	      (plt->tx & RTW89_MAC_AX_PLT_GNT_WL ? B_AX_TX_PLT_GNT_WL : 0) |  in rtw89_mac_cfg_plt_ax()
6016 	      (plt->rx & RTW89_MAC_AX_PLT_LTE_RX ? B_AX_RX_PLT_GNT_LTE_RX : 0) |  in rtw89_mac_cfg_plt_ax()
6017 	      (plt->rx & RTW89_MAC_AX_PLT_GNT_BT_TX ? B_AX_RX_PLT_GNT_BT_TX : 0) |  in rtw89_mac_cfg_plt_ax()
6018 	      (plt->rx & RTW89_MAC_AX_PLT_GNT_BT_RX ? B_AX_RX_PLT_GNT_BT_RX : 0) |  in rtw89_mac_cfg_plt_ax()
6019 	      (plt->rx & RTW89_MAC_AX_PLT_GNT_WL ? B_AX_RX_PLT_GNT_WL : 0) |  in rtw89_mac_cfg_plt_ax()
6033 	if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags))  in rtw89_mac_cfg_sb()
6063 	struct rtw89_btc *btc = &rtwdev->btc;  in rtw89_mac_cfg_ctrl_path_v1()
6064 	struct rtw89_btc_dm *dm = &btc->dm;  in rtw89_mac_cfg_ctrl_path_v1()
6065 	struct rtw89_mac_ax_gnt *g = dm->gnt.band;  in rtw89_mac_cfg_ctrl_path_v1()
6078 	return rtw89_mac_cfg_gnt_v1(rtwdev, &dm->gnt);  in rtw89_mac_cfg_ctrl_path_v1()
6084 	const struct rtw89_chip_info *chip = rtwdev->chip;  in rtw89_mac_get_ctrl_path()
6087 	if (chip->chip_id == RTL8852C || chip->chip_id == RTL8922A)  in rtw89_mac_get_ctrl_path()
6089 	else if (chip->chip_id == RTL8852A || rtw89_is_rtl885xb(rtwdev))  in rtw89_mac_get_ctrl_path()
6113 	if (rtwdev->chip->chip_gen != RTW89_CHIP_AX)  in rtw89_mac_bfee_standby_timer()
6119 		set_bit(RTW89_FLAG_BFEE_TIMER_KEEP, rtwdev->flags);  in rtw89_mac_bfee_standby_timer()
6123 		clear_bit(RTW89_FLAG_BFEE_TIMER_KEEP, rtwdev->flags);  in rtw89_mac_bfee_standby_timer()
6131 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_bfee_ctrl()
6133 	u32 mask = mac->bfee_ctrl.mask;  in rtw89_mac_bfee_ctrl()
6136 	reg = rtw89_mac_reg_by_idx(rtwdev, mac->bfee_ctrl.addr, mac_idx);  in rtw89_mac_bfee_ctrl()
6138 		set_bit(RTW89_FLAG_BFEE_EN, rtwdev->flags);  in rtw89_mac_bfee_ctrl()
6141 		clear_bit(RTW89_FLAG_BFEE_EN, rtwdev->flags);  in rtw89_mac_bfee_ctrl()
6194 	u8 mac_idx = rtwvif_link->mac_idx;  in rtw89_mac_set_csi_para_reg_ax()
6195 	u8 port_sel = rtwvif_link->port;  in rtw89_mac_set_csi_para_reg_ax()
6209 	phy_cap = link_sta->he_cap.he_cap_elem.phy_cap_info;  in rtw89_mac_set_csi_para_reg_ax()
6219 	if ((link_sta->vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE) ||  in rtw89_mac_set_csi_para_reg_ax()
6220 	    (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE)) {  in rtw89_mac_set_csi_para_reg_ax()
6221 		ldpc_en &= !!(link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC);  in rtw89_mac_set_csi_para_reg_ax()
6222 		stbc_en &= !!(link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK);  in rtw89_mac_set_csi_para_reg_ax()
6224 			      link_sta->vht_cap.cap);  in rtw89_mac_set_csi_para_reg_ax()
6259 	u8 mac_idx = rtwvif_link->mac_idx;  in rtw89_mac_csi_rrsc_ax()
6271 	if (link_sta->he_cap.has_he) {  in rtw89_mac_csi_rrsc_ax()
6276 	if (link_sta->vht_cap.vht_supported) {  in rtw89_mac_csi_rrsc_ax()
6281 	if (link_sta->ht_cap.ht_supported) {  in rtw89_mac_csi_rrsc_ax()
6316 		rtw89_mac_init_bfee_ax(rtwdev, rtwvif_link->mac_idx);  in rtw89_mac_bf_assoc_ax()
6326 	rtw89_mac_bfee_ctrl(rtwdev, rtwvif_link->mac_idx, false);  in rtw89_mac_bf_disassoc()
6337 	rtwvif_link = rtwvif->links[conf->link_id];  in rtw89_mac_bf_set_gid_table()
6341 			  __func__, conf->link_id);  in rtw89_mac_bf_set_gid_table()
6345 	mac_idx = rtwvif_link->mac_idx;  in rtw89_mac_bf_set_gid_table()
6349 	p = (__le32 *)conf->mu_group.membership;  in rtw89_mac_bf_set_gid_table()
6357 	p = (__le32 *)conf->mu_group.position;  in rtw89_mac_bf_set_gid_table()
6379 	struct rtw89_sta_link *down_rtwsta_link = iter_data->down_rtwsta_link;  in rtw89_mac_bf_monitor_calc_iter()
6384 	int *count = &iter_data->count;  in rtw89_mac_bf_monitor_calc_iter()
6415 	ieee80211_iterate_stations_atomic(rtwdev->hw,  in rtw89_mac_bf_monitor_calc()
6421 		set_bit(RTW89_FLAG_BFEE_MON, rtwdev->flags);  in rtw89_mac_bf_monitor_calc()
6423 		clear_bit(RTW89_FLAG_BFEE_MON, rtwdev->flags);  in rtw89_mac_bf_monitor_calc()
6428 	struct rtw89_traffic_stats *stats = &rtwdev->stats;  in _rtw89_mac_bf_monitor_track()
6430 	bool en = stats->tx_tfc_lv <= stats->rx_tfc_lv;  in _rtw89_mac_bf_monitor_track()
6431 	bool old = test_bit(RTW89_FLAG_BFEE_EN, rtwdev->flags);  in _rtw89_mac_bf_monitor_track()
6437 	old_keep_timer = test_bit(RTW89_FLAG_BFEE_TIMER_KEEP, rtwdev->flags);  in _rtw89_mac_bf_monitor_track()
6439 	if (stats->tx_tfc_lv <= RTW89_TFC_LOW && stats->rx_tfc_lv <= RTW89_TFC_LOW)  in _rtw89_mac_bf_monitor_track()
6445 				rtw89_mac_bfee_standby_timer(rtwdev, rtwvif_link->mac_idx,  in _rtw89_mac_bf_monitor_track()
6454 			rtw89_mac_bfee_ctrl(rtwdev, rtwvif_link->mac_idx, en);  in _rtw89_mac_bf_monitor_track()
6462 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in __rtw89_mac_set_tx_time()
6463 	u8 mac_idx = rtwsta_link->rtwvif_link->mac_idx;  in __rtw89_mac_set_tx_time()
6468 	if (rtwsta_link->cctl_tx_time) {  in __rtw89_mac_set_tx_time()
6469 		rtwsta_link->ampdu_max_time = (max_tx_time - 512) >> 9;  in __rtw89_mac_set_tx_time()
6478 		reg = rtw89_mac_reg_by_idx(rtwdev, mac->agg_limit.addr, mac_idx);  in __rtw89_mac_set_tx_time()
6479 		rtw89_write32_mask(rtwdev, reg, mac->agg_limit.mask,  in __rtw89_mac_set_tx_time()
6492 		rtwsta_link->cctl_tx_time = true;  in rtw89_mac_set_tx_time()
6496 		rtwsta_link->cctl_tx_time = false;  in rtw89_mac_set_tx_time()
6505 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_get_tx_time()
6506 	u8 mac_idx = rtwsta_link->rtwvif_link->mac_idx;  in rtw89_mac_get_tx_time()
6510 	if (rtwsta_link->cctl_tx_time) {  in rtw89_mac_get_tx_time()
6511 		*tx_time = (rtwsta_link->ampdu_max_time + 1) << 9;  in rtw89_mac_get_tx_time()
6519 		reg = rtw89_mac_reg_by_idx(rtwdev, mac->agg_limit.addr, mac_idx);  in rtw89_mac_get_tx_time()
6520 		*tx_time = rtw89_read32_mask(rtwdev, reg, mac->agg_limit.mask) << 5;  in rtw89_mac_get_tx_time()
6532 	rtwsta_link->data_tx_cnt_lmt = tx_retry;  in rtw89_mac_set_tx_retry_limit()
6535 		rtwsta_link->cctl_tx_retry_limit = true;  in rtw89_mac_set_tx_retry_limit()
6539 		rtwsta_link->cctl_tx_retry_limit = false;  in rtw89_mac_set_tx_retry_limit()
6548 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_get_tx_retry_limit()
6549 	u8 mac_idx = rtwsta_link->rtwvif_link->mac_idx;  in rtw89_mac_get_tx_retry_limit()
6553 	if (rtwsta_link->cctl_tx_retry_limit) {  in rtw89_mac_get_tx_retry_limit()
6554 		*tx_retry = rtwsta_link->data_tx_cnt_lmt;  in rtw89_mac_get_tx_retry_limit()
6562 		reg = rtw89_mac_reg_by_idx(rtwdev, mac->txcnt_limit.addr, mac_idx);  in rtw89_mac_get_tx_retry_limit()
6563 		*tx_retry = rtw89_read32_mask(rtwdev, reg, mac->txcnt_limit.mask);  in rtw89_mac_get_tx_retry_limit()
6572 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_set_hw_muedca_ctrl()
6573 	u8 mac_idx = rtwvif_link->mac_idx;  in rtw89_mac_set_hw_muedca_ctrl()
6574 	u16 set = mac->muedca_ctrl.mask;  in rtw89_mac_set_hw_muedca_ctrl()
6582 	reg = rtw89_mac_reg_by_idx(rtwdev, mac->muedca_ctrl.addr, mac_idx);  in rtw89_mac_set_hw_muedca_ctrl()
6654 	params.mac_band = rtwvif_link->mac_idx;  in rtw89_mac_pkt_drop_sta()
6655 	params.macid = rtwsta_link->mac_id;  in rtw89_mac_pkt_drop_sta()
6656 	params.port = rtwvif_link->port;  in rtw89_mac_pkt_drop_sta()
6658 	params.tf_trs = rtwvif_link->trigger;  in rtw89_mac_pkt_drop_sta()
6669 	struct rtw89_vif *rtwvif = rtwsta->rtwvif;  in rtw89_mac_pkt_drop_vif_iter()
6670 	struct rtw89_dev *rtwdev = rtwsta->rtwdev;  in rtw89_mac_pkt_drop_vif_iter()
6680 		rtwvif_link = rtwsta_link->rtwvif_link;  in rtw89_mac_pkt_drop_vif_iter()
6687 	ieee80211_iterate_stations_atomic(rtwdev->hw,  in rtw89_mac_pkt_drop_vif()
6695 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_mac_ptk_drop_by_band_and_wait()
6704 		ret = read_poll_timeout(mac->is_txq_empty, empty, empty, 50,  in rtw89_mac_ptk_drop_by_band_and_wait()
6706 		if (ret && !RTW89_CHK_FW_FEATURE(NO_PACKET_DROP, &rtwdev->fw))  in rtw89_mac_ptk_drop_by_band_and_wait()
6720 	if (RTW89_CHK_FW_FEATURE(NO_WOW_CPU_IO_RX, &rtwdev->fw))  in rtw89_mac_cpu_io_rx()
6732 		ret = -EINVAL;  in rtw89_mac_cpu_io_rx()
6739 	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;  in rtw89_wow_config_mac_ax()
6740 	const struct rtw89_chip_info *chip = rtwdev->chip;  in rtw89_wow_config_mac_ax()
6752 		rtw89_write32_clr(rtwdev, mac->rx_fltr, B_AX_SNIFFER_MODE);  in rtw89_wow_config_mac_ax()
6759 		if (RTW89_CHK_FW_FEATURE(NO_WOW_CPU_IO_RX, &rtwdev->fw))  in rtw89_wow_config_mac_ax()
6762 		if (chip->chip_id == RTL8852A || rtw89_is_rtl885xb(rtwdev))  in rtw89_wow_config_mac_ax()
6806 	struct rtw89_fw_secure *sec = &rtwdev->fw.sec;  in rtw89_fwdl_secure_idmem_share_mode_ax()
6808 	if (!sec->secure_boot)  in rtw89_fwdl_secure_idmem_share_mode_ax()