Lines Matching +full:enable +full:- +full:offset
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2009-2014 Realtek Corporation.*/
9 * Check document WM-20130425-JackieLau-RTL8723B_Power_Architecture v05.vsd
11 * 0: POFF--Power Off
12 * 1: PDN--Power Down
13 * 2: CARDEMU--Card Emulation
14 * 3: ACT--Active Mode
15 * 4: LPS--Low Power State
16 * 5: SUS--Suspend
42 /* {offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value}, */\
43 /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \
68 /* Enable USB suspend */ \
85 /* Enable WL control XTAL setting*/ \
88 /*Enable falling edge triggering interrupt*/ \
91 /*Enable GPIO9 interrupt mode*/ \
94 /*Enable GPIO9 input mode*/ \
97 /*Enable HSISR GPIO[C:0] interrupt*/ \
100 /*Enable HSISR GPIO9 interrupt*/ \
113 /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, */\
121 /*Enable rising edge triggering interrupt*/ \
130 /* Enable BT control XTAL setting*/ \
145 /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value },*/\
146 /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \
149 /*0x04[12:11] = 2b'01 enable WL suspend*/ \
159 /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \
172 /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, */\
173 /*clear suspend enable and power down enable*/ \
192 /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, */\
196 /*0x04[12:11] = 2b'01 enable WL suspend*/ \
200 /*0x04[10] = 1, enable SW LPS*/ \
203 /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \
219 /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, */\
220 /*clear suspend enable and power down enable*/ \
245 /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, */\
263 /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, */\
271 /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, */\
305 /*When driver enter Sus/ Disable, enable LOP for BT*/ \
315 /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, */\
334 /*. 0x29[7:6] = 2b'00 enable BB clock*/ \
340 /*. 0x100[7:0] = 0xFF enable WMAC TRX*/ \
343 /*. 0x02[1:0] = 2b'11 enable BB macro*/ \
353 /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, */\