Lines Matching +full:coexist +full:- +full:support
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009-2013 Realtek Corporation.*/
25 * 0 - Disable ASPM, in rtl88e_init_aspm_vars()
26 * 1 - Enable ASPM without Clock Req, in rtl88e_init_aspm_vars()
27 * 2 - Enable ASPM with Clock Req, in rtl88e_init_aspm_vars()
28 * 3 - Alwyas Enable ASPM with Clock Req, in rtl88e_init_aspm_vars()
29 * 4 - Always Enable ASPM without Clock Req. in rtl88e_init_aspm_vars()
32 rtlpci->const_pci_aspm = 3; in rtl88e_init_aspm_vars()
34 /*Setting for PCI-E device */ in rtl88e_init_aspm_vars()
35 rtlpci->const_devicepci_aspm_setting = 0x03; in rtl88e_init_aspm_vars()
37 /*Setting for PCI-E bridge */ in rtl88e_init_aspm_vars()
38 rtlpci->const_hostpci_aspm_setting = 0x02; in rtl88e_init_aspm_vars()
41 * 0 - Default, in rtl88e_init_aspm_vars()
42 * 1 - From ASPM setting without low Mac Pwr, in rtl88e_init_aspm_vars()
43 * 2 - From ASPM setting with low Mac Pwr, in rtl88e_init_aspm_vars()
44 * 3 - Bus D3 in rtl88e_init_aspm_vars()
47 rtlpci->const_hwsw_rfoff_d3 = 0; in rtl88e_init_aspm_vars()
51 * 0 - Not support ASPM, in rtl88e_init_aspm_vars()
52 * 1 - Support ASPM, in rtl88e_init_aspm_vars()
53 * 2 - According to chipset. in rtl88e_init_aspm_vars()
55 rtlpci->const_support_pciaspm = rtlpriv->cfg->mod_params->aspm_support; in rtl88e_init_aspm_vars()
67 rtlpriv->dm.dm_initialgain_enable = true; in rtl88e_init_sw_vars()
68 rtlpriv->dm.dm_flag = 0; in rtl88e_init_sw_vars()
69 rtlpriv->dm.disable_framebursting = false; in rtl88e_init_sw_vars()
70 rtlpriv->dm.thermalvalue = 0; in rtl88e_init_sw_vars()
71 rtlpci->transmit_config = CFENDFORM | BIT(15); in rtl88e_init_sw_vars()
74 rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G; in rtl88e_init_sw_vars()
75 rtlpriv->rtlhal.bandset = BAND_ON_2_4G; in rtl88e_init_sw_vars()
76 rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY; in rtl88e_init_sw_vars()
78 rtlpci->receive_config = (RCR_APPFCS | in rtl88e_init_sw_vars()
93 rtlpci->irq_mask[0] = in rtl88e_init_sw_vars()
106 rtlpci->irq_mask[1] = (u32) (IMR_RXFOVW | 0); in rtl88e_init_sw_vars()
107 rtlpci->sys_irq_mask = (u32) (HSIMR_PDN_INT_EN | HSIMR_RON_INT_EN); in rtl88e_init_sw_vars()
110 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps; in rtl88e_init_sw_vars()
111 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps; in rtl88e_init_sw_vars()
112 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps; in rtl88e_init_sw_vars()
113 rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; in rtl88e_init_sw_vars()
114 if (rtlpriv->cfg->mod_params->disable_watchdog) in rtl88e_init_sw_vars()
116 if (!rtlpriv->psc.inactiveps) in rtl88e_init_sw_vars()
118 if (!rtlpriv->psc.fwctrl_lps) in rtl88e_init_sw_vars()
120 rtlpriv->psc.reg_fwctrl_lps = 3; in rtl88e_init_sw_vars()
121 rtlpriv->psc.reg_max_lps_awakeintvl = 5; in rtl88e_init_sw_vars()
127 if (rtlpriv->psc.reg_fwctrl_lps == 1) in rtl88e_init_sw_vars()
128 rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE; in rtl88e_init_sw_vars()
129 else if (rtlpriv->psc.reg_fwctrl_lps == 2) in rtl88e_init_sw_vars()
130 rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE; in rtl88e_init_sw_vars()
131 else if (rtlpriv->psc.reg_fwctrl_lps == 3) in rtl88e_init_sw_vars()
132 rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE; in rtl88e_init_sw_vars()
135 rtlpriv->rtlhal.pfirmware = vzalloc(0x8000); in rtl88e_init_sw_vars()
136 if (!rtlpriv->rtlhal.pfirmware) { in rtl88e_init_sw_vars()
142 rtlpriv->max_fw_size = 0x8000; in rtl88e_init_sw_vars()
145 rtlpriv->io.dev, GFP_KERNEL, hw, in rtl88e_init_sw_vars()
149 vfree(rtlpriv->rtlhal.pfirmware); in rtl88e_init_sw_vars()
150 rtlpriv->rtlhal.pfirmware = NULL; in rtl88e_init_sw_vars()
155 rtlpriv->rtlhal.earlymode_enable = false; in rtl88e_init_sw_vars()
156 rtlpriv->rtlhal.max_earlymode_num = 10; in rtl88e_init_sw_vars()
158 skb_queue_head_init(&rtlpriv->mac80211.skb_waitq[tid]); in rtl88e_init_sw_vars()
161 rtlpriv->psc.low_power_enable = false; in rtl88e_init_sw_vars()
162 if (rtlpriv->psc.low_power_enable) { in rtl88e_init_sw_vars()
163 timer_setup(&rtlpriv->works.fw_clockoff_timer, in rtl88e_init_sw_vars()
167 timer_setup(&rtlpriv->works.fast_antenna_training_timer, in rtl88e_init_sw_vars()
176 if (rtlpriv->rtlhal.pfirmware) { in rtl88e_deinit_sw_vars()
177 vfree(rtlpriv->rtlhal.pfirmware); in rtl88e_deinit_sw_vars()
178 rtlpriv->rtlhal.pfirmware = NULL; in rtl88e_deinit_sw_vars()
181 if (rtlpriv->psc.low_power_enable) in rtl88e_deinit_sw_vars()
182 del_timer_sync(&rtlpriv->works.fw_clockoff_timer); in rtl88e_deinit_sw_vars()
184 del_timer_sync(&rtlpriv->works.fast_antenna_training_timer); in rtl88e_deinit_sw_vars()
187 /* get bt coexist status */
376 MODULE_PARM_DESC(debug_level, "Set debug level (0-5) (default 0)");