Lines Matching full:beacon
247 #define IMR0_BCNDMAINT0 BIT(20) /* Beacon DMA Interrupt 0 */
248 #define IMR0_BCNDERR0 BIT(16) /* Beacon Queue DMA Error 0 */
251 #define IMR0_BCNDMAINT_E BIT(14) /* Beacon DMA Interrupt
273 #define IMR1_BCNDMAINT7 BIT(27) /* Beacon DMA Interrupt 7 */
274 #define IMR1_BCNDMAINT6 BIT(26) /* Beacon DMA Interrupt 6 */
275 #define IMR1_BCNDMAINT5 BIT(25) /* Beacon DMA Interrupt 5 */
276 #define IMR1_BCNDMAINT4 BIT(24) /* Beacon DMA Interrupt 4 */
277 #define IMR1_BCNDMAINT3 BIT(23) /* Beacon DMA Interrupt 3 */
278 #define IMR1_BCNDMAINT2 BIT(22) /* Beacon DMA Interrupt 2 */
279 #define IMR1_BCNDMAINT1 BIT(21) /* Beacon DMA Interrupt 1 */
280 #define IMR1_BCNDERR7 BIT(20) /* Beacon Queue DMA Err Int 7 */
281 #define IMR1_BCNDERR6 BIT(19) /* Beacon Queue DMA Err Int 6 */
282 #define IMR1_BCNDERR5 BIT(18) /* Beacon Queue DMA Err Int 5 */
283 #define IMR1_BCNDERR4 BIT(17) /* Beacon Queue DMA Err Int 4 */
284 #define IMR1_BCNDERR3 BIT(16) /* Beacon Queue DMA Err Int 3 */
285 #define IMR1_BCNDERR2 BIT(15) /* Beacon Queue DMA Err Int 2 */
286 #define IMR1_BCNDERR1 BIT(14) /* Beacon Queue DMA Err Int 1 */
756 (Rx beacon, probe rsp) */
770 #define RCR_TIM_PARSER_ENABLE BIT(18) /* Enable RX beacon TIM parser*/
855 * Example: Beacon subtype is binary 1000 which is decimal 8 so we have to set