Lines Matching refs:val32
466 u32 val32, value = 0xffffffff; in rtl8710b_indirect_read32() local
481 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_indirect_read32()
482 while ((val32 & BIT(31)) && (--polling_count > 0)); in rtl8710b_indirect_read32()
486 __func__, addr, val32); in rtl8710b_indirect_read32()
502 u32 val32; in rtl8710b_indirect_write32() local
517 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_indirect_write32()
518 while ((val32 & BIT(31)) && (--polling_count > 0)); in rtl8710b_indirect_write32()
522 __func__, val, addr, val32); in rtl8710b_indirect_write32()
542 u32 val32; in rtl8710b_read_efuse8() local
551 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_read_efuse8()
553 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_read_efuse8()
554 if (!(val32 & BIT(31))) in rtl8710b_read_efuse8()
561 val32 = rtl8xxxu_read32(priv, REG_USB_HOST_INDIRECT_DATA_8710B); in rtl8710b_read_efuse8()
563 *data = val32 & 0xff; in rtl8710b_read_efuse8()
684 u32 val32; in rtl8710bu_config_channel() local
700 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_MODE_AG); in rtl8710bu_config_channel()
701 u32p_replace_bits(&val32, channel, MODE_AG_CHANNEL_MASK); in rtl8710bu_config_channel()
702 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_MODE_AG, val32); in rtl8710bu_config_channel()
715 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
716 u32p_replace_bits(&val32, ht40, FPGA_RF_MODE); in rtl8710bu_config_channel()
717 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8710bu_config_channel()
719 val32 = rtl8xxxu_read32(priv, REG_FPGA1_RF_MODE); in rtl8710bu_config_channel()
720 u32p_replace_bits(&val32, ht40, FPGA_RF_MODE); in rtl8710bu_config_channel()
721 rtl8xxxu_write32(priv, REG_FPGA1_RF_MODE, val32); in rtl8710bu_config_channel()
725 val32 = rtl8xxxu_read32(priv, REG_CCK0_SYSTEM); in rtl8710bu_config_channel()
726 u32p_replace_bits(&val32, !sec_ch_above, CCK0_SIDEBAND); in rtl8710bu_config_channel()
727 rtl8xxxu_write32(priv, REG_CCK0_SYSTEM, val32); in rtl8710bu_config_channel()
731 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
732 val32 |= GENMASK(10, 8); in rtl8710bu_config_channel()
733 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8710bu_config_channel()
736 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
737 val32 |= BIT(14) | BIT(12); in rtl8710bu_config_channel()
738 val32 &= ~BIT(13); in rtl8710bu_config_channel()
739 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8710bu_config_channel()
742 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT); in rtl8710bu_config_channel()
743 val32 &= ~GENMASK(31, 30); in rtl8710bu_config_channel()
744 rtl8xxxu_write32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT, val32); in rtl8710bu_config_channel()
747 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT); in rtl8710bu_config_channel()
748 val32 &= ~BIT(29); in rtl8710bu_config_channel()
749 val32 |= BIT(28); in rtl8710bu_config_channel()
750 rtl8xxxu_write32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT, val32); in rtl8710bu_config_channel()
753 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_RX_AFE); in rtl8710bu_config_channel()
754 val32 &= ~BIT(29); in rtl8710bu_config_channel()
755 val32 |= BIT(28); in rtl8710bu_config_channel()
756 rtl8xxxu_write32(priv, REG_OFDM0_XA_RX_AFE, val32); in rtl8710bu_config_channel()
758 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XB_RF_INT_OE); in rtl8710bu_config_channel()
759 val32 &= ~BIT(30); in rtl8710bu_config_channel()
760 val32 |= BIT(29); in rtl8710bu_config_channel()
761 rtl8xxxu_write32(priv, REG_FPGA0_XB_RF_INT_OE, val32); in rtl8710bu_config_channel()
764 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
765 val32 &= ~BIT(19); in rtl8710bu_config_channel()
766 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
768 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
769 val32 &= ~GENMASK(23, 20); in rtl8710bu_config_channel()
770 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
772 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
773 val32 &= ~GENMASK(27, 24); in rtl8710bu_config_channel()
774 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
777 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_MODE_AG); in rtl8710bu_config_channel()
778 val32 &= ~MODE_AG_BW_MASK; in rtl8710bu_config_channel()
779 val32 |= MODE_AG_BW_40MHZ_8723B; in rtl8710bu_config_channel()
780 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_MODE_AG, val32); in rtl8710bu_config_channel()
782 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
783 val32 |= BIT(19); in rtl8710bu_config_channel()
784 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
786 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
787 val32 &= ~GENMASK(23, 20); in rtl8710bu_config_channel()
788 val32 |= BIT(23); in rtl8710bu_config_channel()
789 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
791 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
792 val32 &= ~GENMASK(27, 24); in rtl8710bu_config_channel()
793 val32 |= BIT(27) | BIT(25); in rtl8710bu_config_channel()
794 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
797 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_MODE_AG); in rtl8710bu_config_channel()
798 val32 &= ~MODE_AG_BW_MASK; in rtl8710bu_config_channel()
799 val32 |= MODE_AG_BW_20MHZ_8723B; in rtl8710bu_config_channel()
800 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_MODE_AG, val32); in rtl8710bu_config_channel()
823 u32 val32; in rtl8710bu_init_statistics() local
832 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_init_statistics()
833 val32 |= 0xff; in rtl8710bu_init_statistics()
834 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_init_statistics()
837 val32 = rtl8xxxu_read32(priv, REG_NHM_TH9_TH10_8723B); in rtl8710bu_init_statistics()
838 val32 &= ~(BIT(8) | BIT(9) | BIT(10)); in rtl8710bu_init_statistics()
839 val32 |= BIT(8); in rtl8710bu_init_statistics()
840 rtl8xxxu_write32(priv, REG_NHM_TH9_TH10_8723B, val32); in rtl8710bu_init_statistics()
843 val32 = rtl8xxxu_read32(priv, REG_OFDM0_FA_RSTC); in rtl8710bu_init_statistics()
844 val32 |= BIT(7); in rtl8710bu_init_statistics()
845 rtl8xxxu_write32(priv, REG_OFDM0_FA_RSTC, val32); in rtl8710bu_init_statistics()
854 u32 val32; in rtl8710b_read_efuse() local
856 val32 = rtl8710b_read_syson_reg(priv, REG_SYS_EEPROM_CTRL0_8710B); in rtl8710b_read_efuse()
857 priv->boot_eeprom = u32_get_bits(val32, EEPROM_BOOT); in rtl8710b_read_efuse()
858 priv->has_eeprom = u32_get_bits(val32, EEPROM_ENABLE); in rtl8710b_read_efuse()
962 u32 val32; in rtl8710bu_init_phy_bb() local
965 val32 = rtl8xxxu_read32(priv, REG_SYS_FUNC_8710B); in rtl8710bu_init_phy_bb()
966 val32 |= GENMASK(17, 16) | GENMASK(26, 24); in rtl8710bu_init_phy_bb()
967 rtl8xxxu_write32(priv, REG_SYS_FUNC_8710B, val32); in rtl8710bu_init_phy_bb()
993 u32 reg_eac, reg_e94, reg_e9c, val32, path_sel_bb; in rtl8710bu_iqk_path_a() local
1003 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_iqk_path_a()
1004 u32p_replace_bits(&val32, 0, 0xffffff00); in rtl8710bu_iqk_path_a()
1005 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_iqk_path_a()
1010 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_WE_LUT); in rtl8710bu_iqk_path_a()
1011 val32 |= 0x80000; in rtl8710bu_iqk_path_a()
1012 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, val32); in rtl8710bu_iqk_path_a()
1018 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_iqk_path_a()
1019 val32 |= BIT(11); in rtl8710bu_iqk_path_a()
1020 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_iqk_path_a()
1021 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_PAD_TXG); in rtl8710bu_iqk_path_a()
1022 u32p_replace_bits(&val32, 0x1ed, 0x00fff); in rtl8710bu_iqk_path_a()
1023 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, val32); in rtl8710bu_iqk_path_a()
1026 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_iqk_path_a()
1027 u32p_replace_bits(&val32, 0x808000, 0xffffff00); in rtl8710bu_iqk_path_a()
1028 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_iqk_path_a()
1051 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_iqk_path_a()
1052 u32p_replace_bits(&val32, 0, 0xffffff00); in rtl8710bu_iqk_path_a()
1053 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_iqk_path_a()
1055 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_iqk_path_a()
1056 val32 &= ~BIT(11); in rtl8710bu_iqk_path_a()
1057 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_iqk_path_a()
1077 u32 reg_ea4, reg_eac, reg_e94, reg_e9c, val32, path_sel_bb, tmp; in rtl8710bu_rx_iqk_path_a() local
1087 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1088 u32p_replace_bits(&val32, 0, 0xffffff00); in rtl8710bu_rx_iqk_path_a()
1089 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1092 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_WE_LUT); in rtl8710bu_rx_iqk_path_a()
1093 val32 |= 0x80000; in rtl8710bu_rx_iqk_path_a()
1094 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, val32); in rtl8710bu_rx_iqk_path_a()
1100 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_rx_iqk_path_a()
1101 val32 |= BIT(11); in rtl8710bu_rx_iqk_path_a()
1102 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_rx_iqk_path_a()
1103 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_PAD_TXG); in rtl8710bu_rx_iqk_path_a()
1104 u32p_replace_bits(&val32, 0xf, 0x003e0); in rtl8710bu_rx_iqk_path_a()
1105 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, val32); in rtl8710bu_rx_iqk_path_a()
1110 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1111 u32p_replace_bits(&val32, 0x808000, 0xffffff00); in rtl8710bu_rx_iqk_path_a()
1112 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1153 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1154 u32p_replace_bits(&val32, 0, 0xffffff00); in rtl8710bu_rx_iqk_path_a()
1155 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1157 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_rx_iqk_path_a()
1158 val32 &= ~BIT(11); in rtl8710bu_rx_iqk_path_a()
1159 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_rx_iqk_path_a()
1164 val32 = 0x80007c00 | (reg_e94 & 0x3ff0000) | ((reg_e9c & 0x3ff0000) >> 16); in rtl8710bu_rx_iqk_path_a()
1165 rtl8xxxu_write32(priv, REG_TX_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1170 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1171 u32p_replace_bits(&val32, 0, 0xffffff00); in rtl8710bu_rx_iqk_path_a()
1172 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1174 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_WE_LUT); in rtl8710bu_rx_iqk_path_a()
1175 val32 |= 0x80000; in rtl8710bu_rx_iqk_path_a()
1176 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, val32); in rtl8710bu_rx_iqk_path_a()
1184 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_rx_iqk_path_a()
1185 val32 |= BIT(11); in rtl8710bu_rx_iqk_path_a()
1186 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_rx_iqk_path_a()
1187 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_PAD_TXG); in rtl8710bu_rx_iqk_path_a()
1188 u32p_replace_bits(&val32, 0x2a, 0x00fff); in rtl8710bu_rx_iqk_path_a()
1189 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, val32); in rtl8710bu_rx_iqk_path_a()
1194 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1195 u32p_replace_bits(&val32, 0x808000, 0xffffff00); in rtl8710bu_rx_iqk_path_a()
1196 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1224 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1225 u32p_replace_bits(&val32, 0, 0xffffff00); in rtl8710bu_rx_iqk_path_a()
1226 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1228 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_rx_iqk_path_a()
1229 val32 &= ~BIT(11); in rtl8710bu_rx_iqk_path_a()
1230 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_rx_iqk_path_a()
1258 u32 i, val32, rx_initial_gain, lok_result; in rtl8710bu_phy_iqcalibrate() local
1302 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM1); in rtl8710bu_phy_iqcalibrate()
1303 priv->pi_enabled = u32_get_bits(val32, FPGA0_HSSI_PARM1_PI); in rtl8710bu_phy_iqcalibrate()
1313 val32 = rtl8xxxu_read32(priv, REG_TX_PTCL_CTRL); in rtl8710bu_phy_iqcalibrate()
1314 val32 |= 0x00ff0000; in rtl8710bu_phy_iqcalibrate()
1315 rtl8xxxu_write32(priv, REG_TX_PTCL_CTRL, val32); in rtl8710bu_phy_iqcalibrate()
1322 val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING); in rtl8710bu_phy_iqcalibrate()
1323 val32 |= 0x0f000000; in rtl8710bu_phy_iqcalibrate()
1324 rtl8xxxu_write32(priv, REG_CCK0_AFE_SETTING, val32); in rtl8710bu_phy_iqcalibrate()
1331 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_phy_iqcalibrate()
1332 u32p_replace_bits(&val32, 0x808000, 0xffffff00); in rtl8710bu_phy_iqcalibrate()
1333 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_phy_iqcalibrate()
1341 val32 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A); in rtl8710bu_phy_iqcalibrate()
1342 result[t][0] = (val32 >> 16) & 0x3ff; in rtl8710bu_phy_iqcalibrate()
1344 val32 = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A); in rtl8710bu_phy_iqcalibrate()
1345 result[t][1] = (val32 >> 16) & 0x3ff; in rtl8710bu_phy_iqcalibrate()
1357 val32 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_A_2); in rtl8710bu_phy_iqcalibrate()
1358 result[t][2] = (val32 >> 16) & 0x3ff; in rtl8710bu_phy_iqcalibrate()
1360 val32 = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2); in rtl8710bu_phy_iqcalibrate()
1361 result[t][3] = (val32 >> 16) & 0x3ff; in rtl8710bu_phy_iqcalibrate()
1373 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_phy_iqcalibrate()
1374 u32p_replace_bits(&val32, 0, 0xffffff00); in rtl8710bu_phy_iqcalibrate()
1375 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_phy_iqcalibrate()
1394 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8710bu_phy_iqcalibrate()
1395 u32p_replace_bits(&val32, 0x50, 0x000000ff); in rtl8710bu_phy_iqcalibrate()
1396 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32); in rtl8710bu_phy_iqcalibrate()
1397 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8710bu_phy_iqcalibrate()
1398 u32p_replace_bits(&val32, rx_initial_gain & 0xff, 0x000000ff); in rtl8710bu_phy_iqcalibrate()
1399 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32); in rtl8710bu_phy_iqcalibrate()
1518 u32 val32; in rtl8710bu_active_to_emu() local
1522 val32 = rtl8xxxu_read32(priv, REG_SYS_FUNC_8710B); in rtl8710bu_active_to_emu()
1523 val32 &= ~GENMASK(26, 24); in rtl8710bu_active_to_emu()
1524 rtl8xxxu_write32(priv, REG_SYS_FUNC_8710B, val32); in rtl8710bu_active_to_emu()
1527 val32 = rtl8xxxu_read32(priv, REG_SYS_FUNC_8710B); in rtl8710bu_active_to_emu()
1528 val32 &= ~GENMASK(17, 16); in rtl8710bu_active_to_emu()
1529 rtl8xxxu_write32(priv, REG_SYS_FUNC_8710B, val32); in rtl8710bu_active_to_emu()
1556 u32 val32; in rtl8710bu_active_to_lps() local
1568 val32 = rtl8xxxu_read32(priv, REG_SCH_TX_CMD); in rtl8710bu_active_to_lps()
1569 if (!val32) { in rtl8710bu_active_to_lps()
1611 u32 val32; in rtl8710bu_power_on() local
1668 val32 = rtl8710b_read_syson_reg(priv, 0x138); in rtl8710bu_power_on()
1669 val32 &= ~BIT(5); in rtl8710bu_power_on()
1670 rtl8710b_write_syson_reg(priv, 0x138, val32); in rtl8710bu_power_on()
1677 u32 val32; in rtl8710bu_power_off() local
1686 val32 = rtl8710b_read_syson_reg(priv, 0x138); in rtl8710bu_power_off()
1687 val32 |= BIT(5); in rtl8710bu_power_off()
1688 rtl8710b_write_syson_reg(priv, 0x138, val32); in rtl8710bu_power_off()
1723 u32 val32; in rtl8710b_enable_rf() local
1727 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8710b_enable_rf()
1728 val32 &= ~(OFDM_RF_PATH_RX_MASK | OFDM_RF_PATH_TX_MASK); in rtl8710b_enable_rf()
1729 val32 |= OFDM_RF_PATH_RX_A | OFDM_RF_PATH_TX_A; in rtl8710b_enable_rf()
1730 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8710b_enable_rf()
1737 u32 val32; in rtl8710b_disable_rf() local
1739 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8710b_disable_rf()
1740 val32 &= ~OFDM_RF_PATH_TX_MASK; in rtl8710b_disable_rf()
1741 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8710b_disable_rf()
1764 u32 val32; in rtl8710b_set_crystal_cap() local
1769 val32 = rtl8710b_read_syson_reg(priv, REG_SYS_XTAL_CTRL0_8710B); in rtl8710b_set_crystal_cap()
1775 u32_get_bits(val32, XTAL1), in rtl8710b_set_crystal_cap()
1776 u32_get_bits(val32, XTAL0), in rtl8710b_set_crystal_cap()
1779 u32p_replace_bits(&val32, crystal_cap, XTAL1); in rtl8710b_set_crystal_cap()
1780 u32p_replace_bits(&val32, crystal_cap, XTAL0); in rtl8710b_set_crystal_cap()
1781 rtl8710b_write_syson_reg(priv, REG_SYS_XTAL_CTRL0_8710B, val32); in rtl8710b_set_crystal_cap()