Lines Matching refs:priv
463 static u32 rtl8710b_indirect_read32(struct rtl8xxxu_priv *priv, u32 addr) in rtl8710b_indirect_read32() argument
465 struct device *dev = &priv->udev->dev; in rtl8710b_indirect_read32()
475 mutex_lock(&priv->syson_indirect_access_mutex); in rtl8710b_indirect_read32()
477 rtl8xxxu_write32(priv, REG_USB_HOST_INDIRECT_ADDR_8710B, addr); in rtl8710b_indirect_read32()
478 rtl8xxxu_write32(priv, REG_EFUSE_INDIRECT_CTRL_8710B, NORMAL_REG_READ_OFFSET); in rtl8710b_indirect_read32()
481 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_indirect_read32()
488 value = rtl8xxxu_read32(priv, REG_USB_HOST_INDIRECT_DATA_8710B); in rtl8710b_indirect_read32()
490 mutex_unlock(&priv->syson_indirect_access_mutex); in rtl8710b_indirect_read32()
498 static void rtl8710b_indirect_write32(struct rtl8xxxu_priv *priv, u32 addr, u32 val) in rtl8710b_indirect_write32() argument
500 struct device *dev = &priv->udev->dev; in rtl8710b_indirect_write32()
510 mutex_lock(&priv->syson_indirect_access_mutex); in rtl8710b_indirect_write32()
512 rtl8xxxu_write32(priv, REG_USB_HOST_INDIRECT_ADDR_8710B, addr); in rtl8710b_indirect_write32()
513 rtl8xxxu_write32(priv, REG_USB_HOST_INDIRECT_DATA_8710B, val); in rtl8710b_indirect_write32()
514 rtl8xxxu_write32(priv, REG_EFUSE_INDIRECT_CTRL_8710B, NORMAL_REG_WRITE_OFFSET); in rtl8710b_indirect_write32()
517 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_indirect_write32()
524 mutex_unlock(&priv->syson_indirect_access_mutex); in rtl8710b_indirect_write32()
530 static u32 rtl8710b_read_syson_reg(struct rtl8xxxu_priv *priv, u32 addr) in rtl8710b_read_syson_reg() argument
532 return rtl8710b_indirect_read32(priv, addr | SYSON_REG_BASE_ADDR_8710B); in rtl8710b_read_syson_reg()
535 static void rtl8710b_write_syson_reg(struct rtl8xxxu_priv *priv, u32 addr, u32 val) in rtl8710b_write_syson_reg() argument
537 rtl8710b_indirect_write32(priv, addr | SYSON_REG_BASE_ADDR_8710B, val); in rtl8710b_write_syson_reg()
540 static int rtl8710b_read_efuse8(struct rtl8xxxu_priv *priv, u16 offset, u8 *data) in rtl8710b_read_efuse8() argument
546 rtl8xxxu_write32(priv, REG_USB_HOST_INDIRECT_ADDR_8710B, offset); in rtl8710b_read_efuse8()
548 rtl8xxxu_write32(priv, REG_EFUSE_INDIRECT_CTRL_8710B, EFUSE_READ_OFFSET); in rtl8710b_read_efuse8()
551 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_read_efuse8()
553 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_read_efuse8()
561 val32 = rtl8xxxu_read32(priv, REG_USB_HOST_INDIRECT_DATA_8710B); in rtl8710b_read_efuse8()
571 static int rtl8710bu_identify_chip(struct rtl8xxxu_priv *priv) in rtl8710bu_identify_chip() argument
573 struct device *dev = &priv->udev->dev; in rtl8710bu_identify_chip()
577 sprintf(priv->chip_name, "8710BU"); in rtl8710bu_identify_chip()
578 priv->rtl_chip = RTL8710B; in rtl8710bu_identify_chip()
579 priv->rf_paths = 1; in rtl8710bu_identify_chip()
580 priv->rx_paths = 1; in rtl8710bu_identify_chip()
581 priv->tx_paths = 1; in rtl8710bu_identify_chip()
582 priv->has_wifi = 1; in rtl8710bu_identify_chip()
584 cfg0 = rtl8710b_read_syson_reg(priv, REG_SYS_SYSTEM_CFG0_8710B); in rtl8710bu_identify_chip()
585 priv->chip_cut = cfg0 & 0xf; in rtl8710bu_identify_chip()
597 sprintf(priv->chip_vendor, "SMIC"); in rtl8710bu_identify_chip()
598 priv->vendor_smic = 1; in rtl8710bu_identify_chip()
601 sprintf(priv->chip_vendor, "TSMC"); in rtl8710bu_identify_chip()
604 sprintf(priv->chip_vendor, "UMC"); in rtl8710bu_identify_chip()
605 priv->vendor_umc = 1; in rtl8710bu_identify_chip()
608 sprintf(priv->chip_vendor, "unknown"); in rtl8710bu_identify_chip()
612 rtl8710b_read_efuse8(priv, EEPROM_PACKAGE_TYPE_8710B, &package_type); in rtl8710bu_identify_chip()
617 if (priv->vendor_umc) { in rtl8710bu_identify_chip()
619 } else if (priv->vendor_smic) { in rtl8710bu_identify_chip()
643 priv->package_type = package_type; in rtl8710bu_identify_chip()
647 cfg2 = rtl8710b_read_syson_reg(priv, REG_SYS_SYSTEM_CFG2_8710B); in rtl8710bu_identify_chip()
648 priv->rom_rev = cfg2 & 0xf; in rtl8710bu_identify_chip()
650 return rtl8xxxu_config_endpoints_no_sie(priv); in rtl8710bu_identify_chip()
653 static void rtl8710b_revise_cck_tx_psf(struct rtl8xxxu_priv *priv, u8 channel) in rtl8710b_revise_cck_tx_psf() argument
657 rtl8xxxu_write32(priv, REG_CCK0_TX_FILTER2, 0x64B80C1C); in rtl8710b_revise_cck_tx_psf()
658 rtl8xxxu_write32(priv, REG_CCK0_DEBUG_PORT, 0x00008810); in rtl8710b_revise_cck_tx_psf()
659 rtl8xxxu_write32(priv, REG_CCK0_TX_FILTER3, 0x01235667); in rtl8710b_revise_cck_tx_psf()
661 rtl8xxxu_write32(priv, REG_CCK0_TX_FILTER1, 0xd1d80001); in rtl8710b_revise_cck_tx_psf()
664 rtl8xxxu_write32(priv, REG_CCK0_TX_FILTER2, 0x0000B81C); in rtl8710b_revise_cck_tx_psf()
665 rtl8xxxu_write32(priv, REG_CCK0_DEBUG_PORT, 0x00000000); in rtl8710b_revise_cck_tx_psf()
666 rtl8xxxu_write32(priv, REG_CCK0_TX_FILTER3, 0x00003667); in rtl8710b_revise_cck_tx_psf()
668 rtl8xxxu_write32(priv, REG_CCK0_TX_FILTER1, 0xE82C0001); in rtl8710b_revise_cck_tx_psf()
671 rtl8xxxu_write32(priv, REG_CCK0_TX_FILTER2, 0x64B80C1C); in rtl8710b_revise_cck_tx_psf()
672 rtl8xxxu_write32(priv, REG_CCK0_DEBUG_PORT, 0x00008810); in rtl8710b_revise_cck_tx_psf()
673 rtl8xxxu_write32(priv, REG_CCK0_TX_FILTER3, 0x01235667); in rtl8710b_revise_cck_tx_psf()
674 rtl8xxxu_write32(priv, REG_CCK0_TX_FILTER1, 0xE82C0001); in rtl8710b_revise_cck_tx_psf()
680 struct rtl8xxxu_priv *priv = hw->priv; in rtl8710bu_config_channel() local
700 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_MODE_AG); in rtl8710bu_config_channel()
702 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_MODE_AG, val32); in rtl8710bu_config_channel()
704 rtl8710b_revise_cck_tx_psf(priv, channel); in rtl8710bu_config_channel()
707 val16 = rtl8xxxu_read16(priv, REG_WMAC_TRXPTCL_CTL); in rtl8710bu_config_channel()
711 rtl8xxxu_write16(priv, REG_WMAC_TRXPTCL_CTL, val16); in rtl8710bu_config_channel()
713 rtl8xxxu_write8(priv, REG_DATA_SUBCHANNEL, subchannel); in rtl8710bu_config_channel()
715 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
717 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8710bu_config_channel()
719 val32 = rtl8xxxu_read32(priv, REG_FPGA1_RF_MODE); in rtl8710bu_config_channel()
721 rtl8xxxu_write32(priv, REG_FPGA1_RF_MODE, val32); in rtl8710bu_config_channel()
725 val32 = rtl8xxxu_read32(priv, REG_CCK0_SYSTEM); in rtl8710bu_config_channel()
727 rtl8xxxu_write32(priv, REG_CCK0_SYSTEM, val32); in rtl8710bu_config_channel()
731 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
733 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8710bu_config_channel()
736 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
739 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8710bu_config_channel()
742 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT); in rtl8710bu_config_channel()
744 rtl8xxxu_write32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT, val32); in rtl8710bu_config_channel()
747 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT); in rtl8710bu_config_channel()
750 rtl8xxxu_write32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT, val32); in rtl8710bu_config_channel()
753 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_RX_AFE); in rtl8710bu_config_channel()
756 rtl8xxxu_write32(priv, REG_OFDM0_XA_RX_AFE, val32); in rtl8710bu_config_channel()
758 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XB_RF_INT_OE); in rtl8710bu_config_channel()
761 rtl8xxxu_write32(priv, REG_FPGA0_XB_RF_INT_OE, val32); in rtl8710bu_config_channel()
764 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
766 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
768 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
770 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
772 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
774 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
777 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_MODE_AG); in rtl8710bu_config_channel()
780 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_MODE_AG, val32); in rtl8710bu_config_channel()
782 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
784 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
786 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
789 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
791 val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR); in rtl8710bu_config_channel()
794 rtl8xxxu_write32(priv, REG_OFDM_RX_DFIR, val32); in rtl8710bu_config_channel()
797 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_MODE_AG); in rtl8710bu_config_channel()
800 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_MODE_AG, val32); in rtl8710bu_config_channel()
804 static void rtl8710bu_init_aggregation(struct rtl8xxxu_priv *priv) in rtl8710bu_init_aggregation() argument
810 agg_ctrl = rtl8xxxu_read8(priv, REG_TRXDMA_CTRL); in rtl8710bu_init_aggregation()
813 agg_rx = rtl8xxxu_read32(priv, REG_RXDMA_AGG_PG_TH); in rtl8710bu_init_aggregation()
817 rtl8xxxu_write8(priv, REG_TRXDMA_CTRL, agg_ctrl); in rtl8710bu_init_aggregation()
818 rtl8xxxu_write32(priv, REG_RXDMA_AGG_PG_TH, agg_rx); in rtl8710bu_init_aggregation()
821 static void rtl8710bu_init_statistics(struct rtl8xxxu_priv *priv) in rtl8710bu_init_statistics() argument
826 rtl8xxxu_write16(priv, REG_NHM_TIMER_8723B + 2, 0xc350); in rtl8710bu_init_statistics()
827 rtl8xxxu_write16(priv, REG_NHM_TH9_TH10_8723B + 2, 0xffff); in rtl8710bu_init_statistics()
828 rtl8xxxu_write32(priv, REG_NHM_TH3_TO_TH0_8723B, 0xffffff50); in rtl8710bu_init_statistics()
829 rtl8xxxu_write32(priv, REG_NHM_TH7_TO_TH4_8723B, 0xffffffff); in rtl8710bu_init_statistics()
832 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_init_statistics()
834 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_init_statistics()
837 val32 = rtl8xxxu_read32(priv, REG_NHM_TH9_TH10_8723B); in rtl8710bu_init_statistics()
840 rtl8xxxu_write32(priv, REG_NHM_TH9_TH10_8723B, val32); in rtl8710bu_init_statistics()
843 val32 = rtl8xxxu_read32(priv, REG_OFDM0_FA_RSTC); in rtl8710bu_init_statistics()
845 rtl8xxxu_write32(priv, REG_OFDM0_FA_RSTC, val32); in rtl8710bu_init_statistics()
848 static int rtl8710b_read_efuse(struct rtl8xxxu_priv *priv) in rtl8710b_read_efuse() argument
850 struct device *dev = &priv->udev->dev; in rtl8710b_read_efuse()
856 val32 = rtl8710b_read_syson_reg(priv, REG_SYS_EEPROM_CTRL0_8710B); in rtl8710b_read_efuse()
857 priv->boot_eeprom = u32_get_bits(val32, EEPROM_BOOT); in rtl8710b_read_efuse()
858 priv->has_eeprom = u32_get_bits(val32, EEPROM_ENABLE); in rtl8710b_read_efuse()
861 memset(priv->efuse_wifi.raw, 0xff, EFUSE_MAP_LEN); in rtl8710b_read_efuse()
867 ret = rtl8710b_read_efuse8(priv, efuse_addr++, &header); in rtl8710b_read_efuse()
874 ret = rtl8710b_read_efuse8(priv, efuse_addr++, &extheader); in rtl8710b_read_efuse()
900 ret = rtl8710b_read_efuse8(priv, efuse_addr++, &val8); in rtl8710b_read_efuse()
909 priv->efuse_wifi.raw[map_addr++] = val8; in rtl8710b_read_efuse()
911 ret = rtl8710b_read_efuse8(priv, efuse_addr++, &val8); in rtl8710b_read_efuse()
914 priv->efuse_wifi.raw[map_addr++] = val8; in rtl8710b_read_efuse()
923 static int rtl8710bu_parse_efuse(struct rtl8xxxu_priv *priv) in rtl8710bu_parse_efuse() argument
925 struct rtl8710bu_efuse *efuse = &priv->efuse_wifi.efuse8710bu; in rtl8710bu_parse_efuse()
930 ether_addr_copy(priv->mac_addr, efuse->mac_addr); in rtl8710bu_parse_efuse()
932 memcpy(priv->cck_tx_power_index_A, efuse->tx_power_index_A.cck_base, in rtl8710bu_parse_efuse()
935 memcpy(priv->ht40_1s_tx_power_index_A, in rtl8710bu_parse_efuse()
939 priv->ofdm_tx_power_diff[0].a = efuse->tx_power_index_A.ht20_ofdm_1s_diff.a; in rtl8710bu_parse_efuse()
940 priv->ht20_tx_power_diff[0].a = efuse->tx_power_index_A.ht20_ofdm_1s_diff.b; in rtl8710bu_parse_efuse()
942 priv->default_crystal_cap = efuse->xtal_k & 0x3f; in rtl8710bu_parse_efuse()
947 static int rtl8710bu_load_firmware(struct rtl8xxxu_priv *priv) in rtl8710bu_load_firmware() argument
949 if (priv->vendor_smic) { in rtl8710bu_load_firmware()
950 return rtl8xxxu_load_firmware(priv, "rtlwifi/rtl8710bufw_SMIC.bin"); in rtl8710bu_load_firmware()
951 } else if (priv->vendor_umc) { in rtl8710bu_load_firmware()
952 return rtl8xxxu_load_firmware(priv, "rtlwifi/rtl8710bufw_UMC.bin"); in rtl8710bu_load_firmware()
954 dev_err(&priv->udev->dev, "We have no suitable firmware for this chip.\n"); in rtl8710bu_load_firmware()
959 static void rtl8710bu_init_phy_bb(struct rtl8xxxu_priv *priv) in rtl8710bu_init_phy_bb() argument
965 val32 = rtl8xxxu_read32(priv, REG_SYS_FUNC_8710B); in rtl8710bu_init_phy_bb()
967 rtl8xxxu_write32(priv, REG_SYS_FUNC_8710B, val32); in rtl8710bu_init_phy_bb()
969 if (priv->package_type == PACKAGE_QFN48M_U) in rtl8710bu_init_phy_bb()
974 rtl8xxxu_init_phy_regs(priv, phy_init_table); in rtl8710bu_init_phy_bb()
976 rtl8xxxu_init_phy_regs(priv, rtl8710b_agc_table); in rtl8710bu_init_phy_bb()
979 static int rtl8710bu_init_phy_rf(struct rtl8xxxu_priv *priv) in rtl8710bu_init_phy_rf() argument
983 if (priv->package_type == PACKAGE_QFN48M_U) in rtl8710bu_init_phy_rf()
988 return rtl8xxxu_init_phy_rf(priv, radioa_init_table, RF_A); in rtl8710bu_init_phy_rf()
991 static int rtl8710bu_iqk_path_a(struct rtl8xxxu_priv *priv, u32 *lok_result) in rtl8710bu_iqk_path_a() argument
996 path_sel_bb = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH); in rtl8710bu_iqk_path_a()
998 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x99000000); in rtl8710bu_iqk_path_a()
1003 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_iqk_path_a()
1005 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_iqk_path_a()
1010 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_WE_LUT); in rtl8710bu_iqk_path_a()
1012 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, val32); in rtl8710bu_iqk_path_a()
1013 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x20000); in rtl8710bu_iqk_path_a()
1014 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f); in rtl8710bu_iqk_path_a()
1015 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0x07ff7); in rtl8710bu_iqk_path_a()
1018 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_iqk_path_a()
1020 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_iqk_path_a()
1021 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_PAD_TXG); in rtl8710bu_iqk_path_a()
1023 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, val32); in rtl8710bu_iqk_path_a()
1026 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_iqk_path_a()
1028 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_iqk_path_a()
1031 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x18008c1c); in rtl8710bu_iqk_path_a()
1032 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c); in rtl8710bu_iqk_path_a()
1034 rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x821403ff); in rtl8710bu_iqk_path_a()
1035 rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x28160c06); in rtl8710bu_iqk_path_a()
1038 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x02002911); in rtl8710bu_iqk_path_a()
1041 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000); in rtl8710bu_iqk_path_a()
1042 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8710bu_iqk_path_a()
1046 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel_bb); in rtl8710bu_iqk_path_a()
1051 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_iqk_path_a()
1053 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_iqk_path_a()
1055 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_iqk_path_a()
1057 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_iqk_path_a()
1060 *lok_result = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_TXM_IDAC); in rtl8710bu_iqk_path_a()
1063 reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2); in rtl8710bu_iqk_path_a()
1064 reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A); in rtl8710bu_iqk_path_a()
1065 reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A); in rtl8710bu_iqk_path_a()
1075 static int rtl8710bu_rx_iqk_path_a(struct rtl8xxxu_priv *priv, u32 lok_result) in rtl8710bu_rx_iqk_path_a() argument
1080 path_sel_bb = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH); in rtl8710bu_rx_iqk_path_a()
1082 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x99000000); in rtl8710bu_rx_iqk_path_a()
1087 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1089 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1092 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_WE_LUT); in rtl8710bu_rx_iqk_path_a()
1094 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, val32); in rtl8710bu_rx_iqk_path_a()
1095 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000); in rtl8710bu_rx_iqk_path_a()
1096 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f); in rtl8710bu_rx_iqk_path_a()
1097 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf1173); in rtl8710bu_rx_iqk_path_a()
1100 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_rx_iqk_path_a()
1102 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_rx_iqk_path_a()
1103 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_PAD_TXG); in rtl8710bu_rx_iqk_path_a()
1105 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, val32); in rtl8710bu_rx_iqk_path_a()
1110 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1112 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1115 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x18008c1c); in rtl8710bu_rx_iqk_path_a()
1116 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c); in rtl8710bu_rx_iqk_path_a()
1118 rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x8216129f); in rtl8710bu_rx_iqk_path_a()
1119 rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x28160c00); in rtl8710bu_rx_iqk_path_a()
1124 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8710bu_rx_iqk_path_a()
1125 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8710bu_rx_iqk_path_a()
1128 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a911); in rtl8710bu_rx_iqk_path_a()
1131 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000); in rtl8710bu_rx_iqk_path_a()
1132 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8710bu_rx_iqk_path_a()
1137 reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2); in rtl8710bu_rx_iqk_path_a()
1138 reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A); in rtl8710bu_rx_iqk_path_a()
1139 reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A); in rtl8710bu_rx_iqk_path_a()
1148 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel_bb); in rtl8710bu_rx_iqk_path_a()
1153 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1155 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1157 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_rx_iqk_path_a()
1159 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_rx_iqk_path_a()
1165 rtl8xxxu_write32(priv, REG_TX_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1170 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1172 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1174 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_WE_LUT); in rtl8710bu_rx_iqk_path_a()
1176 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, val32); in rtl8710bu_rx_iqk_path_a()
1177 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000); in rtl8710bu_rx_iqk_path_a()
1178 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f); in rtl8710bu_rx_iqk_path_a()
1179 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf7ff2); in rtl8710bu_rx_iqk_path_a()
1184 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_rx_iqk_path_a()
1186 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_rx_iqk_path_a()
1187 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_PAD_TXG); in rtl8710bu_rx_iqk_path_a()
1189 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, val32); in rtl8710bu_rx_iqk_path_a()
1194 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1196 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1201 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8710bu_rx_iqk_path_a()
1204 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c); in rtl8710bu_rx_iqk_path_a()
1205 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x18008c1c); in rtl8710bu_rx_iqk_path_a()
1207 rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x2816169f); in rtl8710bu_rx_iqk_path_a()
1210 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a911); in rtl8710bu_rx_iqk_path_a()
1213 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000); in rtl8710bu_rx_iqk_path_a()
1214 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8710bu_rx_iqk_path_a()
1219 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel_bb); in rtl8710bu_rx_iqk_path_a()
1224 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_rx_iqk_path_a()
1226 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_rx_iqk_path_a()
1228 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA); in rtl8710bu_rx_iqk_path_a()
1230 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, val32); in rtl8710bu_rx_iqk_path_a()
1233 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXM_IDAC, lok_result); in rtl8710bu_rx_iqk_path_a()
1236 reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2); in rtl8710bu_rx_iqk_path_a()
1237 reg_ea4 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_A_2); in rtl8710bu_rx_iqk_path_a()
1254 static void rtl8710bu_phy_iqcalibrate(struct rtl8xxxu_priv *priv, in rtl8710bu_phy_iqcalibrate() argument
1257 struct device *dev = &priv->udev->dev; in rtl8710bu_phy_iqcalibrate()
1288 rx_initial_gain = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8710bu_phy_iqcalibrate()
1292 rtl8xxxu_save_regs(priv, adda_regs, priv->adda_backup, in rtl8710bu_phy_iqcalibrate()
1294 rtl8xxxu_save_mac_regs(priv, iqk_mac_regs, priv->mac_backup); in rtl8710bu_phy_iqcalibrate()
1295 rtl8xxxu_save_regs(priv, iqk_bb_regs, in rtl8710bu_phy_iqcalibrate()
1296 priv->bb_backup, RTL8XXXU_BB_REGS); in rtl8710bu_phy_iqcalibrate()
1299 rtl8xxxu_path_adda_on(priv, adda_regs, true); in rtl8710bu_phy_iqcalibrate()
1302 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM1); in rtl8710bu_phy_iqcalibrate()
1303 priv->pi_enabled = u32_get_bits(val32, FPGA0_HSSI_PARM1_PI); in rtl8710bu_phy_iqcalibrate()
1306 if (!priv->pi_enabled) { in rtl8710bu_phy_iqcalibrate()
1308 rtl8xxxu_write32(priv, REG_FPGA0_XA_HSSI_PARM1, 0x01000100); in rtl8710bu_phy_iqcalibrate()
1309 rtl8xxxu_write32(priv, REG_FPGA0_XB_HSSI_PARM1, 0x01000100); in rtl8710bu_phy_iqcalibrate()
1313 val32 = rtl8xxxu_read32(priv, REG_TX_PTCL_CTRL); in rtl8710bu_phy_iqcalibrate()
1315 rtl8xxxu_write32(priv, REG_TX_PTCL_CTRL, val32); in rtl8710bu_phy_iqcalibrate()
1318 path_sel_bb = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH); in rtl8710bu_phy_iqcalibrate()
1319 path_sel_rf = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_S0S1); in rtl8710bu_phy_iqcalibrate()
1322 val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING); in rtl8710bu_phy_iqcalibrate()
1324 rtl8xxxu_write32(priv, REG_CCK0_AFE_SETTING, val32); in rtl8710bu_phy_iqcalibrate()
1325 rtl8xxxu_write32(priv, REG_RX_WAIT_CCA, 0x03c00010); in rtl8710bu_phy_iqcalibrate()
1326 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05601); in rtl8710bu_phy_iqcalibrate()
1327 rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000800e4); in rtl8710bu_phy_iqcalibrate()
1328 rtl8xxxu_write32(priv, REG_FPGA0_XCD_RF_SW_CTRL, 0x25204000); in rtl8710bu_phy_iqcalibrate()
1331 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_phy_iqcalibrate()
1333 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_phy_iqcalibrate()
1334 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8710bu_phy_iqcalibrate()
1335 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8710bu_phy_iqcalibrate()
1338 path_a_ok = rtl8710bu_iqk_path_a(priv, &lok_result); in rtl8710bu_phy_iqcalibrate()
1341 val32 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A); in rtl8710bu_phy_iqcalibrate()
1344 val32 = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A); in rtl8710bu_phy_iqcalibrate()
1354 path_a_ok = rtl8710bu_rx_iqk_path_a(priv, lok_result); in rtl8710bu_phy_iqcalibrate()
1357 val32 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_A_2); in rtl8710bu_phy_iqcalibrate()
1360 val32 = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2); in rtl8710bu_phy_iqcalibrate()
1373 val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK); in rtl8710bu_phy_iqcalibrate()
1375 rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32); in rtl8710bu_phy_iqcalibrate()
1381 rtl8xxxu_restore_regs(priv, adda_regs, priv->adda_backup, RTL8XXXU_ADDA_REGS); in rtl8710bu_phy_iqcalibrate()
1384 rtl8xxxu_restore_mac_regs(priv, iqk_mac_regs, priv->mac_backup); in rtl8710bu_phy_iqcalibrate()
1387 rtl8xxxu_restore_regs(priv, iqk_bb_regs, priv->bb_backup, RTL8XXXU_BB_REGS); in rtl8710bu_phy_iqcalibrate()
1390 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel_bb); in rtl8710bu_phy_iqcalibrate()
1391 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_S0S1, path_sel_rf); in rtl8710bu_phy_iqcalibrate()
1394 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8710bu_phy_iqcalibrate()
1396 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32); in rtl8710bu_phy_iqcalibrate()
1397 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8710bu_phy_iqcalibrate()
1399 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32); in rtl8710bu_phy_iqcalibrate()
1402 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x01008c00); in rtl8710bu_phy_iqcalibrate()
1403 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x01008c00); in rtl8710bu_phy_iqcalibrate()
1406 static void rtl8710bu_phy_iq_calibrate(struct rtl8xxxu_priv *priv) in rtl8710bu_phy_iq_calibrate() argument
1408 struct device *dev = &priv->udev->dev; in rtl8710bu_phy_iq_calibrate()
1418 path_sel_bb = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH); in rtl8710bu_phy_iq_calibrate()
1426 rtl8710bu_phy_iqcalibrate(priv, result, i); in rtl8710bu_phy_iq_calibrate()
1429 simu = rtl8xxxu_gen2_simularity_compare(priv, result, 0, 1); in rtl8710bu_phy_iq_calibrate()
1437 simu = rtl8xxxu_gen2_simularity_compare(priv, result, 0, 2); in rtl8710bu_phy_iq_calibrate()
1443 simu = rtl8xxxu_gen2_simularity_compare(priv, result, 1, 2); in rtl8710bu_phy_iq_calibrate()
1471 rtl8xxxu_fill_iqk_matrix_a(priv, path_a_ok, result, in rtl8710bu_phy_iq_calibrate()
1475 rtl8xxxu_save_regs(priv, rtl8xxxu_iqk_phy_iq_bb_reg, in rtl8710bu_phy_iq_calibrate()
1476 priv->bb_recovery_backup, RTL8XXXU_BB_REGS); in rtl8710bu_phy_iq_calibrate()
1478 rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel_bb); in rtl8710bu_phy_iq_calibrate()
1481 static int rtl8710b_emu_to_active(struct rtl8xxxu_priv *priv) in rtl8710b_emu_to_active() argument
1487 val8 = rtl8xxxu_read8(priv, 0x5d); in rtl8710b_emu_to_active()
1489 rtl8xxxu_write8(priv, 0x5d, val8); in rtl8710b_emu_to_active()
1491 val8 = rtl8xxxu_read8(priv, REG_SYS_FUNC_8710B); in rtl8710b_emu_to_active()
1493 rtl8xxxu_write8(priv, REG_SYS_FUNC_8710B, val8); in rtl8710b_emu_to_active()
1495 rtl8xxxu_write8(priv, 0x56, 0x0e); in rtl8710b_emu_to_active()
1497 val8 = rtl8xxxu_read8(priv, 0x20); in rtl8710b_emu_to_active()
1499 rtl8xxxu_write8(priv, 0x20, val8); in rtl8710b_emu_to_active()
1502 val8 = rtl8xxxu_read8(priv, 0x20); in rtl8710b_emu_to_active()
1515 static int rtl8710bu_active_to_emu(struct rtl8xxxu_priv *priv) in rtl8710bu_active_to_emu() argument
1522 val32 = rtl8xxxu_read32(priv, REG_SYS_FUNC_8710B); in rtl8710bu_active_to_emu()
1524 rtl8xxxu_write32(priv, REG_SYS_FUNC_8710B, val32); in rtl8710bu_active_to_emu()
1527 val32 = rtl8xxxu_read32(priv, REG_SYS_FUNC_8710B); in rtl8710bu_active_to_emu()
1529 rtl8xxxu_write32(priv, REG_SYS_FUNC_8710B, val32); in rtl8710bu_active_to_emu()
1532 val8 = rtl8xxxu_read8(priv, 0x20); in rtl8710bu_active_to_emu()
1534 rtl8xxxu_write8(priv, 0x20, val8); in rtl8710bu_active_to_emu()
1537 val8 = rtl8xxxu_read8(priv, 0x20); in rtl8710bu_active_to_emu()
1551 static int rtl8710bu_active_to_lps(struct rtl8xxxu_priv *priv) in rtl8710bu_active_to_lps() argument
1553 struct device *dev = &priv->udev->dev; in rtl8710bu_active_to_lps()
1560 rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff); in rtl8710bu_active_to_lps()
1568 val32 = rtl8xxxu_read32(priv, REG_SCH_TX_CMD); in rtl8710bu_active_to_lps()
1583 val8 = rtl8xxxu_read8(priv, REG_SYS_FUNC); in rtl8710bu_active_to_lps()
1585 rtl8xxxu_write8(priv, REG_SYS_FUNC, val8); in rtl8710bu_active_to_lps()
1590 val8 = rtl8xxxu_read8(priv, REG_SYS_FUNC); in rtl8710bu_active_to_lps()
1592 rtl8xxxu_write8(priv, REG_SYS_FUNC, val8); in rtl8710bu_active_to_lps()
1595 val16 = rtl8xxxu_read16(priv, REG_CR); in rtl8710bu_active_to_lps()
1599 rtl8xxxu_write16(priv, REG_CR, val16); in rtl8710bu_active_to_lps()
1602 val8 = rtl8xxxu_read8(priv, REG_DUAL_TSF_RST); in rtl8710bu_active_to_lps()
1604 rtl8xxxu_write8(priv, REG_DUAL_TSF_RST, val8); in rtl8710bu_active_to_lps()
1609 static int rtl8710bu_power_on(struct rtl8xxxu_priv *priv) in rtl8710bu_power_on() argument
1616 rtl8xxxu_write8(priv, REG_USB_ACCESS_TIMEOUT, 0x80); in rtl8710bu_power_on()
1618 val8 = rtl8xxxu_read8(priv, REG_SYS_ISO_CTRL); in rtl8710bu_power_on()
1620 rtl8xxxu_write8(priv, REG_SYS_ISO_CTRL, val8); in rtl8710bu_power_on()
1622 val8 = rtl8xxxu_read8(priv, REG_SYS_FUNC_8710B); in rtl8710bu_power_on()
1624 rtl8xxxu_write8(priv, REG_SYS_FUNC_8710B, val8); in rtl8710bu_power_on()
1626 val8 = rtl8xxxu_read8(priv, 0x20); in rtl8710bu_power_on()
1628 rtl8xxxu_write8(priv, 0x20, val8); in rtl8710bu_power_on()
1630 rtl8xxxu_write8(priv, REG_AFE_CTRL_8710B, 0); in rtl8710bu_power_on()
1632 val8 = rtl8xxxu_read8(priv, REG_WL_STATUS_8710B); in rtl8710bu_power_on()
1634 rtl8xxxu_write8(priv, REG_WL_STATUS_8710B, val8); in rtl8710bu_power_on()
1636 ret = rtl8710b_emu_to_active(priv); in rtl8710bu_power_on()
1640 rtl8xxxu_write16(priv, REG_CR, 0); in rtl8710bu_power_on()
1642 val16 = rtl8xxxu_read16(priv, REG_CR); in rtl8710bu_power_on()
1648 rtl8xxxu_write16(priv, REG_CR, val16); in rtl8710bu_power_on()
1651 val8 = rtl8xxxu_read8(priv, REG_HWSEQ_CTRL); in rtl8710bu_power_on()
1653 rtl8xxxu_write8(priv, REG_HWSEQ_CTRL, val8); in rtl8710bu_power_on()
1663 val8 = rtl8xxxu_read8(priv, 0xfef9); in rtl8710bu_power_on()
1665 rtl8xxxu_write8(priv, 0xfef9, val8); in rtl8710bu_power_on()
1668 val32 = rtl8710b_read_syson_reg(priv, 0x138); in rtl8710bu_power_on()
1670 rtl8710b_write_syson_reg(priv, 0x138, val32); in rtl8710bu_power_on()
1675 static void rtl8710bu_power_off(struct rtl8xxxu_priv *priv) in rtl8710bu_power_off() argument
1680 rtl8xxxu_flush_fifo(priv); in rtl8710bu_power_off()
1682 rtl8xxxu_write32(priv, REG_HISR0_8710B, 0xffffffff); in rtl8710bu_power_off()
1683 rtl8xxxu_write32(priv, REG_HIMR0_8710B, 0x0); in rtl8710bu_power_off()
1686 val32 = rtl8710b_read_syson_reg(priv, 0x138); in rtl8710bu_power_off()
1688 rtl8710b_write_syson_reg(priv, 0x138, val32); in rtl8710bu_power_off()
1691 rtl8xxxu_write8(priv, REG_CR, 0x00); in rtl8710bu_power_off()
1693 rtl8710bu_active_to_lps(priv); in rtl8710bu_power_off()
1696 val8 = rtl8xxxu_read8(priv, REG_8051FW_CTRL_V1_8710B + 3); in rtl8710bu_power_off()
1698 rtl8xxxu_write8(priv, REG_8051FW_CTRL_V1_8710B + 3, val8); in rtl8710bu_power_off()
1701 rtl8xxxu_write8(priv, REG_8051FW_CTRL_V1_8710B, 0x00); in rtl8710bu_power_off()
1703 rtl8710bu_active_to_emu(priv); in rtl8710bu_power_off()
1706 static void rtl8710b_reset_8051(struct rtl8xxxu_priv *priv) in rtl8710b_reset_8051() argument
1710 val8 = rtl8xxxu_read8(priv, REG_8051FW_CTRL_V1_8710B + 3); in rtl8710b_reset_8051()
1712 rtl8xxxu_write8(priv, REG_8051FW_CTRL_V1_8710B + 3, val8); in rtl8710b_reset_8051()
1716 val8 = rtl8xxxu_read8(priv, REG_8051FW_CTRL_V1_8710B + 3); in rtl8710b_reset_8051()
1718 rtl8xxxu_write8(priv, REG_8051FW_CTRL_V1_8710B + 3, val8); in rtl8710b_reset_8051()
1721 static void rtl8710b_enable_rf(struct rtl8xxxu_priv *priv) in rtl8710b_enable_rf() argument
1725 rtl8xxxu_write8(priv, REG_RF_CTRL, RF_ENABLE | RF_RSTB | RF_SDMRSTB); in rtl8710b_enable_rf()
1727 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8710b_enable_rf()
1730 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8710b_enable_rf()
1732 rtl8xxxu_write8(priv, REG_TXPAUSE, 0x00); in rtl8710b_enable_rf()
1735 static void rtl8710b_disable_rf(struct rtl8xxxu_priv *priv) in rtl8710b_disable_rf() argument
1739 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8710b_disable_rf()
1741 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8710b_disable_rf()
1744 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_AC, 0); in rtl8710b_disable_rf()
1747 static void rtl8710b_usb_quirks(struct rtl8xxxu_priv *priv) in rtl8710b_usb_quirks() argument
1751 rtl8xxxu_gen2_usb_quirks(priv); in rtl8710b_usb_quirks()
1753 val16 = rtl8xxxu_read16(priv, REG_CR); in rtl8710b_usb_quirks()
1755 rtl8xxxu_write16(priv, REG_CR, val16); in rtl8710b_usb_quirks()
1761 static void rtl8710b_set_crystal_cap(struct rtl8xxxu_priv *priv, u8 crystal_cap) in rtl8710b_set_crystal_cap() argument
1763 struct rtl8xxxu_cfo_tracking *cfo = &priv->cfo_tracking; in rtl8710b_set_crystal_cap()
1769 val32 = rtl8710b_read_syson_reg(priv, REG_SYS_XTAL_CTRL0_8710B); in rtl8710b_set_crystal_cap()
1771 dev_dbg(&priv->udev->dev, in rtl8710b_set_crystal_cap()
1781 rtl8710b_write_syson_reg(priv, REG_SYS_XTAL_CTRL0_8710B, val32); in rtl8710b_set_crystal_cap()
1786 static s8 rtl8710b_cck_rssi(struct rtl8xxxu_priv *priv, struct rtl8723au_phy_stats *phy_stats) in rtl8710b_cck_rssi() argument