Lines Matching +full:efuse +full:- +full:settings
1 // SPDX-License-Identifier: GPL-2.0-only
3 * RTL8XXXU mac80211 USB driver - 8188f specific subdriver
8 * Copyright (c) 2014 - 2017 Jes Sorensen <Jes.Sorensen@gmail.com>
11 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
310 struct device *dev = &priv->udev->dev; in rtl8188fu_identify_chip()
314 strscpy(priv->chip_name, "8188FU", sizeof(priv->chip_name)); in rtl8188fu_identify_chip()
315 priv->rtl_chip = RTL8188F; in rtl8188fu_identify_chip()
316 priv->rf_paths = 1; in rtl8188fu_identify_chip()
317 priv->rx_paths = 1; in rtl8188fu_identify_chip()
318 priv->tx_paths = 1; in rtl8188fu_identify_chip()
319 priv->has_wifi = 1; in rtl8188fu_identify_chip()
322 priv->chip_cut = u32_get_bits(sys_cfg, SYS_CFG_CHIP_VERSION_MASK); in rtl8188fu_identify_chip()
325 ret = -ENOTSUPP; in rtl8188fu_identify_chip()
366 cck = priv->cck_tx_power_index_A[cck_group]; in rtl8188f_set_tx_power()
378 ofdmbase = priv->ht40_1s_tx_power_index_A[group]; in rtl8188f_set_tx_power()
379 ofdmbase += priv->ofdm_tx_power_diff[0].a; in rtl8188f_set_tx_power()
385 mcsbase = priv->ht40_1s_tx_power_index_A[group]; in rtl8188f_set_tx_power()
387 /* This diff is always 0 - not used in 8188FU. */ in rtl8188f_set_tx_power()
388 mcsbase += priv->ht40_tx_power_diff[0].a; in rtl8188f_set_tx_power()
390 mcsbase += priv->ht20_tx_power_diff[0].a; in rtl8188f_set_tx_power()
466 /* disable 3-wire */ in rtl8188f_spur_calibration()
482 /* enable 3-wire */ in rtl8188f_spur_calibration()
516 struct rtl8xxxu_priv *priv = hw->priv; in rtl8188fu_config_channel()
521 channel = (u8)hw->conf.chandef.chan->hw_value; in rtl8188fu_config_channel()
535 val32 |= hw->conf.chandef.width == NL80211_CHAN_WIDTH_40; in rtl8188fu_config_channel()
540 val32 |= hw->conf.chandef.width == NL80211_CHAN_WIDTH_40; in rtl8188fu_config_channel()
578 if (hw->conf.chandef.width == NL80211_CHAN_WIDTH_20 || in rtl8188fu_config_channel()
579 hw->conf.chandef.width == NL80211_CHAN_WIDTH_20_NOHT) in rtl8188fu_config_channel()
581 else if (hw->conf.chandef.width == NL80211_CHAN_WIDTH_40) in rtl8188fu_config_channel()
585 if (hw->conf.chandef.width == NL80211_CHAN_WIDTH_40) { in rtl8188fu_config_channel()
586 if (hw->conf.chandef.center_freq1 > in rtl8188fu_config_channel()
587 hw->conf.chandef.chan->center_freq) { in rtl8188fu_config_channel()
592 channel -= 2; in rtl8188fu_config_channel()
618 if (hw->conf.chandef.width == NL80211_CHAN_WIDTH_20 || in rtl8188fu_config_channel()
619 hw->conf.chandef.width == NL80211_CHAN_WIDTH_20_NOHT) in rtl8188fu_config_channel()
621 else if (hw->conf.chandef.width == NL80211_CHAN_WIDTH_40) in rtl8188fu_config_channel()
626 if (hw->conf.chandef.width == NL80211_CHAN_WIDTH_20 || in rtl8188fu_config_channel()
627 hw->conf.chandef.width == NL80211_CHAN_WIDTH_20_NOHT) in rtl8188fu_config_channel()
629 else if (hw->conf.chandef.width == NL80211_CHAN_WIDTH_40) in rtl8188fu_config_channel()
633 if (hw->conf.chandef.width == NL80211_CHAN_WIDTH_20 || in rtl8188fu_config_channel()
634 hw->conf.chandef.width == NL80211_CHAN_WIDTH_20_NOHT) in rtl8188fu_config_channel()
636 else if (hw->conf.chandef.width == NL80211_CHAN_WIDTH_40) in rtl8188fu_config_channel()
706 struct rtl8188fu_efuse *efuse = &priv->efuse_wifi.efuse8188fu; in rtl8188fu_parse_efuse() local
709 if (efuse->rtl_id != cpu_to_le16(0x8129)) in rtl8188fu_parse_efuse()
710 return -EINVAL; in rtl8188fu_parse_efuse()
712 ether_addr_copy(priv->mac_addr, efuse->mac_addr); in rtl8188fu_parse_efuse()
714 memcpy(priv->cck_tx_power_index_A, efuse->tx_power_index_A.cck_base, in rtl8188fu_parse_efuse()
715 sizeof(efuse->tx_power_index_A.cck_base)); in rtl8188fu_parse_efuse()
717 memcpy(priv->ht40_1s_tx_power_index_A, in rtl8188fu_parse_efuse()
718 efuse->tx_power_index_A.ht40_base, in rtl8188fu_parse_efuse()
719 sizeof(efuse->tx_power_index_A.ht40_base)); in rtl8188fu_parse_efuse()
721 for (i = 0; i < ARRAY_SIZE(priv->cck_tx_power_index_A); i++) { in rtl8188fu_parse_efuse()
722 if (priv->cck_tx_power_index_A[i] > TX_POWER_INDEX_MAX) in rtl8188fu_parse_efuse()
723 priv->cck_tx_power_index_A[i] = TX_POWER_INDEX_DEFAULT_CCK; in rtl8188fu_parse_efuse()
726 for (i = 0; i < ARRAY_SIZE(priv->ht40_1s_tx_power_index_A); i++) { in rtl8188fu_parse_efuse()
727 if (priv->ht40_1s_tx_power_index_A[i] > TX_POWER_INDEX_MAX) in rtl8188fu_parse_efuse()
728 priv->ht40_1s_tx_power_index_A[i] = TX_POWER_INDEX_DEFAULT_HT40; in rtl8188fu_parse_efuse()
731 priv->ofdm_tx_power_diff[0].a = efuse->tx_power_index_A.ht20_ofdm_1s_diff.a; in rtl8188fu_parse_efuse()
732 priv->ht20_tx_power_diff[0].a = efuse->tx_power_index_A.ht20_ofdm_1s_diff.b; in rtl8188fu_parse_efuse()
734 priv->default_crystal_cap = efuse->xtal_k & 0x3f; in rtl8188fu_parse_efuse()
782 if (priv->chip_cut == 1) in rtl8188fu_init_phy_rf()
822 dev_warn(&priv->udev->dev, "LC calibration timed out.\n"); in rtl8188f_phy_lc_calibrate()
865 /* path-A IQK setting */ in rtl8188fu_iqk_path_a()
946 /* path-A IQK setting */ in rtl8188fu_rx_iqk_path_a()
1020 /* path-A IQK setting */ in rtl8188fu_rx_iqk_path_a()
1064 struct device *dev = &priv->udev->dev; in rtl8188fu_phy_iqcalibrate()
1099 rtl8xxxu_save_regs(priv, adda_regs, priv->adda_backup, in rtl8188fu_phy_iqcalibrate()
1101 rtl8xxxu_save_mac_regs(priv, iqk_mac_regs, priv->mac_backup); in rtl8188fu_phy_iqcalibrate()
1103 priv->bb_backup, RTL8XXXU_BB_REGS); in rtl8188fu_phy_iqcalibrate()
1110 priv->pi_enabled = u32_get_bits(val32, FPGA0_HSSI_PARM1_PI); in rtl8188fu_phy_iqcalibrate()
1122 /* MAC settings */ in rtl8188fu_phy_iqcalibrate()
1178 if (!priv->pi_enabled) { in rtl8188fu_phy_iqcalibrate()
1189 rtl8xxxu_restore_regs(priv, adda_regs, priv->adda_backup, in rtl8188fu_phy_iqcalibrate()
1193 rtl8xxxu_restore_mac_regs(priv, iqk_mac_regs, priv->mac_backup); in rtl8188fu_phy_iqcalibrate()
1197 priv->bb_backup, RTL8XXXU_BB_REGS); in rtl8188fu_phy_iqcalibrate()
1220 struct device *dev = &priv->udev->dev; in rtl8188fu_phy_iq_calibrate()
1235 candidate = -1; in rtl8188fu_phy_iq_calibrate()
1267 candidate = -1; in rtl8188fu_phy_iq_calibrate()
1285 priv->rege94 = reg_e94; in rtl8188fu_phy_iq_calibrate()
1287 priv->rege9c = reg_e9c; in rtl8188fu_phy_iq_calibrate()
1291 priv->regeb4 = reg_eb4; in rtl8188fu_phy_iq_calibrate()
1293 priv->regebc = reg_ebc; in rtl8188fu_phy_iq_calibrate()
1303 reg_e94 = reg_eb4 = priv->rege94 = priv->regeb4 = 0x100; in rtl8188fu_phy_iq_calibrate()
1304 reg_e9c = reg_ebc = priv->rege9c = priv->regebc = 0x0; in rtl8188fu_phy_iq_calibrate()
1312 priv->bb_recovery_backup, RTL8XXXU_BB_REGS); in rtl8188fu_phy_iq_calibrate()
1345 for (count = RTL8XXXU_MAX_REG_POLL; count; count--) { in rtl8188f_emu_to_active()
1354 ret = -EBUSY; in rtl8188f_emu_to_active()
1373 for (count = RTL8XXXU_MAX_REG_POLL; count; count--) { in rtl8188f_emu_to_active()
1383 ret = -EBUSY; in rtl8188f_emu_to_active()
1415 for (count = RTL8XXXU_MAX_REG_POLL; count; count--) { in rtl8188fu_active_to_emu()
1425 ret = -EBUSY; in rtl8188fu_active_to_emu()
1453 struct device *dev = &priv->udev->dev; in rtl8188fu_active_to_lps()
1468 retval = -EBUSY; in rtl8188fu_active_to_lps()
1479 } while (retry--); in rtl8188fu_active_to_lps()
1483 retval = -EBUSY; in rtl8188fu_active_to_lps()
1588 /* Somehow this is not found in the efuse we read earlier. */ in rtl8188f_enable_rf()
1599 bb_gain = -(bb_gain >> 1); in rtl8188f_enable_rf()
1652 struct rtl8xxxu_cfo_tracking *cfo = &priv->cfo_tracking; in rtl8188f_set_crystal_cap()
1655 if (crystal_cap == cfo->crystal_cap) in rtl8188f_set_crystal_cap()
1660 dev_dbg(&priv->udev->dev, in rtl8188f_set_crystal_cap()
1663 cfo->crystal_cap, in rtl8188f_set_crystal_cap()
1673 cfo->crystal_cap = crystal_cap; in rtl8188f_set_crystal_cap()
1678 u8 cck_agc_rpt = phy_stats->cck_agc_rpt_ofdm_cfosho_a; in rtl8188f_cck_rssi()
1688 rx_pwr_all = -100 + 2 * (27 - vga_idx); in rtl8188f_cck_rssi()
1690 rx_pwr_all = -100; in rtl8188f_cck_rssi()
1693 rx_pwr_all = -74 + 2 * (21 - vga_idx); in rtl8188f_cck_rssi()
1696 rx_pwr_all = -60 + 2 * (20 - vga_idx); in rtl8188f_cck_rssi()
1699 rx_pwr_all = -44 + 2 * (19 - vga_idx); in rtl8188f_cck_rssi()