Lines Matching +full:0 +full:x05100000
18 {0x024, 0xDF}, {0x025, 0x07}, {0x02B, 0x1C}, {0x283, 0x20},
19 {0x421, 0x0F}, {0x428, 0x0A}, {0x429, 0x10}, {0x430, 0x00},
20 {0x431, 0x00}, {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04},
21 {0x435, 0x05}, {0x436, 0x07}, {0x437, 0x08}, {0x43C, 0x04},
22 {0x43D, 0x05}, {0x43E, 0x07}, {0x43F, 0x08}, {0x440, 0x5D},
23 {0x441, 0x01}, {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00},
24 {0x446, 0x00}, {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xF0},
25 {0x44A, 0x0F}, {0x44B, 0x3E}, {0x44C, 0x10}, {0x44D, 0x00},
26 {0x44E, 0x00}, {0x44F, 0x00}, {0x450, 0x00}, {0x451, 0xF0},
27 {0x452, 0x0F}, {0x453, 0x00}, {0x456, 0x5E}, {0x460, 0x44},
28 {0x461, 0x44}, {0x4BC, 0xC0}, {0x4C8, 0xFF}, {0x4C9, 0x08},
29 {0x4CC, 0xFF}, {0x4CD, 0xFF}, {0x4CE, 0x01}, {0x500, 0x26},
30 {0x501, 0xA2}, {0x502, 0x2F}, {0x503, 0x00}, {0x504, 0x28},
31 {0x505, 0xA3}, {0x506, 0x5E}, {0x507, 0x00}, {0x508, 0x2B},
32 {0x509, 0xA4}, {0x50A, 0x5E}, {0x50B, 0x00}, {0x50C, 0x4F},
33 {0x50D, 0xA4}, {0x50E, 0x00}, {0x50F, 0x00}, {0x512, 0x1C},
34 {0x514, 0x0A}, {0x516, 0x0A}, {0x525, 0x4F}, {0x550, 0x10},
35 {0x551, 0x10}, {0x559, 0x02}, {0x55C, 0x28}, {0x55D, 0xFF},
36 {0x605, 0x30}, {0x608, 0x0E}, {0x609, 0x2A}, {0x620, 0xFF},
37 {0x621, 0xFF}, {0x622, 0xFF}, {0x623, 0xFF}, {0x624, 0xFF},
38 {0x625, 0xFF}, {0x626, 0xFF}, {0x627, 0xFF}, {0x638, 0x28},
39 {0x63C, 0x0A}, {0x63D, 0x0A}, {0x63E, 0x0E}, {0x63F, 0x0E},
40 {0x640, 0x40}, {0x642, 0x40}, {0x643, 0x00}, {0x652, 0xC8},
41 {0x66E, 0x05}, {0x700, 0x21}, {0x701, 0x43}, {0x702, 0x65},
42 {0x703, 0x87}, {0x708, 0x21}, {0x709, 0x43}, {0x70A, 0x65},
43 {0x70B, 0x87},
44 {0xffff, 0xff},
48 {0x800, 0x80045700}, {0x804, 0x00000001},
49 {0x808, 0x0000FC00}, {0x80C, 0x0000000A},
50 {0x810, 0x10001331}, {0x814, 0x020C3D10},
51 {0x818, 0x00200385}, {0x81C, 0x00000000},
52 {0x820, 0x01000100}, {0x824, 0x00390204},
53 {0x828, 0x00000000}, {0x82C, 0x00000000},
54 {0x830, 0x00000000}, {0x834, 0x00000000},
55 {0x838, 0x00000000}, {0x83C, 0x00000000},
56 {0x840, 0x00010000}, {0x844, 0x00000000},
57 {0x848, 0x00000000}, {0x84C, 0x00000000},
58 {0x850, 0x00030000}, {0x854, 0x00000000},
59 {0x858, 0x569A569A}, {0x85C, 0x569A569A},
60 {0x860, 0x00000130}, {0x864, 0x00000000},
61 {0x868, 0x00000000}, {0x86C, 0x27272700},
62 {0x870, 0x00000000}, {0x874, 0x25004000},
63 {0x878, 0x00000808}, {0x87C, 0x004F0201},
64 {0x880, 0xB0000B1E}, {0x884, 0x00000007},
65 {0x888, 0x00000000}, {0x88C, 0xCCC000C0},
66 {0x890, 0x00000800}, {0x894, 0xFFFFFFFE},
67 {0x898, 0x40302010}, {0x89C, 0x00706050},
68 {0x900, 0x00000000}, {0x904, 0x00000023},
69 {0x908, 0x00000000}, {0x90C, 0x81121111},
70 {0x910, 0x00000002}, {0x914, 0x00000201},
71 {0x948, 0x99000000}, {0x94C, 0x00000010},
72 {0x950, 0x20003000}, {0x954, 0x4A880000},
73 {0x958, 0x4BC5D87A}, {0x95C, 0x04EB9B79},
74 {0x96C, 0x00000003}, {0xA00, 0x00D047C8},
75 {0xA04, 0x80FF800C}, {0xA08, 0x8C898300},
76 {0xA0C, 0x2E7F120F}, {0xA10, 0x9500BB78},
77 {0xA14, 0x1114D028}, {0xA18, 0x00881117},
78 {0xA1C, 0x89140F00}, {0xA20, 0xD1D80000},
79 {0xA24, 0x5A7DA0BD}, {0xA28, 0x0000223B},
80 {0xA2C, 0x00D30000}, {0xA70, 0x101FBF00},
81 {0xA74, 0x00000007}, {0xA78, 0x00000900},
82 {0xA7C, 0x225B0606}, {0xA80, 0x218075B1},
83 {0xA84, 0x00120000}, {0xA88, 0x040C0000},
84 {0xA8C, 0x12345678}, {0xA90, 0xABCDEF00},
85 {0xA94, 0x001B1B89}, {0xA98, 0x05100000},
86 {0xA9C, 0x3F000000}, {0xAA0, 0x00000000},
87 {0xB2C, 0x00000000}, {0xC00, 0x48071D40},
88 {0xC04, 0x03A05611}, {0xC08, 0x000000E4},
89 {0xC0C, 0x6C6C6C6C}, {0xC10, 0x18800000},
90 {0xC14, 0x40000100}, {0xC18, 0x08800000},
91 {0xC1C, 0x40000100}, {0xC20, 0x00000000},
92 {0xC24, 0x00000000}, {0xC28, 0x00000000},
93 {0xC2C, 0x00000000}, {0xC30, 0x69E9CC4A},
94 {0xC34, 0x31000040}, {0xC38, 0x21688080},
95 {0xC3C, 0x00001714}, {0xC40, 0x1F78403F},
96 {0xC44, 0x00010036}, {0xC48, 0xEC020107},
97 {0xC4C, 0x007F037F}, {0xC50, 0x69553420},
98 {0xC54, 0x43BC0094}, {0xC58, 0x00013169},
99 {0xC5C, 0x00250492}, {0xC60, 0x00000000},
100 {0xC64, 0x7112848B}, {0xC68, 0x47C07BFF},
101 {0xC6C, 0x00000036}, {0xC70, 0x2C7F000D},
102 {0xC74, 0x020600DB}, {0xC78, 0x0000001F},
103 {0xC7C, 0x00B91612}, {0xC80, 0x390000E4},
104 {0xC84, 0x11F60000},
105 {0xC88, 0x40000100}, {0xC8C, 0x20200000},
106 {0xC90, 0x00091521}, {0xC94, 0x00000000},
107 {0xC98, 0x00121820}, {0xC9C, 0x00007F7F},
108 {0xCA0, 0x00000000}, {0xCA4, 0x000300A0},
109 {0xCA8, 0x00000000}, {0xCAC, 0x00000000},
110 {0xCB0, 0x00000000}, {0xCB4, 0x00000000},
111 {0xCB8, 0x00000000}, {0xCBC, 0x28000000},
112 {0xCC0, 0x00000000}, {0xCC4, 0x00000000},
113 {0xCC8, 0x00000000}, {0xCCC, 0x00000000},
114 {0xCD0, 0x00000000}, {0xCD4, 0x00000000},
115 {0xCD8, 0x64B22427}, {0xCDC, 0x00766932},
116 {0xCE0, 0x00222222}, {0xCE4, 0x10000000},
117 {0xCE8, 0x37644302}, {0xCEC, 0x2F97D40C},
118 {0xD00, 0x04030740}, {0xD04, 0x40020401},
119 {0xD08, 0x0000907F}, {0xD0C, 0x20010201},
120 {0xD10, 0xA0633333}, {0xD14, 0x3333BC53},
121 {0xD18, 0x7A8F5B6F}, {0xD2C, 0xCB979975},
122 {0xD30, 0x00000000}, {0xD34, 0x80608000},
123 {0xD38, 0x98000000}, {0xD3C, 0x40127353},
124 {0xD40, 0x00000000}, {0xD44, 0x00000000},
125 {0xD48, 0x00000000}, {0xD4C, 0x00000000},
126 {0xD50, 0x6437140A}, {0xD54, 0x00000000},
127 {0xD58, 0x00000282}, {0xD5C, 0x30032064},
128 {0xD60, 0x4653DE68}, {0xD64, 0x04518A3C},
129 {0xD68, 0x00002101}, {0xD6C, 0x2A201C16},
130 {0xD70, 0x1812362E}, {0xD74, 0x322C2220},
131 {0xD78, 0x000E3C24}, {0xE00, 0x2D2D2D2D},
132 {0xE04, 0x2D2D2D2D}, {0xE08, 0x0390272D},
133 {0xE10, 0x2D2D2D2D}, {0xE14, 0x2D2D2D2D},
134 {0xE18, 0x2D2D2D2D}, {0xE1C, 0x2D2D2D2D},
135 {0xE28, 0x00000000}, {0xE30, 0x1000DC1F},
136 {0xE34, 0x10008C1F}, {0xE38, 0x02140102},
137 {0xE3C, 0x681604C2}, {0xE40, 0x01007C00},
138 {0xE44, 0x01004800}, {0xE48, 0xFB000000},
139 {0xE4C, 0x000028D1}, {0xE50, 0x1000DC1F},
140 {0xE54, 0x10008C1F}, {0xE58, 0x02140102},
141 {0xE5C, 0x28160D05}, {0xE60, 0x00000008},
142 {0xE60, 0x021400A0}, {0xE64, 0x281600A0},
143 {0xE6C, 0x01C00010}, {0xE70, 0x01C00010},
144 {0xE74, 0x02000010}, {0xE78, 0x02000010},
145 {0xE7C, 0x02000010}, {0xE80, 0x02000010},
146 {0xE84, 0x01C00010}, {0xE88, 0x02000010},
147 {0xE8C, 0x01C00010}, {0xED0, 0x01C00010},
148 {0xED4, 0x01C00010}, {0xED8, 0x01C00010},
149 {0xEDC, 0x00000010}, {0xEE0, 0x00000010},
150 {0xEEC, 0x03C00010}, {0xF14, 0x00000003},
151 {0xF4C, 0x00000000}, {0xF00, 0x00000300},
152 {0xffff, 0xffffffff},
156 {0xC78, 0xFC000001}, {0xC78, 0xFB010001},
157 {0xC78, 0xFA020001}, {0xC78, 0xF9030001},
158 {0xC78, 0xF8040001}, {0xC78, 0xF7050001},
159 {0xC78, 0xF6060001}, {0xC78, 0xF5070001},
160 {0xC78, 0xF4080001}, {0xC78, 0xF3090001},
161 {0xC78, 0xF20A0001}, {0xC78, 0xF10B0001},
162 {0xC78, 0xF00C0001}, {0xC78, 0xEF0D0001},
163 {0xC78, 0xEE0E0001}, {0xC78, 0xED0F0001},
164 {0xC78, 0xEC100001}, {0xC78, 0xEB110001},
165 {0xC78, 0xEA120001}, {0xC78, 0xE9130001},
166 {0xC78, 0xE8140001}, {0xC78, 0xE7150001},
167 {0xC78, 0xE6160001}, {0xC78, 0xE5170001},
168 {0xC78, 0xE4180001}, {0xC78, 0xE3190001},
169 {0xC78, 0xE21A0001}, {0xC78, 0xE11B0001},
170 {0xC78, 0xE01C0001}, {0xC78, 0xC21D0001},
171 {0xC78, 0xC11E0001}, {0xC78, 0xC01F0001},
172 {0xC78, 0xA5200001}, {0xC78, 0xA4210001},
173 {0xC78, 0xA3220001}, {0xC78, 0xA2230001},
174 {0xC78, 0xA1240001}, {0xC78, 0xA0250001},
175 {0xC78, 0x65260001}, {0xC78, 0x64270001},
176 {0xC78, 0x63280001}, {0xC78, 0x62290001},
177 {0xC78, 0x612A0001}, {0xC78, 0x442B0001},
178 {0xC78, 0x432C0001}, {0xC78, 0x422D0001},
179 {0xC78, 0x412E0001}, {0xC78, 0x402F0001},
180 {0xC78, 0x21300001}, {0xC78, 0x20310001},
181 {0xC78, 0x05320001}, {0xC78, 0x04330001},
182 {0xC78, 0x03340001}, {0xC78, 0x02350001},
183 {0xC78, 0x01360001}, {0xC78, 0x00370001},
184 {0xC78, 0x00380001}, {0xC78, 0x00390001},
185 {0xC78, 0x003A0001}, {0xC78, 0x003B0001},
186 {0xC78, 0x003C0001}, {0xC78, 0x003D0001},
187 {0xC78, 0x003E0001}, {0xC78, 0x003F0001},
188 {0xC50, 0x69553422}, {0xC50, 0x69553420},
189 {0xffff, 0xffffffff}
193 {0x00, 0x00030000}, {0x08, 0x00008400},
194 {0x18, 0x00000407}, {0x19, 0x00000012},
195 {0x1B, 0x00001C6C},
196 {0x1E, 0x00080009}, {0x1F, 0x00000880},
197 {0x2F, 0x0001A060}, {0x3F, 0x00028000},
198 {0x42, 0x000060C0}, {0x57, 0x000D0000},
199 {0x58, 0x000C0160}, {0x67, 0x00001552},
200 {0x83, 0x00000000}, {0xB0, 0x000FF9F0},
201 {0xB1, 0x00022218}, {0xB2, 0x00034C00},
202 {0xB4, 0x0004484B}, {0xB5, 0x0000112A},
203 {0xB6, 0x0000053E}, {0xB7, 0x00010408},
204 {0xB8, 0x00010200}, {0xB9, 0x00080001},
205 {0xBA, 0x00040001}, {0xBB, 0x00000400},
206 {0xBF, 0x000C0000}, {0xC2, 0x00002400},
207 {0xC3, 0x00000009}, {0xC4, 0x00040C91},
208 {0xC5, 0x00099999}, {0xC6, 0x000000A3},
209 {0xC7, 0x0008F820}, {0xC8, 0x00076C06},
210 {0xC9, 0x00000000}, {0xCA, 0x00080000},
211 {0xDF, 0x00000180}, {0xEF, 0x000001A0},
212 {0x51, 0x000E8333}, {0x52, 0x000FAC2C},
213 {0x53, 0x00000103}, {0x56, 0x000517F0},
214 {0x35, 0x00000099}, {0x35, 0x00000199},
215 {0x35, 0x00000299}, {0x36, 0x00000064},
216 {0x36, 0x00008064}, {0x36, 0x00010064},
217 {0x36, 0x00018064}, {0x18, 0x00000C07},
218 {0x5A, 0x00048000}, {0x19, 0x000739D0},
219 {0x34, 0x0000ADD6}, {0x34, 0x00009DD3},
220 {0x34, 0x00008CF4}, {0x34, 0x00007CF1},
221 {0x34, 0x00006CEE}, {0x34, 0x00005CEB},
222 {0x34, 0x00004CCE}, {0x34, 0x00003CCB},
223 {0x34, 0x00002CC8}, {0x34, 0x00001C4B},
224 {0x34, 0x00000C48},
225 {0x00, 0x00030159}, {0x84, 0x00048000},
226 {0x86, 0x0000002A}, {0x87, 0x00000025},
227 {0x8E, 0x00065540}, {0x8F, 0x00088000},
228 {0xEF, 0x000020A0}, {0x3B, 0x000F0F00},
229 {0x3B, 0x000E0B00}, {0x3B, 0x000D0900},
230 {0x3B, 0x000C0700}, {0x3B, 0x000B0600},
231 {0x3B, 0x000A0400}, {0x3B, 0x00090200},
232 {0x3B, 0x00080000}, {0x3B, 0x0007BF00},
233 {0x3B, 0x00060B00}, {0x3B, 0x0005C900},
234 {0x3B, 0x00040700}, {0x3B, 0x00030600},
235 {0x3B, 0x0002D500}, {0x3B, 0x00010200},
236 {0x3B, 0x0000E000}, {0xEF, 0x000000A0},
237 {0xEF, 0x00000010}, {0x3B, 0x0000C0A8},
238 {0x3B, 0x00010400}, {0xEF, 0x00000000},
239 {0xEF, 0x00080000}, {0x30, 0x00010000},
240 {0x31, 0x0000000F}, {0x32, 0x00007EFE},
241 {0xEF, 0x00000000}, {0x00, 0x00010159},
242 {0x18, 0x0000FC07}, {0xFE, 0x00000000},
243 {0xFE, 0x00000000}, {0x1F, 0x00080003},
244 {0xFE, 0x00000000}, {0xFE, 0x00000000},
245 {0x1E, 0x00000001}, {0x1F, 0x00080000},
246 {0x00, 0x00033D95},
247 {0xff, 0xffffffff}
251 {0x00, 0x00030000}, {0x08, 0x00008400},
252 {0x18, 0x00000407}, {0x19, 0x00000012},
253 {0x1B, 0x00001C6C},
254 {0x1E, 0x00080009}, {0x1F, 0x00000880},
255 {0x2F, 0x0001A060}, {0x3F, 0x00028000},
256 {0x42, 0x000060C0}, {0x57, 0x000D0000},
257 {0x58, 0x000C0160}, {0x67, 0x00001552},
258 {0x83, 0x00000000}, {0xB0, 0x000FF9F0},
259 {0xB1, 0x00022218}, {0xB2, 0x00034C00},
260 {0xB4, 0x0004484B}, {0xB5, 0x0000112A},
261 {0xB6, 0x0000053E}, {0xB7, 0x00010408},
262 {0xB8, 0x00010200}, {0xB9, 0x00080001},
263 {0xBA, 0x00040001}, {0xBB, 0x00000400},
264 {0xBF, 0x000C0000}, {0xC2, 0x00002400},
265 {0xC3, 0x00000009}, {0xC4, 0x00040C91},
266 {0xC5, 0x00099999}, {0xC6, 0x000000A3},
267 {0xC7, 0x0008F820}, {0xC8, 0x00076C06},
268 {0xC9, 0x00000000}, {0xCA, 0x00080000},
269 {0xDF, 0x00000180}, {0xEF, 0x000001A0},
270 {0x51, 0x000E8231}, {0x52, 0x000FAC2C},
271 {0x53, 0x00000141}, {0x56, 0x000517F0},
272 {0x35, 0x00000090}, {0x35, 0x00000190},
273 {0x35, 0x00000290}, {0x36, 0x00001064},
274 {0x36, 0x00009064}, {0x36, 0x00011064},
275 {0x36, 0x00019064}, {0x18, 0x00000C07},
276 {0x5A, 0x00048000}, {0x19, 0x000739D0},
277 {0x34, 0x0000ADD2}, {0x34, 0x00009DD0},
278 {0x34, 0x00008CF3}, {0x34, 0x00007CF0},
279 {0x34, 0x00006CED}, {0x34, 0x00005CD2},
280 {0x34, 0x00004CCF}, {0x34, 0x00003CCC},
281 {0x34, 0x00002CC9}, {0x34, 0x00001C4C},
282 {0x34, 0x00000C49},
283 {0x00, 0x00030159}, {0x84, 0x00048000},
284 {0x86, 0x0000002A}, {0x87, 0x00000025},
285 {0x8E, 0x00065540}, {0x8F, 0x00088000},
286 {0xEF, 0x000020A0}, {0x3B, 0x000F0F00},
287 {0x3B, 0x000E0B00}, {0x3B, 0x000D0900},
288 {0x3B, 0x000C0700}, {0x3B, 0x000B0600},
289 {0x3B, 0x000A0400}, {0x3B, 0x00090200},
290 {0x3B, 0x00080000}, {0x3B, 0x0007BF00},
291 {0x3B, 0x00060B00}, {0x3B, 0x0005C900},
292 {0x3B, 0x00040700}, {0x3B, 0x00030600},
293 {0x3B, 0x0002D500}, {0x3B, 0x00010200},
294 {0x3B, 0x0000E000}, {0xEF, 0x000000A0},
295 {0xEF, 0x00000010}, {0x3B, 0x0000C0A8},
296 {0x3B, 0x00010400}, {0xEF, 0x00000000},
297 {0xEF, 0x00080000}, {0x30, 0x00010000},
298 {0x31, 0x0000000F}, {0x32, 0x00007EFE},
299 {0xEF, 0x00000000}, {0x00, 0x00010159},
300 {0x18, 0x0000FC07}, {0xFE, 0x00000000},
301 {0xFE, 0x00000000}, {0x1F, 0x00080003},
302 {0xFE, 0x00000000}, {0xFE, 0x00000000},
303 {0x1E, 0x00000001}, {0x1F, 0x00080000},
304 {0x00, 0x00033D95},
305 {0xff, 0xffffffff}
312 int ret = 0; in rtl8188fu_identify_chip()
341 *group = 0; in rtl8188f_channel_to_group()
369 val32 &= 0xffff00ff; in rtl8188f_set_tx_power()
374 val32 &= 0xff; in rtl8188f_set_tx_power()
379 ofdmbase += priv->ofdm_tx_power_diff[0].a; in rtl8188f_set_tx_power()
387 /* This diff is always 0 - not used in 8188FU. */ in rtl8188f_set_tx_power()
388 mcsbase += priv->ht40_tx_power_diff[0].a; in rtl8188f_set_tx_power()
390 mcsbase += priv->ht20_tx_power_diff[0].a; in rtl8188f_set_tx_power()
403 [5] = 0xFCCD, in rtl8188f_spur_calibration()
404 [6] = 0xFC4D, in rtl8188f_spur_calibration()
405 [7] = 0xFFCD, in rtl8188f_spur_calibration()
406 [8] = 0xFF4D, in rtl8188f_spur_calibration()
407 [11] = 0xFDCD, in rtl8188f_spur_calibration()
408 [13] = 0xFCCD, in rtl8188f_spur_calibration()
409 [14] = 0xFF9A in rtl8188f_spur_calibration()
413 [5] = 0x06000000, in rtl8188f_spur_calibration()
414 [6] = 0x00000600, in rtl8188f_spur_calibration()
415 [13] = 0x06000000 in rtl8188f_spur_calibration()
419 [11] = 0x04000000 in rtl8188f_spur_calibration()
423 [7] = 0x06000000, in rtl8188f_spur_calibration()
424 [8] = 0x00000380, in rtl8188f_spur_calibration()
425 [14] = 0x00180000 in rtl8188f_spur_calibration()
428 const u8 threshold = 0x16; in rtl8188f_spur_calibration()
429 bool do_notch, hw_ctrl, sw_ctrl, hw_ctrl_s1 = 0, sw_ctrl_s1 = 0; in rtl8188f_spur_calibration()
441 if (channel <= 14 && frequencies[channel] > 0) { in rtl8188f_spur_calibration()
463 val32 |= 0x30; in rtl8188f_spur_calibration()
467 rtl8xxxu_write32(priv, REG_FPGA0_ANALOG4, 0xccf000c0); in rtl8188f_spur_calibration()
473 rtl8xxxu_write32(priv, REG_FPGA0_PSD_FUNC, 0x400000 | frequencies[channel]); in rtl8188f_spur_calibration()
483 rtl8xxxu_write32(priv, REG_FPGA0_ANALOG4, 0xccc000c0); in rtl8188f_spur_calibration()
495 rtl8xxxu_write32(priv, 0xd48, 0x0); in rtl8188f_spur_calibration()
496 rtl8xxxu_write32(priv, 0xd4c, reg_d4c[channel]); in rtl8188f_spur_calibration()
591 sec_ch_above = 0; in rtl8188fu_config_channel()
603 val32 &= ~GENMASK(3, 0); in rtl8188fu_config_channel()
628 val32 = 0x00065; in rtl8188fu_config_channel()
630 val32 = 0x00025; in rtl8188fu_config_channel()
635 val32 = 0x0; in rtl8188fu_config_channel()
637 val32 = 0x01000; in rtl8188fu_config_channel()
641 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x00140); in rtl8188fu_config_channel()
642 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RX_G2, 0x01c6c); in rtl8188fu_config_channel()
652 val32 &= ~(0xf << 4); in rtl8188fu_init_aggregation()
663 agg_rx &= ~0xFF0F; /* reset agg size and timeout */ in rtl8188fu_init_aggregation()
677 /* Time duration for NHM unit: 4us, 0xc350=200ms */ in rtl8188fu_init_statistics()
678 rtl8xxxu_write16(priv, REG_NHM_TIMER_8723B + 2, 0xc350); in rtl8188fu_init_statistics()
679 rtl8xxxu_write16(priv, REG_NHM_TH9_TH10_8723B + 2, 0xffff); in rtl8188fu_init_statistics()
680 rtl8xxxu_write32(priv, REG_NHM_TH3_TO_TH0_8723B, 0xffffff50); in rtl8188fu_init_statistics()
681 rtl8xxxu_write32(priv, REG_NHM_TH7_TO_TH4_8723B, 0xffffffff); in rtl8188fu_init_statistics()
685 val32 |= 0xff; in rtl8188fu_init_statistics()
700 #define TX_POWER_INDEX_MAX 0x3F
701 #define TX_POWER_INDEX_DEFAULT_CCK 0x22
702 #define TX_POWER_INDEX_DEFAULT_HT40 0x27
709 if (efuse->rtl_id != cpu_to_le16(0x8129)) in rtl8188fu_parse_efuse()
721 for (i = 0; i < ARRAY_SIZE(priv->cck_tx_power_index_A); i++) { in rtl8188fu_parse_efuse()
726 for (i = 0; i < ARRAY_SIZE(priv->ht40_1s_tx_power_index_A); i++) { in rtl8188fu_parse_efuse()
731 priv->ofdm_tx_power_diff[0].a = efuse->tx_power_index_A.ht20_ofdm_1s_diff.a; in rtl8188fu_parse_efuse()
732 priv->ht20_tx_power_diff[0].a = efuse->tx_power_index_A.ht20_ofdm_1s_diff.b; in rtl8188fu_parse_efuse()
734 priv->default_crystal_cap = efuse->xtal_k & 0x3f; in rtl8188fu_parse_efuse()
736 return 0; in rtl8188fu_parse_efuse()
769 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_IQADJ_G1, 0x780); in rtl8188fu_init_phy_bb()
806 rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff); in rtl8188f_phy_lc_calibrate()
813 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_MODE_AG, rf_amode | 0x08000); in rtl8188f_phy_lc_calibrate()
815 for (i = 0; i < 100; i++) { in rtl8188f_phy_lc_calibrate()
816 if ((rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_MODE_AG) & 0x08000) == 0) in rtl8188f_phy_lc_calibrate()
830 rtl8xxxu_write8(priv, REG_TXPAUSE, 0x00); in rtl8188f_phy_lc_calibrate()
836 int result = 0; in rtl8188fu_iqk_path_a()
842 val32 &= 0x000000ff; in rtl8188fu_iqk_path_a()
849 val32 |= 0x80000; in rtl8188fu_iqk_path_a()
851 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x20000); in rtl8188fu_iqk_path_a()
852 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f); in rtl8188fu_iqk_path_a()
853 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0x07ff7); in rtl8188fu_iqk_path_a()
856 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x980); in rtl8188fu_iqk_path_a()
857 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, 0x5102a); in rtl8188fu_iqk_path_a()
861 val32 &= 0x000000ff; in rtl8188fu_iqk_path_a()
862 val32 |= 0x80800000; in rtl8188fu_iqk_path_a()
866 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x18008c1c); in rtl8188fu_iqk_path_a()
867 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c); in rtl8188fu_iqk_path_a()
869 rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x821403ff); in rtl8188fu_iqk_path_a()
870 rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x28160000); in rtl8188fu_iqk_path_a()
873 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00462911); in rtl8188fu_iqk_path_a()
876 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000); in rtl8188fu_iqk_path_a()
877 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8188fu_iqk_path_a()
885 val32 &= 0x000000ff; in rtl8188fu_iqk_path_a()
888 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x180); in rtl8188fu_iqk_path_a()
899 ((reg_e94 & 0x03ff0000) != 0x01420000) && in rtl8188fu_iqk_path_a()
900 ((reg_e9c & 0x03ff0000) != 0x00420000)) in rtl8188fu_iqk_path_a()
901 result |= 0x01; in rtl8188fu_iqk_path_a()
909 int result = 0; in rtl8188fu_rx_iqk_path_a()
915 val32 &= 0x000000ff; in rtl8188fu_rx_iqk_path_a()
922 val32 |= 0x80000; in rtl8188fu_rx_iqk_path_a()
924 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000); in rtl8188fu_rx_iqk_path_a()
925 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f); in rtl8188fu_rx_iqk_path_a()
926 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf1173); in rtl8188fu_rx_iqk_path_a()
929 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x980); in rtl8188fu_rx_iqk_path_a()
930 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, 0x5102a); in rtl8188fu_rx_iqk_path_a()
936 val32 &= 0x000000ff; in rtl8188fu_rx_iqk_path_a()
937 val32 |= 0x80800000; in rtl8188fu_rx_iqk_path_a()
943 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8188fu_rx_iqk_path_a()
944 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8188fu_rx_iqk_path_a()
947 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x10008c1c); in rtl8188fu_rx_iqk_path_a()
948 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x30008c1c); in rtl8188fu_rx_iqk_path_a()
950 rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82160fff); in rtl8188fu_rx_iqk_path_a()
951 rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x28160000); in rtl8188fu_rx_iqk_path_a()
954 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00462911); in rtl8188fu_rx_iqk_path_a()
957 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000); in rtl8188fu_rx_iqk_path_a()
958 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8188fu_rx_iqk_path_a()
966 val32 &= 0x000000ff; in rtl8188fu_rx_iqk_path_a()
969 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x180); in rtl8188fu_rx_iqk_path_a()
977 ((reg_e94 & 0x03ff0000) != 0x01420000) && in rtl8188fu_rx_iqk_path_a()
978 ((reg_e9c & 0x03ff0000) != 0x00420000)) in rtl8188fu_rx_iqk_path_a()
979 result |= 0x01; in rtl8188fu_rx_iqk_path_a()
983 val32 = 0x80007c00 | (reg_e94 & 0x3ff0000) | in rtl8188fu_rx_iqk_path_a()
984 ((reg_e9c & 0x3ff0000) >> 16); in rtl8188fu_rx_iqk_path_a()
991 val32 &= 0x000000ff; in rtl8188fu_rx_iqk_path_a()
995 val32 |= 0x80000; in rtl8188fu_rx_iqk_path_a()
997 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000); in rtl8188fu_rx_iqk_path_a()
998 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f); in rtl8188fu_rx_iqk_path_a()
999 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf7ff2); in rtl8188fu_rx_iqk_path_a()
1004 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x980); in rtl8188fu_rx_iqk_path_a()
1005 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, 0x51000); in rtl8188fu_rx_iqk_path_a()
1011 val32 &= 0x000000ff; in rtl8188fu_rx_iqk_path_a()
1012 val32 |= 0x80800000; in rtl8188fu_rx_iqk_path_a()
1018 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8188fu_rx_iqk_path_a()
1021 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x30008c1c); in rtl8188fu_rx_iqk_path_a()
1022 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x10008c1c); in rtl8188fu_rx_iqk_path_a()
1024 rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82160000); in rtl8188fu_rx_iqk_path_a()
1025 rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x281613ff); in rtl8188fu_rx_iqk_path_a()
1028 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a911); in rtl8188fu_rx_iqk_path_a()
1031 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000); in rtl8188fu_rx_iqk_path_a()
1032 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8188fu_rx_iqk_path_a()
1040 val32 &= 0x000000ff; in rtl8188fu_rx_iqk_path_a()
1043 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x180); in rtl8188fu_rx_iqk_path_a()
1053 ((reg_ea4 & 0x03ff0000) != 0x01320000) && in rtl8188fu_rx_iqk_path_a()
1054 ((reg_eac & 0x03ff0000) != 0x00360000)) in rtl8188fu_rx_iqk_path_a()
1055 result |= 0x02; in rtl8188fu_rx_iqk_path_a()
1097 if (t == 0) { in rtl8188fu_phy_iqcalibrate()
1108 if (t == 0) { in rtl8188fu_phy_iqcalibrate()
1118 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600); in rtl8188fu_phy_iqcalibrate()
1119 rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000800e4); in rtl8188fu_phy_iqcalibrate()
1120 rtl8xxxu_write32(priv, REG_FPGA0_XCD_RF_SW_CTRL, 0x25204000); in rtl8188fu_phy_iqcalibrate()
1124 val32 |= 0x00ff0000; in rtl8188fu_phy_iqcalibrate()
1129 val32 &= 0xff; in rtl8188fu_phy_iqcalibrate()
1130 val32 |= 0x80800000; in rtl8188fu_phy_iqcalibrate()
1132 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8188fu_phy_iqcalibrate()
1133 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8188fu_phy_iqcalibrate()
1135 for (i = 0; i < retry; i++) { in rtl8188fu_phy_iqcalibrate()
1137 if (path_a_ok == 0x01) { in rtl8188fu_phy_iqcalibrate()
1139 val32 &= 0xff; in rtl8188fu_phy_iqcalibrate()
1144 result[t][0] = (val32 >> 16) & 0x3ff; in rtl8188fu_phy_iqcalibrate()
1148 result[t][1] = (val32 >> 16) & 0x3ff; in rtl8188fu_phy_iqcalibrate()
1153 for (i = 0; i < retry; i++) { in rtl8188fu_phy_iqcalibrate()
1155 if (path_a_ok == 0x03) { in rtl8188fu_phy_iqcalibrate()
1158 result[t][2] = (val32 >> 16) & 0x3ff; in rtl8188fu_phy_iqcalibrate()
1162 result[t][3] = (val32 >> 16) & 0x3ff; in rtl8188fu_phy_iqcalibrate()
1172 val32 &= 0xff; in rtl8188fu_phy_iqcalibrate()
1175 if (t == 0) in rtl8188fu_phy_iqcalibrate()
1183 val32 = 0x01000000; in rtl8188fu_phy_iqcalibrate()
1205 val32 &= 0xffffff00; in rtl8188fu_phy_iqcalibrate()
1206 val32 |= 0x50; in rtl8188fu_phy_iqcalibrate()
1209 val32 &= 0xffffff00; in rtl8188fu_phy_iqcalibrate()
1210 val32 |= rx_initial_gain & 0xff; in rtl8188fu_phy_iqcalibrate()
1213 /* Load 0xe30 IQC default value */ in rtl8188fu_phy_iqcalibrate()
1214 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x01008c00); in rtl8188fu_phy_iqcalibrate()
1215 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x01008c00); in rtl8188fu_phy_iqcalibrate()
1226 s32 reg_tmp = 0; in rtl8188fu_phy_iq_calibrate()
1234 memset(result, 0, sizeof(result)); in rtl8188fu_phy_iq_calibrate()
1239 for (i = 0; i < 3; i++) { in rtl8188fu_phy_iq_calibrate()
1243 simu = rtl8xxxu_gen2_simularity_compare(priv, result, 0, 1); in rtl8188fu_phy_iq_calibrate()
1245 candidate = 0; in rtl8188fu_phy_iq_calibrate()
1251 simu = rtl8xxxu_gen2_simularity_compare(priv, result, 0, 2); in rtl8188fu_phy_iq_calibrate()
1253 candidate = 0; in rtl8188fu_phy_iq_calibrate()
1261 for (i = 0; i < 8; i++) in rtl8188fu_phy_iq_calibrate()
1272 for (i = 0; i < 4; i++) { in rtl8188fu_phy_iq_calibrate()
1273 reg_e94 = result[i][0]; in rtl8188fu_phy_iq_calibrate()
1283 if (candidate >= 0) { in rtl8188fu_phy_iq_calibrate()
1284 reg_e94 = result[candidate][0]; in rtl8188fu_phy_iq_calibrate()
1303 reg_e94 = reg_eb4 = priv->rege94 = priv->regeb4 = 0x100; in rtl8188fu_phy_iq_calibrate()
1304 reg_e9c = reg_ebc = priv->rege9c = priv->regebc = 0x0; in rtl8188fu_phy_iq_calibrate()
1307 if (reg_e94 && candidate >= 0) in rtl8188fu_phy_iq_calibrate()
1309 candidate, (reg_ea4 == 0)); in rtl8188fu_phy_iq_calibrate()
1322 /* 0x04[12:11] = 2b'01enable WL suspend */ in rtl8188f_disabled_to_emu()
1327 /* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode */ in rtl8188f_disabled_to_emu()
1328 val8 = rtl8xxxu_read8(priv, 0xc4); in rtl8188f_disabled_to_emu()
1330 rtl8xxxu_write8(priv, 0xc4, val8); in rtl8188f_disabled_to_emu()
1337 int count, ret = 0; in rtl8188f_emu_to_active()
1344 /* wait till 0x04[17] = 1 power ready */ in rtl8188f_emu_to_active()
1368 /* set, then poll until 0 */ in rtl8188f_emu_to_active()
1375 if ((val32 & APS_FSMCO_MAC_ENABLE) == 0) { in rtl8188f_emu_to_active()
1376 ret = 0; in rtl8188f_emu_to_active()
1387 /* 0x27<=35 to reduce RF noise */ in rtl8188f_emu_to_active()
1388 val8 = rtl8xxxu_write8(priv, 0x27, 0x35); in rtl8188f_emu_to_active()
1397 int count, ret = 0; in rtl8188fu_active_to_emu()
1400 rtl8xxxu_write8(priv, REG_RF_CTRL, 0); in rtl8188fu_active_to_emu()
1402 /* 0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */ in rtl8188fu_active_to_emu()
1403 val8 = rtl8xxxu_read8(priv, 0x4e); in rtl8188fu_active_to_emu()
1405 rtl8xxxu_write8(priv, 0x4e, val8); in rtl8188fu_active_to_emu()
1407 /* 0x27 <= 34, xtal_qsel = 0 to xtal bring up */ in rtl8188fu_active_to_emu()
1408 rtl8xxxu_write8(priv, 0x27, 0x34); in rtl8188fu_active_to_emu()
1410 /* 0x04[9] = 1 turn off MAC by HW state machine */ in rtl8188fu_active_to_emu()
1417 if ((val32 & APS_FSMCO_MAC_OFF) == 0) { in rtl8188fu_active_to_emu()
1418 ret = 0; in rtl8188fu_active_to_emu()
1437 /* 0x04[12:11] = 2b'01 enable WL suspend */ in rtl8188fu_emu_to_disabled()
1443 /* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode */ in rtl8188fu_emu_to_disabled()
1444 val8 = rtl8xxxu_read8(priv, 0xc4); in rtl8188fu_emu_to_disabled()
1446 rtl8xxxu_write8(priv, 0xc4, val8); in rtl8188fu_emu_to_disabled()
1448 return 0; in rtl8188fu_emu_to_disabled()
1465 rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff); in rtl8188fu_active_to_lps()
1471 * Poll 32 bit wide REG_SCH_TX_CMD for 0x00000000 to ensure no TX is pending. in rtl8188fu_active_to_lps()
1476 retval = 0; in rtl8188fu_active_to_lps()
1501 val16 |= 0x3f; in rtl8188fu_active_to_lps()
1525 rtl8xxxu_write8(priv, REG_CR, 0); in rtl8188fu_power_on()
1550 rtl8xxxu_write32(priv, REG_HISR0, 0xFFFFFFFF); in rtl8188fu_power_off()
1551 rtl8xxxu_write32(priv, REG_HISR1, 0xFFFFFFFF); in rtl8188fu_power_off()
1553 /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */ in rtl8188fu_power_off()
1559 rtl8xxxu_write8(priv, REG_RF_CTRL, 0x00); in rtl8188fu_power_off()
1573 rtl8xxxu_write8(priv, REG_MCU_FW_DL, 0x00); in rtl8188fu_power_off()
1579 #define PPG_BB_GAIN_2G_TXA_OFFSET_8188F 0xee
1580 #define PPG_BB_GAIN_2G_TX_OFFSET_MASK 0x0f
1585 u8 pg_pwrtrim = 0xff, val8; in rtl8188f_enable_rf()
1591 if (pg_pwrtrim != 0xff) { in rtl8188f_enable_rf()
1595 bb_gain = 0; in rtl8188f_enable_rf()
1602 if (bb_gain > 0) in rtl8188f_enable_rf()
1606 val32 &= ~0xfc000; in rtl8188f_enable_rf()
1618 rtl8xxxu_write8(priv, REG_TXPAUSE, 0x00); in rtl8188f_enable_rf()
1630 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_AC, 0); in rtl8188f_disable_rf()
1661 "%s: Adjusting crystal cap from 0x%x (actually 0x%lx 0x%lx) to 0x%x\n", in rtl8188f_set_crystal_cap()
1679 s8 rx_pwr_all = 0x00; in rtl8188f_cck_rssi()
1748 .ampdu_max_time = 0x70,
1749 .ustime_tsf_edca = 0x28,
1750 .max_aggr_num = 0x0c14,
1755 .adda_1t_init = 0x03c00014,
1756 .adda_1t_path_on = 0x03c00014,
1757 .trxff_boundary = 0x3f7f,