Lines Matching +full:save +full:- +full:mac +full:- +full:address
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
34 * Default offset is required for RSSI <-> dBm conversion.
79 * FORCE_CLOCK_ON: Host force MAC clock ON
121 * 16 entries 32-byte for shared key table
122 * 64 entries 32-byte for pairwise key table
123 * 64 entries 8-byte for pairwise ta key table
146 u8 address[6]; member
152 * Other on-chip shared memory space.
159 * We steal 16 tail bytes to save debugging settings.
164 * On-chip BEACON frame space.
175 * HOST-MCU shared memory.
179 * H2M_MAILBOX_CSR: Host-to-MCU Mailbox.
214 * MAC Control/Status Registers(CSR).
237 * MAC_CSR2: STA MAC register 0.
246 * MAC_CSR3: STA MAC register 1.
248 * Used to mask off bits from byte 5 of the MAC address
273 * 0: 1-BSSID mode (BSS index = 0)
274 * 1: 2-BSSID mode (BSS index: Byte5, bit 0)
275 * 2: 2-BSSID mode (BSS index: byte5, bit 1)
276 * 3: 4-BSSID mode (BSS index: byte5, bit 0 - 1)
304 * MAC_CSR9: Back-Off control register.
306 * CWMIN: Bit for Cwmin. default Cwmin is 31 (2^5 - 1).
307 * CWMAX: Bit for Cwmax, default Cwmax is 1023 (2^10 - 1).
461 * TXRX_CSR4: Auto-Responder/Tx-retry register.
464 * OFDM_TX_RATE_STEP: 0:1-step, 1: 2-step, 2:3-step, 3:4-step.
511 * TSF_SYNC: Tsf sync, 0: disable, 1: infra, 2: ad-hoc/master mode.
572 * PHY_CSR2: Pre-TX BBP control.
737 * QOS_CSR0: TXOP holder MAC address register.
746 * QOS_CSR1: TXOP holder MAC address register.
758 * RX QOS-CFPOLL MAC address register.
759 * QOS_CSR3: RX QOS-CFPOLL MAC address 0.
760 * QOS_CSR4: RX QOS-CFPOLL MAC address 1.
766 * QOS_CSR5: "QosControl" field of the RX QOS-CFPOLL.
775 * AC0_BASE_CSR: AC_VO base address.
781 * AC1_BASE_CSR: AC_VI base address.
787 * AC2_BASE_CSR: AC_BE base address.
793 * AC3_BASE_CSR: AC_BK base address.
799 * MGMT_BASE_CSR: MGMT ring base address.
815 * TXD_SIZE: In unit of 32-bit.
906 * Several read-only registers, for debugging.
922 * RXD_SIZE: In unit of 32-bit.
937 * RXPTR_CSR: Read-only, for debugging.
1050 * RF_PS: Set RF interface value to power save
1107 * FRAME_END: 1 - DPDT, 0 - SPDT (Only valid for 802.11G, RF2527 & RF2529)
1143 * HW MAC address.
1290 * KEY_TABLE: Use per-client pairwise KEY table.
1317 * HW_SEQUENCE: MAC overwrites the frame sequence number.
1362 * the above 24-byte is called TXINFO and will be DMAed to MAC block
1363 * through TXFIFO. MAC block use this TXINFO to control the transmission
1365 * The following fields are not used by MAC block.
1372 * Word6-10: Buffer physical address
1381 * Word11-13: Buffer length
1450 * the above 20-byte is called RXINFO and will be DMAed to MAC RX block
1453 * Can't be touched by ASIC MAC block.
1462 * Word6-15: Reserved