Lines Matching +full:cold +full:- +full:temp
1 // SPDX-License-Identifier: GPL-2.0-only
3 * (c) Copyright 2002-2010, Ralink Technology, Inc.
23 if (WARN_ON(!test_bit(MT7601U_STATE_WLAN_RUNNING, &dev->state)) || in mt7601u_rf_wr()
25 return -EINVAL; in mt7601u_rf_wr()
26 if (test_bit(MT7601U_STATE_REMOVED, &dev->state)) in mt7601u_rf_wr()
29 mutex_lock(&dev->reg_atomic_mutex); in mt7601u_rf_wr()
32 ret = -ETIMEDOUT; in mt7601u_rf_wr()
44 mutex_unlock(&dev->reg_atomic_mutex); in mt7601u_rf_wr()
47 dev_err(dev->dev, "Error: RF write %02hhx:%02hhx failed:%d!!\n", in mt7601u_rf_wr()
56 int ret = -ETIMEDOUT; in mt7601u_rf_rr()
59 if (WARN_ON(!test_bit(MT7601U_STATE_WLAN_RUNNING, &dev->state)) || in mt7601u_rf_rr()
61 return -EINVAL; in mt7601u_rf_rr()
62 if (test_bit(MT7601U_STATE_REMOVED, &dev->state)) in mt7601u_rf_rr()
65 mutex_lock(&dev->reg_atomic_mutex); in mt7601u_rf_rr()
85 mutex_unlock(&dev->reg_atomic_mutex); in mt7601u_rf_rr()
88 dev_err(dev->dev, "Error: RF read %02hhx:%02hhx failed:%d!!\n", in mt7601u_rf_rr()
124 if (WARN_ON(!test_bit(MT7601U_STATE_WLAN_RUNNING, &dev->state)) || in mt7601u_bbp_wr()
125 test_bit(MT7601U_STATE_REMOVED, &dev->state)) in mt7601u_bbp_wr()
128 mutex_lock(&dev->reg_atomic_mutex); in mt7601u_bbp_wr()
131 dev_err(dev->dev, "Error: BBP write %02hhx failed!!\n", offset); in mt7601u_bbp_wr()
141 mutex_unlock(&dev->reg_atomic_mutex); in mt7601u_bbp_wr()
147 int ret = -ETIMEDOUT; in mt7601u_bbp_rr()
149 if (WARN_ON(!test_bit(MT7601U_STATE_WLAN_RUNNING, &dev->state))) in mt7601u_bbp_rr()
150 return -EINVAL; in mt7601u_bbp_rr()
151 if (test_bit(MT7601U_STATE_REMOVED, &dev->state)) in mt7601u_bbp_rr()
154 mutex_lock(&dev->reg_atomic_mutex); in mt7601u_bbp_rr()
173 mutex_unlock(&dev->reg_atomic_mutex); in mt7601u_bbp_rr()
176 dev_err(dev->dev, "Error: BBP read %02hhx failed:%d!!\n", in mt7601u_bbp_rr()
218 } while (--i); in mt7601u_wait_bbp_ready()
221 dev_err(dev->dev, "Error: BBP is not ready\n"); in mt7601u_wait_bbp_ready()
222 return -EIO; in mt7601u_wait_bbp_ready()
238 /* bw20 */ { -2, 15, 33 }, in mt7601u_phy_get_rssi()
242 /* bw20 */ { -2, 15, 33 }, in mt7601u_phy_get_rssi()
243 /* bw40 */ { -2, 16, 34 } in mt7601u_phy_get_rssi()
247 int aux_lna = FIELD_GET(MT_RXWI_ANT_AUX_LNA, rxwi->ant); in mt7601u_phy_get_rssi()
248 int lna_id = FIELD_GET(MT_RXWI_GAIN_RSSI_LNA_ID, rxwi->gain); in mt7601u_phy_get_rssi()
252 lna_id--; in mt7601u_phy_get_rssi()
255 val -= lna[aux_lna][bw][lna_id]; in mt7601u_phy_get_rssi()
256 val -= FIELD_GET(MT_RXWI_GAIN_RSSI_VAL, rxwi->gain); in mt7601u_phy_get_rssi()
257 val -= dev->ee->lna_gain; in mt7601u_phy_get_rssi()
258 val -= dev->ee->rssi_offset[0]; in mt7601u_phy_get_rssi()
278 if (dev->bw != MT_BW_20) in mt7601u_set_bw_filter()
293 if (WARN_ON(dev->temp_mode > MT_TEMP_MODE_LOW)) in mt7601u_load_bbp_temp_table_bw()
294 return -EINVAL; in mt7601u_load_bbp_temp_table_bw()
296 t = &bbp_mode_table[dev->temp_mode][dev->bw]; in mt7601u_load_bbp_temp_table_bw()
298 return mt7601u_write_reg_pairs(dev, MT_MCU_MEMMAP_BBP, t->regs, t->n); in mt7601u_load_bbp_temp_table_bw()
306 if (dev->temp_mode == mode) in mt7601u_bbp_temp()
309 dev->temp_mode = mode; in mt7601u_bbp_temp()
312 t = bbp_mode_table[dev->temp_mode]; in mt7601u_bbp_temp()
319 t[dev->bw].regs, t[dev->bw].n); in mt7601u_bbp_temp()
324 struct mt7601u_rate_power *t = &dev->ee->power_rate_table; in mt7601u_apply_ch14_fixup()
326 if (hw_chan != 14 || dev->bw != MT_BW_20) { in mt7601u_apply_ch14_fixup()
330 t->cck[0].bw20 = dev->ee->real_cck_bw20[0]; in mt7601u_apply_ch14_fixup()
331 t->cck[1].bw20 = dev->ee->real_cck_bw20[1]; in mt7601u_apply_ch14_fixup()
337 t->cck[0].bw20 = dev->ee->real_cck_bw20[0] - 2; in mt7601u_apply_ch14_fixup()
338 t->cck[1].bw20 = dev->ee->real_cck_bw20[1] - 2; in mt7601u_apply_ch14_fixup()
366 { 62, 0x37 - dev->ee->lna_gain }, in __mt7601u_phy_set_channel()
367 { 63, 0x37 - dev->ee->lna_gain }, in __mt7601u_phy_set_channel()
368 { 64, 0x37 - dev->ee->lna_gain }, in __mt7601u_phy_set_channel()
371 struct ieee80211_channel *chan = chandef->chan; in __mt7601u_phy_set_channel()
374 struct mt7601u_rate_power *t = &dev->ee->power_rate_table; in __mt7601u_phy_set_channel()
382 chan_idx = chan->hw_value - 1; in __mt7601u_phy_set_channel()
384 if (chandef->width == NL80211_CHAN_WIDTH_40) { in __mt7601u_phy_set_channel()
388 chan_idx -= 2; in __mt7601u_phy_set_channel()
392 dev_err(dev->dev, "Error: invalid 40MHz channel!!\n"); in __mt7601u_phy_set_channel()
395 if (bw != dev->bw || chan_ext_below != dev->chan_ext_below) { in __mt7601u_phy_set_channel()
396 dev_dbg(dev->dev, "Info: switching HT mode bw:%d below:%d\n", in __mt7601u_phy_set_channel()
403 dev->chan_ext_below = chan_ext_below; in __mt7601u_phy_set_channel()
415 dev->ee->chan_pwr[chan_idx] & 0x3f); in __mt7601u_phy_set_channel()
428 mt7601u_apply_ch14_fixup(dev, chan->hw_value); in __mt7601u_phy_set_channel()
429 mt7601u_wr(dev, MT_TX_PWR_CFG_0, int_to_s6(t->ofdm[1].bw20) << 24 | in __mt7601u_phy_set_channel()
430 int_to_s6(t->ofdm[0].bw20) << 16 | in __mt7601u_phy_set_channel()
431 int_to_s6(t->cck[1].bw20) << 8 | in __mt7601u_phy_set_channel()
432 int_to_s6(t->cck[0].bw20)); in __mt7601u_phy_set_channel()
434 if (test_bit(MT7601U_STATE_SCANNING, &dev->state)) in __mt7601u_phy_set_channel()
437 dev->chandef = *chandef; in __mt7601u_phy_set_channel()
447 cancel_delayed_work_sync(&dev->cal_work); in mt7601u_phy_set_channel()
448 cancel_delayed_work_sync(&dev->freq_cal.work); in mt7601u_phy_set_channel()
450 mutex_lock(&dev->hw_atomic_mutex); in mt7601u_phy_set_channel()
452 mutex_unlock(&dev->hw_atomic_mutex); in mt7601u_phy_set_channel()
456 if (test_bit(MT7601U_STATE_SCANNING, &dev->state)) in mt7601u_phy_set_channel()
459 ieee80211_queue_delayed_work(dev->hw, &dev->cal_work, in mt7601u_phy_set_channel()
461 if (dev->freq_cal.enabled) in mt7601u_phy_set_channel()
462 ieee80211_queue_delayed_work(dev->hw, &dev->freq_cal.work, in mt7601u_phy_set_channel()
473 * mt7601u_bbp_r47_get - read value through BBP R47/R49 pair
494 u8 bbp_val, temp; in mt7601u_read_bootup_temp() local
509 for (i = 100; i && (bbp_val & 0x10); i--) in mt7601u_read_bootup_temp()
512 temp = mt7601u_bbp_r47_get(dev, bbp_val, BBP_R47_F_TEMP); in mt7601u_read_bootup_temp()
526 trace_read_temp(dev, temp); in mt7601u_read_bootup_temp()
527 return temp; in mt7601u_read_bootup_temp()
534 s8 temp; in mt7601u_read_temp() local
538 /* Note: this rarely succeeds, temp can change even if it fails. */ in mt7601u_read_temp()
539 for (i = 100; i && (val & 0x10); i--) in mt7601u_read_temp()
542 temp = mt7601u_bbp_r47_get(dev, val, BBP_R47_F_TEMP); in mt7601u_read_temp()
544 trace_read_temp(dev, temp); in mt7601u_read_temp()
545 return temp; in mt7601u_read_temp()
565 dev_err(dev->dev, "%s intro failed:%d\n", __func__, ret); in mt7601u_rxdc_cal()
567 for (i = 20; i; i--) { in mt7601u_rxdc_cal()
575 dev_err(dev->dev, "%s timed out\n", __func__); in mt7601u_rxdc_cal()
582 dev_err(dev->dev, "%s outro failed:%d\n", __func__, ret); in mt7601u_rxdc_cal()
589 if (test_bit(MT7601U_STATE_REMOVED, &dev->state)) in mt7601u_phy_recalibrate_after_assoc()
592 mt7601u_mcu_calibrate(dev, MCU_CAL_DPD, dev->curr_temp); in mt7601u_phy_recalibrate_after_assoc()
605 return -10000; in lin2dBd()
609 exp = fls(mantisa) - 16; in lin2dBd()
616 app = (mantisa + (mantisa >> 3) + (mantisa >> 4) - 0x9600); in lin2dBd()
618 app = (mantisa - (mantisa >> 3) - (mantisa >> 6) - 0x5a00); in lin2dBd()
632 struct tssi_data *d = &dev->ee->tssi_data; in mt7601u_set_initial_tssi()
635 init_offset = -((tssi_db * d->slope + d->offset[1]) / 4096) + 10; in mt7601u_set_initial_tssi()
683 for (j = 20; j; j--) in mt7601u_tssi_dc_gain_cal()
687 dev_err(dev->dev, "%s timed out\n", __func__); in mt7601u_tssi_dc_gain_cal()
694 tssi_init_db = lin2dBd((short)res[1] - res[0]); in mt7601u_tssi_dc_gain_cal()
695 tssi_init_hvga_db = lin2dBd(((short)res[3] - res[2]) * 4); in mt7601u_tssi_dc_gain_cal()
696 dev->tssi_init = res[0]; in mt7601u_tssi_dc_gain_cal()
697 dev->tssi_init_hvga = res[2]; in mt7601u_tssi_dc_gain_cal()
698 dev->tssi_init_hvga_offset_db = tssi_init_hvga_db - tssi_init_db; in mt7601u_tssi_dc_gain_cal()
700 dev_dbg(dev->dev, in mt7601u_tssi_dc_gain_cal()
702 dev->tssi_init, tssi_init_db, dev->tssi_init_hvga, in mt7601u_tssi_dc_gain_cal()
703 tssi_init_hvga_db, dev->tssi_init_hvga_offset_db); in mt7601u_tssi_dc_gain_cal()
724 int ret, temp, hi_temp = 400, lo_temp = -200; in mt7601u_temp_comp() local
726 temp = (dev->raw_temp - dev->ee->ref_temp) * MT_EE_TEMPERATURE_SLOPE; in mt7601u_temp_comp()
727 dev->curr_temp = temp; in mt7601u_temp_comp()
730 if (temp - dev->dpd_temp > 450 || temp - dev->dpd_temp < -450) { in mt7601u_temp_comp()
731 dev->dpd_temp = temp; in mt7601u_temp_comp()
733 ret = mt7601u_mcu_calibrate(dev, MCU_CAL_DPD, dev->dpd_temp); in mt7601u_temp_comp()
739 dev_dbg(dev->dev, "Recalibrate DPD\n"); in mt7601u_temp_comp()
743 if (temp < -50 && !dev->pll_lock_protect) { /* < 20C */ in mt7601u_temp_comp()
744 dev->pll_lock_protect = true; in mt7601u_temp_comp()
749 dev_dbg(dev->dev, "PLL lock protect on - too cold\n"); in mt7601u_temp_comp()
750 } else if (temp > 50 && dev->pll_lock_protect) { /* > 30C */ in mt7601u_temp_comp()
751 dev->pll_lock_protect = false; in mt7601u_temp_comp()
756 dev_dbg(dev->dev, "PLL lock protect off\n"); in mt7601u_temp_comp()
760 hi_temp -= 50; in mt7601u_temp_comp()
761 lo_temp -= 50; in mt7601u_temp_comp()
765 if (temp > hi_temp) in mt7601u_temp_comp()
767 else if (temp > lo_temp) in mt7601u_temp_comp()
776 return dev->ee->chan_pwr[dev->chandef.chan->hw_value - 1]; in mt7601u_current_tx_power()
787 static const s16 decode_tb[] = { 0, 8847, -5734, -5734 }; in mt7601u_phy_rf_pa_mode_val()
795 reg = dev->rf_pa_mode[0]; in mt7601u_phy_rf_pa_mode_val()
798 reg = dev->rf_pa_mode[1]; in mt7601u_phy_rf_pa_mode_val()
809 static const int static_power[4] = { 0, -49152, -98304, 49152 }; in mt7601u_tssi_params_get()
817 dev->raw_temp = mt7601u_bbp_r47_get(dev, bbp_r47, BBP_R47_F_TEMP); in mt7601u_tssi_params_get()
825 rate_table = dev->ee->power_rate_table.cck; in mt7601u_tssi_params_get()
830 rate_table = dev->ee->power_rate_table.ofdm; in mt7601u_tssi_params_get()
836 rate_table = dev->ee->power_rate_table.ht; in mt7601u_tssi_params_get()
840 if (dev->bw == MT_BW_20) in mt7601u_tssi_params_get()
847 dev_dbg(dev->dev, "tx_rate:%02hhx pwr:%08x\n", tx_rate, p.trgt_power); in mt7601u_tssi_params_get()
862 p.trgt_power += dev->ee->tssi_data.tx0_delta_offset; in mt7601u_tssi_params_get()
864 dev_dbg(dev->dev, in mt7601u_tssi_params_get()
865 "tssi:%02hhx t_power:%08x temp:%02hhx pkt_type:%02hhx\n", in mt7601u_tssi_params_get()
866 p.tssi0, p.trgt_power, dev->raw_temp, pkt_type); in mt7601u_tssi_params_get()
886 if (!dev->ee->tssi_enabled) in mt7601u_tssi_cal()
890 if (!dev->tssi_read_trig) in mt7601u_tssi_cal()
898 tssi_init = (hvga ? dev->tssi_init_hvga : dev->tssi_init); in mt7601u_tssi_cal()
899 tssi_m_dc = params.tssi0 - tssi_init; in mt7601u_tssi_cal()
901 dev_dbg(dev->dev, "tssi dc:%04hx db:%04hx hvga:%d\n", in mt7601u_tssi_cal()
904 if (dev->chandef.chan->hw_value < 5) in mt7601u_tssi_cal()
905 tssi_offset = dev->ee->tssi_data.offset[0]; in mt7601u_tssi_cal()
906 else if (dev->chandef.chan->hw_value < 9) in mt7601u_tssi_cal()
907 tssi_offset = dev->ee->tssi_data.offset[1]; in mt7601u_tssi_cal()
909 tssi_offset = dev->ee->tssi_data.offset[2]; in mt7601u_tssi_cal()
912 tssi_db -= dev->tssi_init_hvga_offset_db; in mt7601u_tssi_cal()
914 curr_pwr = tssi_db * dev->ee->tssi_data.slope + (tssi_offset << 9); in mt7601u_tssi_cal()
915 diff_pwr = params.trgt_power - curr_pwr; in mt7601u_tssi_cal()
916 dev_dbg(dev->dev, "Power curr:%08x diff:%08x\n", curr_pwr, diff_pwr); in mt7601u_tssi_cal()
919 dev_err(dev->dev, "Error: TSSI upper saturation\n"); in mt7601u_tssi_cal()
922 if (params.tssi0 - tssi_init < 1 && diff_pwr < 0) { in mt7601u_tssi_cal()
923 dev_err(dev->dev, "Error: TSSI lower saturation\n"); in mt7601u_tssi_cal()
927 if ((dev->prev_pwr_diff ^ diff_pwr) < 0 && abs(diff_pwr) < 4096 && in mt7601u_tssi_cal()
928 (abs(diff_pwr) > abs(dev->prev_pwr_diff) || in mt7601u_tssi_cal()
929 (diff_pwr > 0 && diff_pwr == -dev->prev_pwr_diff))) in mt7601u_tssi_cal()
932 dev->prev_pwr_diff = diff_pwr; in mt7601u_tssi_cal()
934 diff_pwr += (diff_pwr > 0) ? 2048 : -2048; in mt7601u_tssi_cal()
937 dev_dbg(dev->dev, "final diff: %08x\n", diff_pwr); in mt7601u_tssi_cal()
950 return (dev->ee->lna_gain - 8) * 2 + 0x34; in mt7601u_agc_default()
962 dev->agc_save = mt7601u_bbp_rr(dev, 66); in mt7601u_agc_save()
967 mt7601u_bbp_wr(dev, 66, dev->agc_save); in mt7601u_agc_restore()
975 if (test_bit(MT7601U_STATE_SCANNING, &dev->state)) in mt7601u_agc_tune()
982 spin_lock_bh(&dev->con_mon_lock); in mt7601u_agc_tune()
983 avg_rssi = ewma_rssi_read(&dev->avg_rssi); in mt7601u_agc_tune()
984 spin_unlock_bh(&dev->con_mon_lock); in mt7601u_agc_tune()
988 avg_rssi = -avg_rssi; in mt7601u_agc_tune()
989 if (avg_rssi <= -70) in mt7601u_agc_tune()
990 val -= 0x20; in mt7601u_agc_tune()
991 else if (avg_rssi <= -60) in mt7601u_agc_tune()
992 val -= 0x10; in mt7601u_agc_tune()
1010 if (!dev->ee->tssi_enabled) in mt7601u_phy_calibrate()
1011 dev->raw_temp = mt7601u_read_temp(dev); in mt7601u_phy_calibrate()
1014 ieee80211_queue_delayed_work(dev->hw, &dev->cal_work, in mt7601u_phy_calibrate()
1025 /* No beacons received - reschedule soon */ in __mt7601u_phy_freq_cal()
1049 dev->freq_cal.adjusting = true; in __mt7601u_phy_freq_cal()
1051 dev->freq_cal.adjusting = false; in __mt7601u_phy_freq_cal()
1053 if (!dev->freq_cal.adjusting) in __mt7601u_phy_freq_cal()
1057 if (dev->freq_cal.freq > 0) in __mt7601u_phy_freq_cal()
1058 dev->freq_cal.freq--; in __mt7601u_phy_freq_cal()
1060 dev->freq_cal.adjusting = false; in __mt7601u_phy_freq_cal()
1061 } else if (last_offset < -deactivate_threshold) { in __mt7601u_phy_freq_cal()
1062 if (dev->freq_cal.freq < 0xbf) in __mt7601u_phy_freq_cal()
1063 dev->freq_cal.freq++; in __mt7601u_phy_freq_cal()
1065 dev->freq_cal.adjusting = false; in __mt7601u_phy_freq_cal()
1068 trace_freq_cal_adjust(dev, dev->freq_cal.freq); in __mt7601u_phy_freq_cal()
1069 mt7601u_rf_wr(dev, 0, 12, dev->freq_cal.freq); in __mt7601u_phy_freq_cal()
1072 return dev->freq_cal.adjusting ? MT_FREQ_CAL_ADJ_INTERVAL : in __mt7601u_phy_freq_cal()
1084 spin_lock_bh(&dev->con_mon_lock); in mt7601u_phy_freq_cal()
1085 last_offset = dev->bcn_freq_off; in mt7601u_phy_freq_cal()
1086 phy_mode = dev->bcn_phy_mode; in mt7601u_phy_freq_cal()
1087 spin_unlock_bh(&dev->con_mon_lock); in mt7601u_phy_freq_cal()
1090 ieee80211_queue_delayed_work(dev->hw, &dev->freq_cal.work, delay); in mt7601u_phy_freq_cal()
1092 spin_lock_bh(&dev->con_mon_lock); in mt7601u_phy_freq_cal()
1093 dev->bcn_freq_off = MT_FREQ_OFFSET_INVALID; in mt7601u_phy_freq_cal()
1094 spin_unlock_bh(&dev->con_mon_lock); in mt7601u_phy_freq_cal()
1103 if (!vif->cfg.assoc) in mt7601u_phy_con_cal_onoff()
1104 cancel_delayed_work_sync(&dev->freq_cal.work); in mt7601u_phy_con_cal_onoff()
1107 spin_lock_bh(&dev->con_mon_lock); in mt7601u_phy_con_cal_onoff()
1108 ether_addr_copy(dev->ap_bssid, info->bssid); in mt7601u_phy_con_cal_onoff()
1109 ewma_rssi_init(&dev->avg_rssi); in mt7601u_phy_con_cal_onoff()
1110 dev->bcn_freq_off = MT_FREQ_OFFSET_INVALID; in mt7601u_phy_con_cal_onoff()
1111 spin_unlock_bh(&dev->con_mon_lock); in mt7601u_phy_con_cal_onoff()
1113 dev->freq_cal.freq = dev->ee->rf_freq_off; in mt7601u_phy_con_cal_onoff()
1114 dev->freq_cal.enabled = vif->cfg.assoc; in mt7601u_phy_con_cal_onoff()
1115 dev->freq_cal.adjusting = false; in mt7601u_phy_con_cal_onoff()
1117 if (vif->cfg.assoc) in mt7601u_phy_con_cal_onoff()
1118 ieee80211_queue_delayed_work(dev->hw, &dev->freq_cal.work, in mt7601u_phy_con_cal_onoff()
1127 dev->raw_temp = mt7601u_read_bootup_temp(dev); in mt7601u_init_cal()
1128 dev->curr_temp = (dev->raw_temp - dev->ee->ref_temp) * in mt7601u_init_cal()
1130 dev->dpd_temp = dev->curr_temp; in mt7601u_init_cal()
1165 ret = mt7601u_mcu_calibrate(dev, MCU_CAL_DPD, dev->dpd_temp); in mt7601u_init_cal()
1184 if (bw == dev->bw) { in mt7601u_bbp_set_bw()
1190 dev->bw = bw; in mt7601u_bbp_set_bw()
1207 * mt7601u_set_rx_path - set rx path in BBP
1209 * @path: rx path to set values are 0-based
1217 * mt7601u_set_tx_dac - set which tx DAC to use
1219 * @dac: DAC index, values are 0-based
1230 dev->rf_pa_mode[0] = mt7601u_rr(dev, MT_RF_PA_MODE_CFG0); in mt7601u_phy_init()
1231 dev->rf_pa_mode[1] = mt7601u_rr(dev, MT_RF_PA_MODE_CFG1); in mt7601u_phy_init()
1233 ret = mt7601u_rf_wr(dev, 0, 12, dev->ee->rf_freq_off); in mt7601u_phy_init()
1252 dev->prev_pwr_diff = 100; in mt7601u_phy_init()
1254 INIT_DELAYED_WORK(&dev->cal_work, mt7601u_phy_calibrate); in mt7601u_phy_init()
1255 INIT_DELAYED_WORK(&dev->freq_cal.work, mt7601u_phy_freq_cal); in mt7601u_phy_init()