Lines Matching full:mt76
15 if (test_bit(MT76_REMOVED, &dev->mt76.phy.state)) in mt792x_irq_handler()
22 tasklet_schedule(&dev->mt76.irq_tasklet); in mt792x_irq_handler()
37 intr &= dev->mt76.mmio.irqmask; in mt792x_irq_tasklet()
40 trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask); in mt792x_irq_tasklet()
60 mt76_set_irq_mask(&dev->mt76, irq_map->host_irq_enable, mask, 0); in mt792x_irq_tasklet()
63 napi_schedule(&dev->mt76.tx_napi); in mt792x_irq_tasklet()
66 napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]); in mt792x_irq_tasklet()
69 napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]); in mt792x_irq_tasklet()
72 napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]); in mt792x_irq_tasklet()
78 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); in mt792x_rx_poll_complete()
93 if (is_mt7925(&dev->mt76)) { in mt792x_dma_prefetch()
133 if (is_mt7925(&dev->mt76)) in mt792x_dma_enable()
153 if (is_mt7925(&dev->mt76)) { in mt792x_dma_enable()
161 mt76_connac_irq_enable(&dev->mt76, in mt792x_dma_enable()
187 mt76_queue_reset(dev, dev->mt76.q_mcu[i]); in mt792x_dma_reset()
189 mt76_for_each_q_rx(&dev->mt76, i) in mt792x_dma_reset()
190 mt76_queue_reset(dev, &dev->mt76.q_rx[i]); in mt792x_dma_reset()
192 mt76_tx_status_check(&dev->mt76, true); in mt792x_dma_reset()
202 for (i = 0; i < ARRAY_SIZE(dev->mt76.phy.q_tx); i++) in mt792x_wpdma_reset()
205 for (i = 0; i < ARRAY_SIZE(dev->mt76.q_mcu); i++) in mt792x_wpdma_reset()
206 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[i], true); in mt792x_wpdma_reset()
208 mt76_for_each_q_rx(&dev->mt76, i) in mt792x_wpdma_reset()
209 mt76_queue_rx_cleanup(dev, &dev->mt76.q_rx[i]); in mt792x_wpdma_reset()
220 mt76_for_each_q_rx(&dev->mt76, i) in mt792x_wpdma_reset()
240 dev_err(dev->mt76.dev, "wpdma reset failed\n"); in mt792x_wpdma_reinit_cond()
312 mt76_dma_cleanup(&dev->mt76); in mt792x_dma_cleanup()
320 dev = container_of(napi, struct mt792x_dev, mt76.tx_napi); in mt792x_poll_tx()
324 queue_work(dev->mt76.wq, &dev->pm.wake_work); in mt792x_poll_tx()
328 mt76_connac_tx_cleanup(&dev->mt76); in mt792x_poll_tx()
330 mt76_connac_irq_enable(&dev->mt76, in mt792x_poll_tx()
347 queue_work(dev->mt76.wq, &dev->pm.wake_work); in mt792x_poll_rx()
359 u32 addr = is_mt7921(&dev->mt76) ? 0x18000140 : 0x7c000140; in mt792x_wfsys_reset()
365 if (!__mt76_poll_msec(&dev->mt76, addr, WFSYS_SW_INIT_DONE, in mt792x_wfsys_reset()