11 	s8 offset = 0;  in mt76x2u_mac_fixup_xtal()
16 	offset = eep_val & 0x7f;  in mt76x2u_mac_fixup_xtal()
17 	if ((eep_val & 0xff) == 0xff)  in mt76x2u_mac_fixup_xtal()
18 		offset = 0;  in mt76x2u_mac_fixup_xtal()
19 	else if (eep_val & 0x80)  in mt76x2u_mac_fixup_xtal()
20 		offset = 0 - offset;  in mt76x2u_mac_fixup_xtal()
23 	if (eep_val == 0x00 || eep_val == 0xff) {  in mt76x2u_mac_fixup_xtal()
25 		eep_val &= 0xff;  in mt76x2u_mac_fixup_xtal()
27 		if (eep_val == 0x00 || eep_val == 0xff)  in mt76x2u_mac_fixup_xtal()
28 			eep_val = 0x14;  in mt76x2u_mac_fixup_xtal()
31 	eep_val &= 0x7f;  in mt76x2u_mac_fixup_xtal()
36 	mt76_wr(dev, 0x504, 0x06000000);  in mt76x2u_mac_fixup_xtal()
37 	mt76_wr(dev, 0x50c, 0x08800000);  in mt76x2u_mac_fixup_xtal()
39 	mt76_wr(dev, 0x504, 0x0);  in mt76x2u_mac_fixup_xtal()
43 		       MT_XIFS_TIME_CFG_OFDM_SIFS, 0xd);  in mt76x2u_mac_fixup_xtal()
51 	case 0:  in mt76x2u_mac_fixup_xtal()
52 		mt76_wr(dev, MT_XO_CTRL7, 0x5c1fee80);  in mt76x2u_mac_fixup_xtal()
55 		mt76_wr(dev, MT_XO_CTRL7, 0x5c1feed0);  in mt76x2u_mac_fixup_xtal()
67 	mt76_wr(dev, MT_PBF_TX_MAX_PCNT, 0xefef3f1f);  in mt76x2u_mac_reset()
68 	mt76_wr(dev, MT_PBF_RX_MAX_PCNT, 0xfebf);  in mt76x2u_mac_reset()
72 	mt76_wr(dev, MT_TX_LINK_CFG, 0x1020);  in mt76x2u_mac_reset()
73 	mt76_wr(dev, MT_AUTO_RSP_CFG, 0x13);  in mt76x2u_mac_reset()
74 	mt76_wr(dev, MT_MAX_LEN_CFG, 0x2f00);  in mt76x2u_mac_reset()
76 	mt76_wr(dev, MT_WMM_AIFSN, 0x2273);  in mt76x2u_mac_reset()
77 	mt76_wr(dev, MT_WMM_CWMIN, 0x2344);  in mt76x2u_mac_reset()
78 	mt76_wr(dev, MT_WMM_CWMAX, 0x34aa);  in mt76x2u_mac_reset()
87 	mt76_set(dev, MT_EXT_CCA_CFG, 0xf000);  in mt76x2u_mac_reset()
92 	return 0;  in mt76x2u_mac_reset()
97 	int i, count = 0, val;  in mt76x2u_mac_stop()
111 	for (i = 0; i < 2000; i++) {  in mt76x2u_mac_stop()
119 	for (i = 0; i < 200; i++) {  in mt76x2u_mac_stop()
120 		if (!(mt76_rr(dev, 0x0438) & 0xffffffff) &&  in mt76x2u_mac_stop()
121 		    !(mt76_rr(dev, 0x0a30) & 0x000000ff) &&  in mt76x2u_mac_stop()
122 		    !(mt76_rr(dev, 0x0a34) & 0xff00ff00))  in mt76x2u_mac_stop()
133 	for (i = 0; i < 1000; i++) {  in mt76x2u_mac_stop()
146 		mt76_set(dev, MT_BBP(CORE, 4), BIT(0));  in mt76x2u_mac_stop()
147 		mt76_clear(dev, MT_BBP(CORE, 4), BIT(0));  in mt76x2u_mac_stop()
151 	for (i = 0; i < 200; i++) {  in mt76x2u_mac_stop()
152 		if (!(mt76_rr(dev, 0x0430) & 0x00ff0000) &&  in mt76x2u_mac_stop()
153 		    !(mt76_rr(dev, 0x0a30) & 0xffffffff) &&  in mt76x2u_mac_stop()
154 		    !(mt76_rr(dev, 0x0a34) & 0xffffffff) &&  in mt76x2u_mac_stop()
160 	if (!mt76_poll(dev, MT_MAC_STATUS, MT_MAC_STATUS_RX, 0, 2000))  in mt76x2u_mac_stop()
164 	for (i = 0; i < 2000; i++) {  in mt76x2u_mac_stop()
173 	return 0;  in mt76x2u_mac_stop()