Lines Matching +full:- +full:150
1 // SPDX-License-Identifier: BSD-3-Clause-Clear
30 RADAR_SPEC(0, 8, 2, 15, 106, 150, 10, 4900, 100096, 10, 0,
32 RADAR_SPEC(0, 40, 4, 59, 96, 380, 150, 4900, 100096, 40, 0,
36 RADAR_SPEC(8, 8, 2, 9, 106, 150, 32, 4900, 296704, 32, 0,
39 RADAR_SPEC(0, 8, 2, 15, 106, 150, 10, 4900, 100096, 10, 0,
41 RADAR_SPEC(0, 40, 4, 59, 96, 380, 150, 4900, 100096, 40, 0,
45 RADAR_SPEC(8, 8, 2, 9, 106, 150, 32, 4900, 296704, 32, 0,
48 RADAR_SPEC(0, 8, 2, 15, 106, 150, 10, 4900, 100096, 10, 0,
50 RADAR_SPEC(0, 40, 4, 59, 96, 380, 150, 4900, 100096, 40, 0,
54 RADAR_SPEC(8, 8, 2, 9, 106, 150, 32, 4900, 296704, 32, 0,
60 RADAR_SPEC(0, 8, 2, 12, 106, 150, 5, 2900, 80100, 5, 0,
64 RADAR_SPEC(0, 40, 4, 54, 96, 480, 150, 2900, 80100, 40, 0,
69 RADAR_SPEC(0, 8, 2, 12, 106, 150, 5, 2900, 80100, 5, 0,
73 RADAR_SPEC(0, 40, 4, 54, 96, 480, 150, 2900, 80100, 40, 0,
78 RADAR_SPEC(0, 8, 2, 14, 106, 150, 15, 2900, 80100, 15, 0,
82 RADAR_SPEC(0, 40, 4, 54, 96, 480, 150, 2900, 80100, 40, 0,
90 RADAR_SPEC(0, 8, 2, 7, 106, 150, 5, 2900, 80100, 5, 0,
94 RADAR_SPEC(0, 40, 4, 44, 96, 480, 150, 2900, 80100, 40, 0,
99 RADAR_SPEC(0, 8, 2, 7, 106, 150, 5, 2900, 80100, 5, 0,
103 RADAR_SPEC(0, 40, 4, 44, 96, 480, 150, 2900, 80100, 40, 0,
108 RADAR_SPEC(0, 8, 2, 9, 106, 150, 15, 2900, 80100, 15, 0,
112 RADAR_SPEC(0, 40, 4, 44, 96, 480, 150, 2900, 80100, 40, 0,
120 RADAR_SPEC(0, 8, 2, 9, 106, 150, 20, 28400, 77000, 20, 0,
123 RADAR_SPEC(0, 40, 4, 44, 96, 200, 150, 28400, 77000, 60, 0,
127 RADAR_SPEC(0, 8, 2, 9, 106, 150, 20, 28400, 77000, 20, 0,
130 RADAR_SPEC(0, 40, 4, 44, 96, 200, 150, 28400, 77000, 60, 0,
134 RADAR_SPEC(0, 8, 2, 9, 106, 150, 20, 28400, 77000, 20, 0,
137 RADAR_SPEC(0, 40, 4, 44, 96, 200, 150, 28400, 77000, 60, 0,
154 struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
156 list_add(&seq->head, &dfs_pd->seq_pool);
158 dfs_pd->seq_stats.seq_pool_len++;
159 dfs_pd->seq_stats.seq_len--;
165 struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
168 if (list_empty(&dfs_pd->seq_pool)) {
169 seq = devm_kzalloc(dev->mt76.dev, sizeof(*seq), GFP_ATOMIC);
171 seq = list_first_entry(&dfs_pd->seq_pool,
174 list_del(&seq->head);
175 dfs_pd->seq_stats.seq_pool_len--;
178 dfs_pd->seq_stats.seq_len++;
190 if (abs(val - frac) <= margin)
197 if ((frac - remainder) <= margin)
207 struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
215 for (i = 0; i < ARRAY_SIZE(dfs_pd->event_rb); i++) {
216 dfs_pd->event_rb[i].h_rb = 0;
217 dfs_pd->event_rb[i].t_rb = 0;
220 list_for_each_entry_safe(seq, tmp_seq, &dfs_pd->sequences, head) {
221 list_del_init(&seq->head);
230 struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
233 delta_ts = current_ts - dfs_pd->chirp_pulse_ts;
234 dfs_pd->chirp_pulse_ts = current_ts;
238 if (++dfs_pd->chirp_pulse_cnt > 8)
241 dfs_pd->chirp_pulse_cnt = 1;
253 data = (MT_DFS_CH_EN << 16) | pulse->engine;
257 pulse->period = mt76_rr(dev, MT_BBP(DFS, 19));
260 pulse->w1 = mt76_rr(dev, MT_BBP(DFS, 20));
261 pulse->w2 = mt76_rr(dev, MT_BBP(DFS, 23));
264 pulse->burst = mt76_rr(dev, MT_BBP(DFS, 22));
272 if (!pulse->period || !pulse->w1)
275 switch (dev->mt76.region) {
277 if (pulse->engine > 3)
280 if (pulse->engine == 3) {
286 if (pulse->w1 < 120)
287 ret = (pulse->period >= 2900 &&
288 (pulse->period <= 4700 ||
289 pulse->period >= 6400) &&
290 (pulse->period <= 6800 ||
291 pulse->period >= 10200) &&
292 pulse->period <= 61600);
293 else if (pulse->w1 < 130) /* 120 - 130 */
294 ret = (pulse->period >= 2900 &&
295 pulse->period <= 61600);
297 ret = (pulse->period >= 3500 &&
298 pulse->period <= 10100);
301 if (pulse->engine >= 3)
304 ret = (pulse->period >= 4900 &&
305 (pulse->period <= 10200 ||
306 pulse->period >= 12400) &&
307 pulse->period <= 100100);
310 if (dev->mphy.chandef.chan->center_freq >= 5250 &&
311 dev->mphy.chandef.chan->center_freq <= 5350) {
313 if (pulse->w1 <= 130)
314 ret = (pulse->period >= 28360 &&
315 (pulse->period <= 28700 ||
316 pulse->period >= 76900) &&
317 pulse->period <= 76940);
321 if (pulse->engine > 3)
324 if (pulse->engine == 3) {
330 if (pulse->w1 < 120)
331 ret = (pulse->period >= 2900 &&
332 (pulse->period <= 4700 ||
333 pulse->period >= 6400) &&
334 (pulse->period <= 6800 ||
335 pulse->period >= 27560) &&
336 (pulse->period <= 27960 ||
337 pulse->period >= 28360) &&
338 (pulse->period <= 28700 ||
339 pulse->period >= 79900) &&
340 pulse->period <= 80100);
341 else if (pulse->w1 < 130) /* 120 - 130 */
342 ret = (pulse->period >= 2900 &&
343 (pulse->period <= 10100 ||
344 pulse->period >= 27560) &&
345 (pulse->period <= 27960 ||
346 pulse->period >= 28360) &&
347 (pulse->period <= 28700 ||
348 pulse->period >= 79900) &&
349 pulse->period <= 80100);
351 ret = (pulse->period >= 3900 &&
352 pulse->period <= 10100);
367 /* 1st: DFS_R37[31]: 0 (engine 0) - 1 (engine 2)
380 event->engine = MT_DFS_EVENT_ENGINE(data);
382 event->ts = MT_DFS_EVENT_TIMESTAMP(data);
384 event->width = MT_DFS_EVENT_WIDTH(data);
392 if (event->engine == 2) {
393 struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
394 struct mt76x02_dfs_event_rb *event_buff = &dfs_pd->event_rb[1];
398 last_event_idx = mt76_decr(event_buff->t_rb,
400 delta_ts = event->ts - event_buff->data[last_event_idx].ts;
402 event_buff->data[last_event_idx].width >= 200)
411 struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
415 event_buff = event->engine == 2 ? &dfs_pd->event_rb[1]
416 : &dfs_pd->event_rb[0];
417 event_buff->data[event_buff->t_rb] = *event;
418 event_buff->data[event_buff->t_rb].fetch_ts = jiffies;
420 event_buff->t_rb = mt76_incr(event_buff->t_rb, MT_DFS_EVENT_BUFLEN);
421 if (event_buff->t_rb == event_buff->h_rb)
422 event_buff->h_rb = mt76_incr(event_buff->h_rb,
430 struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
438 event_rb = event->engine == 2 ? &dfs_pd->event_rb[1]
439 : &dfs_pd->event_rb[0];
441 i = mt76_decr(event_rb->t_rb, MT_DFS_EVENT_BUFLEN);
442 end = mt76_decr(event_rb->h_rb, MT_DFS_EVENT_BUFLEN);
445 cur_event = &event_rb->data[i];
446 with_sum = event->width + cur_event->width;
448 sw_params = &dfs_pd->sw_dpd_params;
449 switch (dev->mt76.region) {
458 if (event->engine == 2)
467 return -EINVAL;
470 pri = event->ts - cur_event->ts;
471 if (abs(event->width - cur_event->width) > width_delta ||
472 pri < sw_params->min_pri)
475 if (pri > sw_params->max_pri)
478 seq.pri = event->ts - cur_event->ts;
479 seq.first_ts = cur_event->ts;
480 seq.last_ts = event->ts;
481 seq.engine = event->engine;
486 cur_event = &event_rb->data[j];
487 cur_pri = event->ts - cur_event->ts;
489 sw_params->pri_margin);
491 seq.first_ts = cur_event->ts;
502 return -ENOMEM;
505 INIT_LIST_HEAD(&seq_p->head);
506 list_add(&seq_p->head, &dfs_pd->sequences);
516 struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
522 sw_params = &dfs_pd->sw_dpd_params;
523 list_for_each_entry_safe(seq, tmp_seq, &dfs_pd->sequences, head) {
524 if (event->ts > seq->first_ts + MT_DFS_SEQUENCE_WINDOW) {
525 list_del_init(&seq->head);
530 if (event->engine != seq->engine)
533 pri = event->ts - seq->last_ts;
534 factor = mt76x02_dfs_get_multiple(pri, seq->pri,
535 sw_params->pri_margin);
537 seq->last_ts = event->ts;
538 seq->count++;
539 max_seq_len = max_t(u16, max_seq_len, seq->count);
547 struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
550 if (list_empty(&dfs_pd->sequences))
553 list_for_each_entry(seq, &dfs_pd->sequences, head) {
554 if (seq->count > MT_DFS_SEQUENCE_TH) {
555 dfs_pd->stats[seq->engine].sw_pattern++;
564 struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
574 if (dfs_pd->last_event_ts > event.ts)
576 dfs_pd->last_event_ts = event.ts;
591 struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
596 for (i = 0; i < ARRAY_SIZE(dfs_pd->event_rb); i++) {
597 event_buff = &dfs_pd->event_rb[i];
599 while (event_buff->h_rb != event_buff->t_rb) {
600 event = &event_buff->data[event_buff->h_rb];
603 if (time_is_after_jiffies(event->fetch_ts +
606 event_buff->h_rb = mt76_incr(event_buff->h_rb,
620 if (test_bit(MT76_SCANNING, &dev->mphy.state))
623 if (time_is_before_jiffies(dfs_pd->last_sw_check +
627 dfs_pd->last_sw_check = jiffies;
633 ieee80211_radar_detected(dev->mt76.hw, NULL);
655 dfs_pd->stats[i].hw_pulse_discarded++;
660 dfs_pd->stats[i].hw_pattern++;
661 ieee80211_radar_detected(dev->mt76.hw, NULL);
676 struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
678 switch (dev->mt76.region) {
680 dfs_pd->sw_dpd_params.max_pri = MT_DFS_FCC_MAX_PRI;
681 dfs_pd->sw_dpd_params.min_pri = MT_DFS_FCC_MIN_PRI;
682 dfs_pd->sw_dpd_params.pri_margin = MT_DFS_PRI_MARGIN;
685 dfs_pd->sw_dpd_params.max_pri = MT_DFS_ETSI_MAX_PRI;
686 dfs_pd->sw_dpd_params.min_pri = MT_DFS_ETSI_MIN_PRI;
687 dfs_pd->sw_dpd_params.pri_margin = MT_DFS_PRI_MARGIN << 2;
690 dfs_pd->sw_dpd_params.max_pri = MT_DFS_JP_MAX_PRI;
691 dfs_pd->sw_dpd_params.min_pri = MT_DFS_JP_MIN_PRI;
692 dfs_pd->sw_dpd_params.pri_margin = MT_DFS_PRI_MARGIN;
706 switch (dev->mphy.chandef.width) {
718 switch (dev->mt76.region) {
726 if (dev->mphy.chandef.chan->center_freq >= 5250 &&
727 dev->mphy.chandef.chan->center_freq <= 5350)
809 dfs_r31 -= (agc_r8 & 0x00000038) >> 3;
826 if (mt76_phy_dfs_state(&dev->mphy) > MT_DFS_STATE_DISABLED) {
840 if (mt76_chip(&dev->mt76) == 0x7610 ||
841 mt76_chip(&dev->mt76) == 0x7630)
855 struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
857 INIT_LIST_HEAD(&dfs_pd->sequences);
858 INIT_LIST_HEAD(&dfs_pd->seq_pool);
859 dev->mt76.region = NL80211_DFS_UNSET;
860 dfs_pd->last_sw_check = jiffies;
861 tasklet_setup(&dfs_pd->dfs_tasklet, mt76x02_dfs_tasklet);
868 struct mt76x02_dfs_pattern_detector *dfs_pd = &dev->dfs_pd;
870 mutex_lock(&dev->mt76.mutex);
871 if (dev->mt76.region != region) {
872 tasklet_disable(&dfs_pd->dfs_tasklet);
874 dev->ed_monitor = dev->ed_monitor_enabled &&
878 dev->mt76.region = region;
880 tasklet_enable(&dfs_pd->dfs_tasklet);
882 mutex_unlock(&dev->mt76.mutex);
889 struct mt76x02_dev *dev = hw->priv;
891 mt76x02_dfs_set_domain(dev, request->dfs_region);