20 int iwl_pcie_gen2_apm_init(struct iwl_trans *trans)  in iwl_pcie_gen2_apm_init()  argument
24 	IWL_DEBUG_INFO(trans, "Init card's basic functions\n");  in iwl_pcie_gen2_apm_init()
35 	iwl_set_bit(trans, CSR_GIO_CHICKEN_BITS,  in iwl_pcie_gen2_apm_init()
39 	iwl_set_bit(trans, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);  in iwl_pcie_gen2_apm_init()
45 	iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,  in iwl_pcie_gen2_apm_init()
48 	iwl_pcie_apm_config(trans);  in iwl_pcie_gen2_apm_init()
50 	ret = iwl_finish_nic_init(trans);  in iwl_pcie_gen2_apm_init()
54 	set_bit(STATUS_DEVICE_ENABLED, &trans->status);  in iwl_pcie_gen2_apm_init()
59 static void iwl_pcie_gen2_apm_stop(struct iwl_trans *trans, bool op_mode_leave)  in iwl_pcie_gen2_apm_stop()  argument
61 	IWL_DEBUG_INFO(trans, "Stop card, put in low power state\n");  in iwl_pcie_gen2_apm_stop()
64 		if (!test_bit(STATUS_DEVICE_ENABLED, &trans->status))  in iwl_pcie_gen2_apm_stop()
65 			iwl_pcie_gen2_apm_init(trans);  in iwl_pcie_gen2_apm_stop()
68 		iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,  in iwl_pcie_gen2_apm_stop()
70 		iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,  in iwl_pcie_gen2_apm_stop()
74 		iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,  in iwl_pcie_gen2_apm_stop()
79 	clear_bit(STATUS_DEVICE_ENABLED, &trans->status);  in iwl_pcie_gen2_apm_stop()
82 	iwl_pcie_apm_stop_master(trans);  in iwl_pcie_gen2_apm_stop()
84 	iwl_trans_sw_reset(trans, false);  in iwl_pcie_gen2_apm_stop()
90 	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)  in iwl_pcie_gen2_apm_stop()
91 		iwl_clear_bit(trans, CSR_GP_CNTRL,  in iwl_pcie_gen2_apm_stop()
94 		iwl_clear_bit(trans, CSR_GP_CNTRL,  in iwl_pcie_gen2_apm_stop()
98 void iwl_trans_pcie_fw_reset_handshake(struct iwl_trans *trans)  in iwl_trans_pcie_fw_reset_handshake()  argument
100 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_trans_pcie_fw_reset_handshake()
105 	if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210)  in iwl_trans_pcie_fw_reset_handshake()
106 		iwl_write_umac_prph(trans, UREG_NIC_SET_NMI_DRIVER,  in iwl_trans_pcie_fw_reset_handshake()
108 	else if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210)  in iwl_trans_pcie_fw_reset_handshake()
109 		iwl_write_umac_prph(trans, UREG_DOORBELL_TO_ISR6,  in iwl_trans_pcie_fw_reset_handshake()
112 		iwl_write32(trans, CSR_DOORBELL_VECTOR,  in iwl_trans_pcie_fw_reset_handshake()
120 		u32 inta_hw = iwl_read32(trans, CSR_MSIX_HW_INT_CAUSES_AD);  in iwl_trans_pcie_fw_reset_handshake()
122 		IWL_ERR(trans,  in iwl_trans_pcie_fw_reset_handshake()
131 			iwl_op_mode_nic_error(trans->op_mode,  in iwl_trans_pcie_fw_reset_handshake()
133 			iwl_op_mode_dump_error(trans->op_mode, &mode);  in iwl_trans_pcie_fw_reset_handshake()
140 static void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans)  in _iwl_trans_pcie_gen2_stop_device()  argument
142 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in _iwl_trans_pcie_gen2_stop_device()
149 	if (trans->state >= IWL_TRANS_FW_STARTED &&  in _iwl_trans_pcie_gen2_stop_device()
151 		iwl_trans_pcie_fw_reset_handshake(trans);  in _iwl_trans_pcie_gen2_stop_device()
156 	iwl_disable_interrupts(trans);  in _iwl_trans_pcie_gen2_stop_device()
159 	iwl_pcie_disable_ict(trans);  in _iwl_trans_pcie_gen2_stop_device()
168 	if (test_and_clear_bit(STATUS_DEVICE_ENABLED, &trans->status)) {  in _iwl_trans_pcie_gen2_stop_device()
169 		IWL_DEBUG_INFO(trans,  in _iwl_trans_pcie_gen2_stop_device()
171 		iwl_pcie_synchronize_irqs(trans);  in _iwl_trans_pcie_gen2_stop_device()
172 		iwl_pcie_rx_napi_sync(trans);  in _iwl_trans_pcie_gen2_stop_device()
173 		iwl_txq_gen2_tx_free(trans);  in _iwl_trans_pcie_gen2_stop_device()
174 		iwl_pcie_rx_stop(trans);  in _iwl_trans_pcie_gen2_stop_device()
177 	iwl_pcie_ctxt_info_free_paging(trans);  in _iwl_trans_pcie_gen2_stop_device()
178 	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)  in _iwl_trans_pcie_gen2_stop_device()
179 		iwl_pcie_ctxt_info_gen3_free(trans, false);  in _iwl_trans_pcie_gen2_stop_device()
181 		iwl_pcie_ctxt_info_free(trans);  in _iwl_trans_pcie_gen2_stop_device()
184 	iwl_pcie_gen2_apm_stop(trans, false);  in _iwl_trans_pcie_gen2_stop_device()
187 	iwl_trans_sw_reset(trans, true);  in _iwl_trans_pcie_gen2_stop_device()
205 	iwl_disable_interrupts(trans);  in _iwl_trans_pcie_gen2_stop_device()
208 	clear_bit(STATUS_SYNC_HCMD_ACTIVE, &trans->status);  in _iwl_trans_pcie_gen2_stop_device()
209 	clear_bit(STATUS_INT_ENABLED, &trans->status);  in _iwl_trans_pcie_gen2_stop_device()
210 	clear_bit(STATUS_TPOWER_PMI, &trans->status);  in _iwl_trans_pcie_gen2_stop_device()
216 	iwl_enable_rfkill_int(trans);  in _iwl_trans_pcie_gen2_stop_device()
219 void iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans)  in iwl_trans_pcie_gen2_stop_device()  argument
221 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_trans_pcie_gen2_stop_device()
224 	iwl_op_mode_time_point(trans->op_mode,  in iwl_trans_pcie_gen2_stop_device()
230 	was_in_rfkill = test_bit(STATUS_RFKILL_OPMODE, &trans->status);  in iwl_trans_pcie_gen2_stop_device()
231 	_iwl_trans_pcie_gen2_stop_device(trans);  in iwl_trans_pcie_gen2_stop_device()
232 	iwl_trans_pcie_handle_stop_rfkill(trans, was_in_rfkill);  in iwl_trans_pcie_gen2_stop_device()
236 static int iwl_pcie_gen2_nic_init(struct iwl_trans *trans)  in iwl_pcie_gen2_nic_init()  argument
238 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_pcie_gen2_nic_init()
240 			       trans->cfg->min_txq_size);  in iwl_pcie_gen2_nic_init()
245 	ret = iwl_pcie_gen2_apm_init(trans);  in iwl_pcie_gen2_nic_init()
250 	iwl_op_mode_nic_config(trans->op_mode);  in iwl_pcie_gen2_nic_init()
253 	if (iwl_pcie_gen2_rx_init(trans))  in iwl_pcie_gen2_nic_init()
257 	if (iwl_txq_gen2_init(trans, trans_pcie->txqs.cmd.q_id, queue_size))  in iwl_pcie_gen2_nic_init()
261 	iwl_set_bit(trans, CSR_MAC_SHADOW_REG_CTRL, 0x800FFFFF);  in iwl_pcie_gen2_nic_init()
262 	IWL_DEBUG_INFO(trans, "Enabling shadow registers in device\n");  in iwl_pcie_gen2_nic_init()
267 static void iwl_pcie_get_rf_name(struct iwl_trans *trans)  in iwl_pcie_get_rf_name()  argument
269 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_pcie_get_rf_name()
278 	switch (CSR_HW_RFID_TYPE(trans->hw_rf_id)) {  in iwl_pcie_get_rf_name()
302 		    CSR_HW_RFID_STEP(trans->hw_rf_id))  in iwl_pcie_get_rf_name()
311 	switch (CSR_HW_RFID_TYPE(trans->hw_rf_id)) {  in iwl_pcie_get_rf_name()
315 		version = iwl_read_prph(trans, CNVI_MBOX_C);  in iwl_pcie_get_rf_name()
334 			 trans->hw_rf_id);  in iwl_pcie_get_rf_name()
336 	IWL_INFO(trans, "Detected RF %s\n", buf);  in iwl_pcie_get_rf_name()
346 void iwl_trans_pcie_gen2_fw_alive(struct iwl_trans *trans)  in iwl_trans_pcie_gen2_fw_alive()  argument
348 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_trans_pcie_gen2_fw_alive()
350 	iwl_pcie_reset_ict(trans);  in iwl_trans_pcie_gen2_fw_alive()
361 	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)  in iwl_trans_pcie_gen2_fw_alive()
362 		iwl_pcie_ctxt_info_gen3_free(trans, true);  in iwl_trans_pcie_gen2_fw_alive()
364 		iwl_pcie_ctxt_info_free(trans);  in iwl_trans_pcie_gen2_fw_alive()
370 	iwl_enable_interrupts(trans);  in iwl_trans_pcie_gen2_fw_alive()
372 	iwl_pcie_check_hw_rf_kill(trans);  in iwl_trans_pcie_gen2_fw_alive()
374 	iwl_pcie_get_rf_name(trans);  in iwl_trans_pcie_gen2_fw_alive()
378 static bool iwl_pcie_set_ltr(struct iwl_trans *trans)  in iwl_pcie_set_ltr()  argument
395 	if ((trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210 ||  in iwl_pcie_set_ltr()
396 	     trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000) &&  in iwl_pcie_set_ltr()
397 	    !trans->trans_cfg->integrated) {  in iwl_pcie_set_ltr()
398 		iwl_write32(trans, CSR_LTR_LONG_VAL_AD, ltr_val);  in iwl_pcie_set_ltr()
402 	if (trans->trans_cfg->integrated &&  in iwl_pcie_set_ltr()
403 	    trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000) {  in iwl_pcie_set_ltr()
404 		iwl_write_prph(trans, HPM_MAC_LTR_CSR, HPM_MAC_LRT_ENABLE_ALL);  in iwl_pcie_set_ltr()
405 		iwl_write_prph(trans, HPM_UMAC_LTR, ltr_val);  in iwl_pcie_set_ltr()
409 	if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) {  in iwl_pcie_set_ltr()
411 		iwl_write32(trans, CSR_MSIX_HW_INT_CAUSES_AD,  in iwl_pcie_set_ltr()
427 static void iwl_pcie_spin_for_iml(struct iwl_trans *trans)  in iwl_pcie_spin_for_iml()  argument
431 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_pcie_spin_for_iml()
439 	value = iwl_read32(trans, CSR_LTR_LAST_MSG);  in iwl_pcie_spin_for_iml()
440 	IWL_DEBUG_INFO(trans, "Polling for IML load - CSR_LTR_LAST_MSG=0x%x\n",  in iwl_pcie_spin_for_iml()
444 		if (iwl_read32(trans, CSR_MSIX_HW_INT_CAUSES_AD) &  in iwl_pcie_spin_for_iml()
450 		value = iwl_read32(trans, CSR_LTR_LAST_MSG);  in iwl_pcie_spin_for_iml()
454 	IWL_DEBUG_INFO(trans,  in iwl_pcie_spin_for_iml()
465 int iwl_trans_pcie_gen2_start_fw(struct iwl_trans *trans,  in iwl_trans_pcie_gen2_start_fw()  argument
468 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_trans_pcie_gen2_start_fw()
473 	if (iwl_pcie_prepare_card_hw(trans)) {  in iwl_trans_pcie_gen2_start_fw()
474 		IWL_WARN(trans, "Exit HW not ready\n");  in iwl_trans_pcie_gen2_start_fw()
478 	iwl_enable_rfkill_int(trans);  in iwl_trans_pcie_gen2_start_fw()
480 	iwl_write32(trans, CSR_INT, 0xFFFFFFFF);  in iwl_trans_pcie_gen2_start_fw()
487 	iwl_disable_interrupts(trans);  in iwl_trans_pcie_gen2_start_fw()
490 	iwl_pcie_synchronize_irqs(trans);  in iwl_trans_pcie_gen2_start_fw()
495 	hw_rfkill = iwl_pcie_check_hw_rf_kill(trans);  in iwl_trans_pcie_gen2_start_fw()
503 		IWL_WARN(trans,  in iwl_trans_pcie_gen2_start_fw()
510 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);  in iwl_trans_pcie_gen2_start_fw()
511 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR,  in iwl_trans_pcie_gen2_start_fw()
515 	iwl_write32(trans, CSR_INT, 0xFFFFFFFF);  in iwl_trans_pcie_gen2_start_fw()
517 	ret = iwl_pcie_gen2_nic_init(trans);  in iwl_trans_pcie_gen2_start_fw()
519 		IWL_ERR(trans, "Unable to init nic\n");  in iwl_trans_pcie_gen2_start_fw()
523 	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)  in iwl_trans_pcie_gen2_start_fw()
524 		ret = iwl_pcie_ctxt_info_gen3_init(trans, fw);  in iwl_trans_pcie_gen2_start_fw()
526 		ret = iwl_pcie_ctxt_info_init(trans, fw);  in iwl_trans_pcie_gen2_start_fw()
530 	keep_ram_busy = !iwl_pcie_set_ltr(trans);  in iwl_trans_pcie_gen2_start_fw()
532 	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) {  in iwl_trans_pcie_gen2_start_fw()
533 		IWL_DEBUG_POWER(trans, "function scratch register value is 0x%08x\n",  in iwl_trans_pcie_gen2_start_fw()
534 				iwl_read32(trans, CSR_FUNC_SCRATCH));  in iwl_trans_pcie_gen2_start_fw()
535 		iwl_write32(trans, CSR_FUNC_SCRATCH, CSR_FUNC_SCRATCH_INIT_VALUE);  in iwl_trans_pcie_gen2_start_fw()
536 		iwl_set_bit(trans, CSR_GP_CNTRL,  in iwl_trans_pcie_gen2_start_fw()
538 	} else if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {  in iwl_trans_pcie_gen2_start_fw()
539 		iwl_write_umac_prph(trans, UREG_CPU_INIT_RUN, 1);  in iwl_trans_pcie_gen2_start_fw()
541 		iwl_write_prph(trans, UREG_CPU_INIT_RUN, 1);  in iwl_trans_pcie_gen2_start_fw()
545 		iwl_pcie_spin_for_iml(trans);  in iwl_trans_pcie_gen2_start_fw()
548 	hw_rfkill = iwl_pcie_check_hw_rf_kill(trans);  in iwl_trans_pcie_gen2_start_fw()