Lines Matching full:trans
6 #include "iwl-trans.h"
20 int iwl_pcie_gen2_apm_init(struct iwl_trans *trans) in iwl_pcie_gen2_apm_init() argument
24 IWL_DEBUG_INFO(trans, "Init card's basic functions\n"); in iwl_pcie_gen2_apm_init()
35 iwl_set_bit(trans, CSR_GIO_CHICKEN_BITS, in iwl_pcie_gen2_apm_init()
39 iwl_set_bit(trans, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL); in iwl_pcie_gen2_apm_init()
45 iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG, in iwl_pcie_gen2_apm_init()
48 iwl_pcie_apm_config(trans); in iwl_pcie_gen2_apm_init()
50 ret = iwl_finish_nic_init(trans); in iwl_pcie_gen2_apm_init()
54 set_bit(STATUS_DEVICE_ENABLED, &trans->status); in iwl_pcie_gen2_apm_init()
59 static void iwl_pcie_gen2_apm_stop(struct iwl_trans *trans, bool op_mode_leave) in iwl_pcie_gen2_apm_stop() argument
61 IWL_DEBUG_INFO(trans, "Stop card, put in low power state\n"); in iwl_pcie_gen2_apm_stop()
64 if (!test_bit(STATUS_DEVICE_ENABLED, &trans->status)) in iwl_pcie_gen2_apm_stop()
65 iwl_pcie_gen2_apm_init(trans); in iwl_pcie_gen2_apm_stop()
68 iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG, in iwl_pcie_gen2_apm_stop()
70 iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG, in iwl_pcie_gen2_apm_stop()
74 iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG, in iwl_pcie_gen2_apm_stop()
79 clear_bit(STATUS_DEVICE_ENABLED, &trans->status); in iwl_pcie_gen2_apm_stop()
82 iwl_pcie_apm_stop_master(trans); in iwl_pcie_gen2_apm_stop()
84 iwl_trans_sw_reset(trans, false); in iwl_pcie_gen2_apm_stop()
90 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) in iwl_pcie_gen2_apm_stop()
91 iwl_clear_bit(trans, CSR_GP_CNTRL, in iwl_pcie_gen2_apm_stop()
94 iwl_clear_bit(trans, CSR_GP_CNTRL, in iwl_pcie_gen2_apm_stop()
98 static void iwl_trans_pcie_fw_reset_handshake(struct iwl_trans *trans) in iwl_trans_pcie_fw_reset_handshake() argument
100 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_fw_reset_handshake()
105 if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210) in iwl_trans_pcie_fw_reset_handshake()
106 iwl_write_umac_prph(trans, UREG_NIC_SET_NMI_DRIVER, in iwl_trans_pcie_fw_reset_handshake()
108 else if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) in iwl_trans_pcie_fw_reset_handshake()
109 iwl_write_umac_prph(trans, UREG_DOORBELL_TO_ISR6, in iwl_trans_pcie_fw_reset_handshake()
112 iwl_write32(trans, CSR_DOORBELL_VECTOR, in iwl_trans_pcie_fw_reset_handshake()
120 u32 inta_hw = iwl_read32(trans, CSR_MSIX_HW_INT_CAUSES_AD); in iwl_trans_pcie_fw_reset_handshake()
122 IWL_ERR(trans, in iwl_trans_pcie_fw_reset_handshake()
127 iwl_trans_fw_error(trans, true); in iwl_trans_pcie_fw_reset_handshake()
133 void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans) in _iwl_trans_pcie_gen2_stop_device() argument
135 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in _iwl_trans_pcie_gen2_stop_device()
142 if (trans->state >= IWL_TRANS_FW_STARTED) in _iwl_trans_pcie_gen2_stop_device()
144 iwl_trans_pcie_fw_reset_handshake(trans); in _iwl_trans_pcie_gen2_stop_device()
149 iwl_disable_interrupts(trans); in _iwl_trans_pcie_gen2_stop_device()
152 iwl_pcie_disable_ict(trans); in _iwl_trans_pcie_gen2_stop_device()
161 if (test_and_clear_bit(STATUS_DEVICE_ENABLED, &trans->status)) { in _iwl_trans_pcie_gen2_stop_device()
162 IWL_DEBUG_INFO(trans, in _iwl_trans_pcie_gen2_stop_device()
164 iwl_pcie_synchronize_irqs(trans); in _iwl_trans_pcie_gen2_stop_device()
165 iwl_pcie_rx_napi_sync(trans); in _iwl_trans_pcie_gen2_stop_device()
166 iwl_txq_gen2_tx_free(trans); in _iwl_trans_pcie_gen2_stop_device()
167 iwl_pcie_rx_stop(trans); in _iwl_trans_pcie_gen2_stop_device()
170 iwl_pcie_ctxt_info_free_paging(trans); in _iwl_trans_pcie_gen2_stop_device()
171 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) in _iwl_trans_pcie_gen2_stop_device()
172 iwl_pcie_ctxt_info_gen3_free(trans, false); in _iwl_trans_pcie_gen2_stop_device()
174 iwl_pcie_ctxt_info_free(trans); in _iwl_trans_pcie_gen2_stop_device()
177 iwl_pcie_gen2_apm_stop(trans, false); in _iwl_trans_pcie_gen2_stop_device()
180 iwl_trans_sw_reset(trans, true); in _iwl_trans_pcie_gen2_stop_device()
198 iwl_disable_interrupts(trans); in _iwl_trans_pcie_gen2_stop_device()
201 clear_bit(STATUS_SYNC_HCMD_ACTIVE, &trans->status); in _iwl_trans_pcie_gen2_stop_device()
202 clear_bit(STATUS_INT_ENABLED, &trans->status); in _iwl_trans_pcie_gen2_stop_device()
203 clear_bit(STATUS_TPOWER_PMI, &trans->status); in _iwl_trans_pcie_gen2_stop_device()
209 iwl_enable_rfkill_int(trans); in _iwl_trans_pcie_gen2_stop_device()
212 void iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans) in iwl_trans_pcie_gen2_stop_device() argument
214 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_gen2_stop_device()
217 iwl_op_mode_time_point(trans->op_mode, in iwl_trans_pcie_gen2_stop_device()
223 was_in_rfkill = test_bit(STATUS_RFKILL_OPMODE, &trans->status); in iwl_trans_pcie_gen2_stop_device()
224 _iwl_trans_pcie_gen2_stop_device(trans); in iwl_trans_pcie_gen2_stop_device()
225 iwl_trans_pcie_handle_stop_rfkill(trans, was_in_rfkill); in iwl_trans_pcie_gen2_stop_device()
229 static int iwl_pcie_gen2_nic_init(struct iwl_trans *trans) in iwl_pcie_gen2_nic_init() argument
231 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_gen2_nic_init()
233 trans->cfg->min_txq_size); in iwl_pcie_gen2_nic_init()
238 ret = iwl_pcie_gen2_apm_init(trans); in iwl_pcie_gen2_nic_init()
243 iwl_op_mode_nic_config(trans->op_mode); in iwl_pcie_gen2_nic_init()
246 if (iwl_pcie_gen2_rx_init(trans)) in iwl_pcie_gen2_nic_init()
250 if (iwl_txq_gen2_init(trans, trans_pcie->txqs.cmd.q_id, queue_size)) in iwl_pcie_gen2_nic_init()
254 iwl_set_bit(trans, CSR_MAC_SHADOW_REG_CTRL, 0x800FFFFF); in iwl_pcie_gen2_nic_init()
255 IWL_DEBUG_INFO(trans, "Enabling shadow registers in device\n"); in iwl_pcie_gen2_nic_init()
260 static void iwl_pcie_get_rf_name(struct iwl_trans *trans) in iwl_pcie_get_rf_name() argument
262 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_get_rf_name()
271 switch (CSR_HW_RFID_TYPE(trans->hw_rf_id)) { in iwl_pcie_get_rf_name()
298 CSR_HW_RFID_STEP(trans->hw_rf_id)) in iwl_pcie_get_rf_name()
307 switch (CSR_HW_RFID_TYPE(trans->hw_rf_id)) { in iwl_pcie_get_rf_name()
311 version = iwl_read_prph(trans, CNVI_MBOX_C); in iwl_pcie_get_rf_name()
330 trans->hw_rf_id); in iwl_pcie_get_rf_name()
332 IWL_INFO(trans, "Detected RF %s\n", buf); in iwl_pcie_get_rf_name()
342 void iwl_trans_pcie_gen2_fw_alive(struct iwl_trans *trans) in iwl_trans_pcie_gen2_fw_alive() argument
344 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_gen2_fw_alive()
346 iwl_pcie_reset_ict(trans); in iwl_trans_pcie_gen2_fw_alive()
357 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) in iwl_trans_pcie_gen2_fw_alive()
358 iwl_pcie_ctxt_info_gen3_free(trans, true); in iwl_trans_pcie_gen2_fw_alive()
360 iwl_pcie_ctxt_info_free(trans); in iwl_trans_pcie_gen2_fw_alive()
366 iwl_enable_interrupts(trans); in iwl_trans_pcie_gen2_fw_alive()
368 iwl_pcie_check_hw_rf_kill(trans); in iwl_trans_pcie_gen2_fw_alive()
370 iwl_pcie_get_rf_name(trans); in iwl_trans_pcie_gen2_fw_alive()
374 static bool iwl_pcie_set_ltr(struct iwl_trans *trans) in iwl_pcie_set_ltr() argument
391 if ((trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210 || in iwl_pcie_set_ltr()
392 trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000) && in iwl_pcie_set_ltr()
393 !trans->trans_cfg->integrated) { in iwl_pcie_set_ltr()
394 iwl_write32(trans, CSR_LTR_LONG_VAL_AD, ltr_val); in iwl_pcie_set_ltr()
398 if (trans->trans_cfg->integrated && in iwl_pcie_set_ltr()
399 trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000) { in iwl_pcie_set_ltr()
400 iwl_write_prph(trans, HPM_MAC_LTR_CSR, HPM_MAC_LRT_ENABLE_ALL); in iwl_pcie_set_ltr()
401 iwl_write_prph(trans, HPM_UMAC_LTR, ltr_val); in iwl_pcie_set_ltr()
405 if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) { in iwl_pcie_set_ltr()
407 iwl_write32(trans, CSR_MSIX_HW_INT_CAUSES_AD, in iwl_pcie_set_ltr()
423 static void iwl_pcie_spin_for_iml(struct iwl_trans *trans) in iwl_pcie_spin_for_iml() argument
427 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_spin_for_iml()
435 value = iwl_read32(trans, CSR_LTR_LAST_MSG); in iwl_pcie_spin_for_iml()
436 IWL_DEBUG_INFO(trans, "Polling for IML load - CSR_LTR_LAST_MSG=0x%x\n", in iwl_pcie_spin_for_iml()
440 if (iwl_read32(trans, CSR_MSIX_HW_INT_CAUSES_AD) & in iwl_pcie_spin_for_iml()
446 value = iwl_read32(trans, CSR_LTR_LAST_MSG); in iwl_pcie_spin_for_iml()
450 IWL_DEBUG_INFO(trans, in iwl_pcie_spin_for_iml()
461 int iwl_trans_pcie_gen2_start_fw(struct iwl_trans *trans, in iwl_trans_pcie_gen2_start_fw() argument
464 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_gen2_start_fw()
469 if (iwl_pcie_prepare_card_hw(trans)) { in iwl_trans_pcie_gen2_start_fw()
470 IWL_WARN(trans, "Exit HW not ready\n"); in iwl_trans_pcie_gen2_start_fw()
474 iwl_enable_rfkill_int(trans); in iwl_trans_pcie_gen2_start_fw()
476 iwl_write32(trans, CSR_INT, 0xFFFFFFFF); in iwl_trans_pcie_gen2_start_fw()
483 iwl_disable_interrupts(trans); in iwl_trans_pcie_gen2_start_fw()
486 iwl_pcie_synchronize_irqs(trans); in iwl_trans_pcie_gen2_start_fw()
491 hw_rfkill = iwl_pcie_check_hw_rf_kill(trans); in iwl_trans_pcie_gen2_start_fw()
499 IWL_WARN(trans, in iwl_trans_pcie_gen2_start_fw()
506 iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); in iwl_trans_pcie_gen2_start_fw()
507 iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, in iwl_trans_pcie_gen2_start_fw()
511 iwl_write32(trans, CSR_INT, 0xFFFFFFFF); in iwl_trans_pcie_gen2_start_fw()
513 ret = iwl_pcie_gen2_nic_init(trans); in iwl_trans_pcie_gen2_start_fw()
515 IWL_ERR(trans, "Unable to init nic\n"); in iwl_trans_pcie_gen2_start_fw()
519 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) in iwl_trans_pcie_gen2_start_fw()
520 ret = iwl_pcie_ctxt_info_gen3_init(trans, fw); in iwl_trans_pcie_gen2_start_fw()
522 ret = iwl_pcie_ctxt_info_init(trans, fw); in iwl_trans_pcie_gen2_start_fw()
526 keep_ram_busy = !iwl_pcie_set_ltr(trans); in iwl_trans_pcie_gen2_start_fw()
528 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) { in iwl_trans_pcie_gen2_start_fw()
529 IWL_DEBUG_POWER(trans, "function scratch register value is 0x%08x\n", in iwl_trans_pcie_gen2_start_fw()
530 iwl_read32(trans, CSR_FUNC_SCRATCH)); in iwl_trans_pcie_gen2_start_fw()
531 iwl_write32(trans, CSR_FUNC_SCRATCH, CSR_FUNC_SCRATCH_INIT_VALUE); in iwl_trans_pcie_gen2_start_fw()
532 iwl_set_bit(trans, CSR_GP_CNTRL, in iwl_trans_pcie_gen2_start_fw()
534 } else if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) { in iwl_trans_pcie_gen2_start_fw()
535 iwl_write_umac_prph(trans, UREG_CPU_INIT_RUN, 1); in iwl_trans_pcie_gen2_start_fw()
537 iwl_write_prph(trans, UREG_CPU_INIT_RUN, 1); in iwl_trans_pcie_gen2_start_fw()
541 iwl_pcie_spin_for_iml(trans); in iwl_trans_pcie_gen2_start_fw()
544 hw_rfkill = iwl_pcie_check_hw_rf_kill(trans); in iwl_trans_pcie_gen2_start_fw()