Lines Matching defs:trans
17 void iwl_write8(struct iwl_trans *trans, u32 ofs, u8 val)
19 trace_iwlwifi_dev_iowrite8(trans->dev, ofs, val);
20 iwl_trans_write8(trans, ofs, val);
24 void iwl_write32(struct iwl_trans *trans, u32 ofs, u32 val)
26 trace_iwlwifi_dev_iowrite32(trans->dev, ofs, val);
27 iwl_trans_write32(trans, ofs, val);
31 void iwl_write64(struct iwl_trans *trans, u64 ofs, u64 val)
33 trace_iwlwifi_dev_iowrite64(trans->dev, ofs, val);
34 iwl_trans_write32(trans, ofs, lower_32_bits(val));
35 iwl_trans_write32(trans, ofs + 4, upper_32_bits(val));
39 u32 iwl_read32(struct iwl_trans *trans, u32 ofs)
41 u32 val = iwl_trans_read32(trans, ofs);
43 trace_iwlwifi_dev_ioread32(trans->dev, ofs, val);
50 int iwl_poll_bit(struct iwl_trans *trans, u32 addr,
56 if ((iwl_read32(trans, addr) & mask) == (bits & mask))
66 u32 iwl_read_direct32(struct iwl_trans *trans, u32 reg)
68 if (iwl_trans_grab_nic_access(trans)) {
69 u32 value = iwl_read32(trans, reg);
71 iwl_trans_release_nic_access(trans);
80 void iwl_write_direct32(struct iwl_trans *trans, u32 reg, u32 value)
82 if (iwl_trans_grab_nic_access(trans)) {
83 iwl_write32(trans, reg, value);
84 iwl_trans_release_nic_access(trans);
89 void iwl_write_direct64(struct iwl_trans *trans, u64 reg, u64 value)
91 if (iwl_trans_grab_nic_access(trans)) {
92 iwl_write64(trans, reg, value);
93 iwl_trans_release_nic_access(trans);
98 int iwl_poll_direct_bit(struct iwl_trans *trans, u32 addr, u32 mask,
104 if ((iwl_read_direct32(trans, addr) & mask) == mask)
114 u32 iwl_read_prph_no_grab(struct iwl_trans *trans, u32 ofs)
116 u32 val = iwl_trans_read_prph(trans, ofs);
117 trace_iwlwifi_dev_ioread_prph32(trans->dev, ofs, val);
122 void iwl_write_prph_no_grab(struct iwl_trans *trans, u32 ofs, u32 val)
124 trace_iwlwifi_dev_iowrite_prph32(trans->dev, ofs, val);
125 iwl_trans_write_prph(trans, ofs, val);
129 void iwl_write_prph64_no_grab(struct iwl_trans *trans, u64 ofs, u64 val)
131 trace_iwlwifi_dev_iowrite_prph64(trans->dev, ofs, val);
132 iwl_write_prph_no_grab(trans, ofs, val & 0xffffffff);
133 iwl_write_prph_no_grab(trans, ofs + 4, val >> 32);
137 u32 iwl_read_prph(struct iwl_trans *trans, u32 ofs)
139 if (iwl_trans_grab_nic_access(trans)) {
140 u32 val = iwl_read_prph_no_grab(trans, ofs);
142 iwl_trans_release_nic_access(trans);
152 void iwl_write_prph_delay(struct iwl_trans *trans, u32 ofs, u32 val, u32 delay_ms)
154 if (iwl_trans_grab_nic_access(trans)) {
156 iwl_write_prph_no_grab(trans, ofs, val);
157 iwl_trans_release_nic_access(trans);
162 int iwl_poll_prph_bit(struct iwl_trans *trans, u32 addr,
168 if ((iwl_read_prph(trans, addr) & mask) == (bits & mask))
177 void iwl_set_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
179 if (iwl_trans_grab_nic_access(trans)) {
180 iwl_write_prph_no_grab(trans, ofs,
181 iwl_read_prph_no_grab(trans, ofs) |
183 iwl_trans_release_nic_access(trans);
188 void iwl_set_bits_mask_prph(struct iwl_trans *trans, u32 ofs,
191 if (iwl_trans_grab_nic_access(trans)) {
192 iwl_write_prph_no_grab(trans, ofs,
193 (iwl_read_prph_no_grab(trans, ofs) &
195 iwl_trans_release_nic_access(trans);
200 void iwl_clear_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
204 if (iwl_trans_grab_nic_access(trans)) {
205 val = iwl_read_prph_no_grab(trans, ofs);
206 iwl_write_prph_no_grab(trans, ofs, (val & ~mask));
207 iwl_trans_release_nic_access(trans);
212 void iwl_force_nmi(struct iwl_trans *trans)
214 if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_9000)
215 iwl_write_prph_delay(trans, DEVICE_SET_NMI_REG,
217 else if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210)
218 iwl_write_umac_prph(trans, UREG_NIC_SET_NMI_DRIVER,
220 else if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_BZ)
221 iwl_write_umac_prph(trans, UREG_DOORBELL_TO_ISR6,
224 iwl_write32(trans, CSR_DOORBELL_VECTOR,
260 static int iwl_dump_rfh(struct iwl_trans *trans, char **buf)
263 int num_q = trans->num_rx_queues;
302 iwl_read_prph(trans, rfh_tbl[i]));
312 iwl_read_prph(trans, addr));
319 IWL_ERR(trans, "RFH register values:\n");
321 IWL_ERR(trans, " %34s: 0X%08x\n",
323 iwl_read_prph(trans, rfh_tbl[i]));
330 IWL_ERR(trans, " %34s(q %d): 0X%08x\n",
332 iwl_read_prph(trans, addr));
356 int iwl_dump_fh(struct iwl_trans *trans, char **buf)
371 if (trans->trans_cfg->mq_rx_supported)
372 return iwl_dump_rfh(trans, buf);
390 iwl_read_direct32(trans, fh_tbl[i]));
396 IWL_ERR(trans, "FH register values:\n");
398 IWL_ERR(trans, " %34s: 0X%08x\n",
400 iwl_read_direct32(trans, fh_tbl[i]));
412 static void iwl_dump_host_monitor_block(struct iwl_trans *trans,
417 IWL_ERR(trans, "Host monitor block 0x%x vector 0x%x\n", block, vec);
418 iwl_write32(trans, CSR_MONITOR_CFG_REG, (block << 8) | vec);
420 IWL_ERR(trans, " value [iter %d]: 0x%08x\n",
421 i, iwl_read32(trans, CSR_MONITOR_STATUS_REG));
424 static void iwl_dump_host_monitor(struct iwl_trans *trans)
426 switch (trans->trans_cfg->device_family) {
429 IWL_ERR(trans, "CSR_RESET = 0x%x\n",
430 iwl_read32(trans, CSR_RESET));
431 iwl_dump_host_monitor_block(trans, IWL_HOST_MON_BLOCK_PEMON,
433 iwl_dump_host_monitor_block(trans, IWL_HOST_MON_BLOCK_PEMON,
435 iwl_dump_host_monitor_block(trans, IWL_HOST_MON_BLOCK_PEMON,
437 iwl_dump_host_monitor_block(trans, IWL_HOST_MON_BLOCK_HIPM,
446 int iwl_finish_nic_init(struct iwl_trans *trans)
448 const struct iwl_cfg_trans_params *cfg_trans = trans->trans_cfg;
462 iwl_set_bit(trans, CSR_GP_CNTRL,
467 iwl_set_bit(trans, CSR_GP_CNTRL,
480 err = iwl_poll_bit(trans, CSR_GP_CNTRL, poll_ready, poll_ready, 25000);
482 IWL_DEBUG_INFO(trans, "Failed to wake NIC\n");
484 iwl_dump_host_monitor(trans);
496 void iwl_trans_sync_nmi_with_addr(struct iwl_trans *trans, u32 inta_addr,
500 bool interrupts_enabled = test_bit(STATUS_INT_ENABLED, &trans->status);
506 iwl_trans_interrupts(trans, false);
508 iwl_force_nmi(trans);
510 u32 inta_hw = iwl_read32(trans, inta_addr);
515 iwl_write32(trans, inta_addr, inta_hw & sw_err_bit);
527 iwl_trans_interrupts(trans, true);
529 iwl_trans_fw_error(trans, IWL_ERR_TYPE_NMI_FORCED);