Lines Matching full:trans
7 #include "iwl-trans.h"
99 static int iwl_dbg_tlv_alloc_debug_info(struct iwl_trans *trans, in iwl_dbg_tlv_alloc_debug_info() argument
113 IWL_DEBUG_FW(trans, "WRT: Loading debug cfg: %s\n", in iwl_dbg_tlv_alloc_debug_info()
116 if (!iwl_dbg_tlv_add(tlv, &trans->dbg.debug_info_tlv_list)) in iwl_dbg_tlv_alloc_debug_info()
121 static int iwl_dbg_tlv_alloc_buf_alloc(struct iwl_trans *trans, in iwl_dbg_tlv_alloc_buf_alloc() argument
152 IWL_ERR(trans, "WRT: Invalid DRAM buffer allocation requested size (0)\n"); in iwl_dbg_tlv_alloc_buf_alloc()
156 trans->dbg.fw_mon_cfg[alloc_id] = *alloc; in iwl_dbg_tlv_alloc_buf_alloc()
160 IWL_ERR(trans, in iwl_dbg_tlv_alloc_buf_alloc()
166 static int iwl_dbg_tlv_alloc_hcmd(struct iwl_trans *trans, in iwl_dbg_tlv_alloc_hcmd() argument
181 IWL_ERR(trans, in iwl_dbg_tlv_alloc_hcmd()
187 if (!iwl_dbg_tlv_add(tlv, &trans->dbg.time_point[tp].hcmd_list)) in iwl_dbg_tlv_alloc_hcmd()
192 static int iwl_dbg_tlv_alloc_region(struct iwl_trans *trans, in iwl_dbg_tlv_alloc_region() argument
212 IWL_DEBUG_FW(trans, "WRT: parsing region: %.*s\n", in iwl_dbg_tlv_alloc_region()
216 IWL_ERR(trans, "WRT: Invalid region id %u\n", id); in iwl_dbg_tlv_alloc_region()
222 IWL_ERR(trans, "WRT: Invalid region type %u\n", type); in iwl_dbg_tlv_alloc_region()
227 trans->dbg.imr_data.sram_addr = in iwl_dbg_tlv_alloc_region()
229 trans->dbg.imr_data.sram_size = in iwl_dbg_tlv_alloc_region()
234 active_reg = &trans->dbg.active_regions[id]; in iwl_dbg_tlv_alloc_region()
236 IWL_WARN(trans, "WRT: Overriding region id %u\n", id); in iwl_dbg_tlv_alloc_region()
245 IWL_DEBUG_FW(trans, "WRT: Enabling region id %u type %u\n", id, type); in iwl_dbg_tlv_alloc_region()
250 static int iwl_dbg_tlv_alloc_trigger(struct iwl_trans *trans, in iwl_dbg_tlv_alloc_trigger() argument
263 IWL_ERR(trans, in iwl_dbg_tlv_alloc_trigger()
269 IWL_DEBUG_FW(trans, in iwl_dbg_tlv_alloc_trigger()
272 trans->dbg.last_tp_resetfw = 0xFF; in iwl_dbg_tlv_alloc_trigger()
274 new_tlv = iwl_dbg_tlv_add(tlv, &trans->dbg.time_point[tp].trig_list); in iwl_dbg_tlv_alloc_trigger()
287 static int iwl_dbg_tlv_config_set(struct iwl_trans *trans, in iwl_dbg_tlv_config_set() argument
296 IWL_DEBUG_FW(trans, in iwl_dbg_tlv_config_set()
303 IWL_DEBUG_FW(trans, in iwl_dbg_tlv_config_set()
308 if (!iwl_dbg_tlv_add(tlv, &trans->dbg.time_point[tp].config_list)) in iwl_dbg_tlv_config_set()
313 static int (*dbg_tlv_alloc[])(struct iwl_trans *trans,
323 void iwl_dbg_tlv_alloc(struct iwl_trans *trans, const struct iwl_ucode_tlv *tlv, in iwl_dbg_tlv_alloc() argument
327 &trans->dbg.external_ini_cfg : &trans->dbg.internal_ini_cfg; in iwl_dbg_tlv_alloc()
342 !(domain & trans->dbg.domains_bitmap)) { in iwl_dbg_tlv_alloc()
343 IWL_DEBUG_FW(trans, in iwl_dbg_tlv_alloc()
345 domain, trans->dbg.domains_bitmap); in iwl_dbg_tlv_alloc()
350 IWL_ERR(trans, "WRT: Unsupported TLV type 0x%x\n", type); in iwl_dbg_tlv_alloc()
355 IWL_ERR(trans, "WRT: Unsupported TLV 0x%x version %u\n", type, in iwl_dbg_tlv_alloc()
360 ret = dbg_tlv_alloc[tlv_idx](trans, tlv); in iwl_dbg_tlv_alloc()
362 IWL_WARN(trans, in iwl_dbg_tlv_alloc()
377 void iwl_dbg_tlv_del_timers(struct iwl_trans *trans) in iwl_dbg_tlv_del_timers() argument
379 struct list_head *timer_list = &trans->dbg.periodic_trig_list; in iwl_dbg_tlv_del_timers()
390 static void iwl_dbg_tlv_fragments_free(struct iwl_trans *trans, in iwl_dbg_tlv_fragments_free() argument
400 fw_mon = &trans->dbg.fw_mon_ini[alloc_id]; in iwl_dbg_tlv_fragments_free()
405 dma_free_coherent(trans->dev, frag->size, frag->block, in iwl_dbg_tlv_fragments_free()
418 void iwl_dbg_tlv_free(struct iwl_trans *trans) in iwl_dbg_tlv_free() argument
423 iwl_dbg_tlv_del_timers(trans); in iwl_dbg_tlv_free()
425 for (i = 0; i < ARRAY_SIZE(trans->dbg.active_regions); i++) { in iwl_dbg_tlv_free()
427 &trans->dbg.active_regions[i]; in iwl_dbg_tlv_free()
434 &trans->dbg.debug_info_tlv_list, list) { in iwl_dbg_tlv_free()
439 for (i = 0; i < ARRAY_SIZE(trans->dbg.time_point); i++) { in iwl_dbg_tlv_free()
441 &trans->dbg.time_point[i]; in iwl_dbg_tlv_free()
469 for (i = 0; i < ARRAY_SIZE(trans->dbg.fw_mon_ini); i++) in iwl_dbg_tlv_free()
470 iwl_dbg_tlv_fragments_free(trans, i); in iwl_dbg_tlv_free()
473 static int iwl_dbg_tlv_parse_bin(struct iwl_trans *trans, const u8 *data, in iwl_dbg_tlv_parse_bin() argument
486 IWL_ERR(trans, "invalid TLV len: %zd/%u\n", in iwl_dbg_tlv_parse_bin()
493 iwl_dbg_tlv_alloc(trans, tlv, true); in iwl_dbg_tlv_parse_bin()
499 void iwl_dbg_tlv_load_bin(struct device *dev, struct iwl_trans *trans) in iwl_dbg_tlv_load_bin() argument
506 trans->mac_cfg->device_family <= IWL_DEVICE_FAMILY_8000) in iwl_dbg_tlv_load_bin()
510 IWL_DEBUG_FW(trans, "%s %s\n", res ? "didn't load" : "loaded", yoyo_bin); in iwl_dbg_tlv_load_bin()
515 trans->dbg.yoyo_bin_loaded = true; in iwl_dbg_tlv_load_bin()
517 iwl_dbg_tlv_parse_bin(trans, fw->data, fw->size); in iwl_dbg_tlv_load_bin()
522 void iwl_dbg_tlv_init(struct iwl_trans *trans) in iwl_dbg_tlv_init() argument
526 INIT_LIST_HEAD(&trans->dbg.debug_info_tlv_list); in iwl_dbg_tlv_init()
527 INIT_LIST_HEAD(&trans->dbg.periodic_trig_list); in iwl_dbg_tlv_init()
529 for (i = 0; i < ARRAY_SIZE(trans->dbg.time_point); i++) { in iwl_dbg_tlv_init()
531 &trans->dbg.time_point[i]; in iwl_dbg_tlv_init()
591 fw_mon_cfg = &fwrt->trans->dbg.fw_mon_cfg[alloc_id]; in iwl_dbg_tlv_alloc_fragments()
592 fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id]; in iwl_dbg_tlv_alloc_fragments()
606 if (fwrt->trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_AX210) { in iwl_dbg_tlv_alloc_fragments()
610 } else if (fwrt->trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_BZ && in iwl_dbg_tlv_alloc_fragments()
639 iwl_dbg_tlv_fragments_free(fwrt->trans, in iwl_dbg_tlv_alloc_fragments()
668 if (le32_to_cpu(fwrt->trans->dbg.fw_mon_cfg[alloc_id].buf_location) != in iwl_dbg_tlv_apply_buffer()
672 fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id]; in iwl_dbg_tlv_apply_buffer()
714 ret = iwl_trans_send_cmd(fwrt->trans, &hcmd); in iwl_dbg_tlv_apply_buffer()
750 if (le32_to_cpu(fwrt->trans->dbg.fw_mon_cfg[alloc_id].buf_location) != in iwl_dbg_tlv_update_dram()
757 fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id]; in iwl_dbg_tlv_update_dram()
797 &fwrt->trans->dbg.fw_mon_ini[IWL_FW_INI_ALLOCATION_ID_DBGC1].frags[0]; in iwl_dbg_tlv_update_drams()
813 if (fwrt->trans->dbg.fw_mon_cfg[i].buf_location == in iwl_dbg_tlv_update_drams()
847 iwl_trans_send_cmd(fwrt->trans, &cmd); in iwl_dbg_tlv_send_hcmds()
865 if (!iwl_trans_grab_nic_access(fwrt->trans)) { in iwl_dbg_tlv_apply_config()
874 iwl_trans_write_prph(fwrt->trans, address + offset, value); in iwl_dbg_tlv_apply_config()
876 iwl_trans_release_nic_access(fwrt->trans); in iwl_dbg_tlv_apply_config()
883 iwl_trans_write_mem32(fwrt->trans, address + offset, value); in iwl_dbg_tlv_apply_config()
893 iwl_write32(fwrt->trans, address + offset, value); in iwl_dbg_tlv_apply_config()
901 struct iwl_dram_data *frags = &fwrt->trans->dbg.fw_mon_ini[1].frags[0]; in iwl_dbg_tlv_apply_config()
925 ret = iwl_trans_write_mem(fwrt->trans, in iwl_dbg_tlv_apply_config()
940 fwrt->trans->dbg.ucode_preset = debug_token_config; in iwl_dbg_tlv_apply_config()
974 &fwrt->trans->dbg.time_point[IWL_FW_INI_TIME_POINT_PERIODIC].active_trig_list; in iwl_dbg_tlv_set_periodic_trigs()
1017 &fwrt->trans->dbg.periodic_trig_list); in iwl_dbg_tlv_set_periodic_trigs()
1242 fwrt->trans->dbg.restart_required = false; in iwl_dbg_tlv_tp_trigger()
1244 if (fwrt->trans->mac_cfg->device_family == in iwl_dbg_tlv_tp_trigger()
1246 fwrt->trans->dbg.restart_required = true; in iwl_dbg_tlv_tp_trigger()
1248 fwrt->trans->dbg.last_tp_resetfw == in iwl_dbg_tlv_tp_trigger()
1250 fwrt->trans->dbg.restart_required = false; in iwl_dbg_tlv_tp_trigger()
1251 fwrt->trans->dbg.last_tp_resetfw = 0xFF; in iwl_dbg_tlv_tp_trigger()
1254 fwrt->trans->dbg.restart_required = true; in iwl_dbg_tlv_tp_trigger()
1257 fwrt->trans->dbg.restart_required = false; in iwl_dbg_tlv_tp_trigger()
1258 fwrt->trans->dbg.last_tp_resetfw = in iwl_dbg_tlv_tp_trigger()
1273 enum iwl_fw_ini_buffer_location *ini_dest = &fwrt->trans->dbg.ini_dest; in iwl_dbg_tlv_init_cfg()
1280 fwrt->trans->dbg.domains_bitmap); in iwl_dbg_tlv_init_cfg()
1282 for (i = 0; i < ARRAY_SIZE(fwrt->trans->dbg.time_point); i++) { in iwl_dbg_tlv_init_cfg()
1284 &fwrt->trans->dbg.time_point[i]; in iwl_dbg_tlv_init_cfg()
1299 &fwrt->trans->dbg.fw_mon_cfg[i]; in iwl_dbg_tlv_init_cfg()
1326 for (i = 0; i < ARRAY_SIZE(fwrt->trans->dbg.active_regions) && failed_alloc; i++) { in iwl_dbg_tlv_init_cfg()
1329 &fwrt->trans->dbg.active_regions[i]; in iwl_dbg_tlv_init_cfg()
1333 fwrt->trans->dbg.unsupported_region_msk |= BIT(i); in iwl_dbg_tlv_init_cfg()
1349 fwrt->trans->dbg.unsupported_region_msk |= BIT(i); in iwl_dbg_tlv_init_cfg()
1363 if (!iwl_trans_dbg_ini_valid(fwrt->trans) || in _iwl_dbg_tlv_time_point()
1368 hcmd_list = &fwrt->trans->dbg.time_point[tp_id].hcmd_list; in _iwl_dbg_tlv_time_point()
1369 trig_list = &fwrt->trans->dbg.time_point[tp_id].active_trig_list; in _iwl_dbg_tlv_time_point()
1370 conf_list = &fwrt->trans->dbg.time_point[tp_id].config_list; in _iwl_dbg_tlv_time_point()