Lines Matching full:10
84 " %-30s %10u %10u %10u %10u\n", "ina_cnt:", in il3945_ucode_rx_stats_read()
89 " %-30s %10u %10u %10u %10u\n", "fina_cnt:", in il3945_ucode_rx_stats_read()
94 " %-30s %10u %10u %10u %10u\n", "plcp_err:", in il3945_ucode_rx_stats_read()
99 " %-30s %10u %10u %10u %10u\n", "crc32_err:", in il3945_ucode_rx_stats_read()
104 " %-30s %10u %10u %10u %10u\n", "overrun_err:", in il3945_ucode_rx_stats_read()
109 " %-30s %10u %10u %10u %10u\n", "early_overrun_err:", in il3945_ucode_rx_stats_read()
116 " %-30s %10u %10u %10u %10u\n", "crc32_good:", in il3945_ucode_rx_stats_read()
121 " %-30s %10u %10u %10u %10u\n", "false_alarm_cnt:", in il3945_ucode_rx_stats_read()
127 " %-30s %10u %10u %10u %10u\n", "fina_sync_err_cnt:", in il3945_ucode_rx_stats_read()
134 " %-30s %10u %10u %10u %10u\n", "sfd_timeout:", in il3945_ucode_rx_stats_read()
139 " %-30s %10u %10u %10u %10u\n", "fina_timeout:", in il3945_ucode_rx_stats_read()
144 " %-30s %10u %10u %10u %10u\n", "unresponded_rts:", in il3945_ucode_rx_stats_read()
150 " %-30s %10u %10u %10u %10u\n", in il3945_ucode_rx_stats_read()
158 " %-30s %10u %10u %10u %10u\n", "sent_ack_cnt:", in il3945_ucode_rx_stats_read()
163 " %-30s %10u %10u %10u %10u\n", "sent_cts_cnt:", in il3945_ucode_rx_stats_read()
174 " %-30s %10u %10u %10u %10u\n", "ina_cnt:", in il3945_ucode_rx_stats_read()
179 " %-30s %10u %10u %10u %10u\n", "fina_cnt:", in il3945_ucode_rx_stats_read()
184 " %-30s %10u %10u %10u %10u\n", "plcp_err:", in il3945_ucode_rx_stats_read()
189 " %-30s %10u %10u %10u %10u\n", "crc32_err:", in il3945_ucode_rx_stats_read()
194 " %-30s %10u %10u %10u %10u\n", "overrun_err:", in il3945_ucode_rx_stats_read()
199 " %-30s %10u %10u %10u %10u\n", "early_overrun_err:", in il3945_ucode_rx_stats_read()
205 " %-30s %10u %10u %10u %10u\n", "crc32_good:", in il3945_ucode_rx_stats_read()
210 " %-30s %10u %10u %10u %10u\n", "false_alarm_cnt:", in il3945_ucode_rx_stats_read()
216 " %-30s %10u %10u %10u %10u\n", "fina_sync_err_cnt:", in il3945_ucode_rx_stats_read()
222 " %-30s %10u %10u %10u %10u\n", "sfd_timeout:", in il3945_ucode_rx_stats_read()
227 " %-30s %10u %10u %10u %10u\n", "fina_timeout:", in il3945_ucode_rx_stats_read()
232 " %-30s %10u %10u %10u %10u\n", "unresponded_rts:", in il3945_ucode_rx_stats_read()
238 " %-30s %10u %10u %10u %10u\n", in il3945_ucode_rx_stats_read()
246 " %-30s %10u %10u %10u %10u\n", "sent_ack_cnt:", in il3945_ucode_rx_stats_read()
251 " %-30s %10u %10u %10u %10u\n", "sent_cts_cnt:", in il3945_ucode_rx_stats_read()
262 " %-30s %10u %10u %10u %10u\n", "bogus_cts:", in il3945_ucode_rx_stats_read()
267 " %-30s %10u %10u %10u %10u\n", "bogus_ack:", in il3945_ucode_rx_stats_read()
272 " %-30s %10u %10u %10u %10u\n", "non_bssid_frames:", in il3945_ucode_rx_stats_read()
279 " %-30s %10u %10u %10u %10u\n", "filtered_frames:", in il3945_ucode_rx_stats_read()
286 " %-30s %10u %10u %10u %10u\n", in il3945_ucode_rx_stats_read()
335 " %-30s %10u %10u %10u %10u\n", "preamble:", in il3945_ucode_tx_stats_read()
340 " %-30s %10u %10u %10u %10u\n", "rx_detected_cnt:", in il3945_ucode_tx_stats_read()
346 " %-30s %10u %10u %10u %10u\n", "bt_prio_defer_cnt:", in il3945_ucode_tx_stats_read()
352 " %-30s %10u %10u %10u %10u\n", "bt_prio_kill_cnt:", in il3945_ucode_tx_stats_read()
358 " %-30s %10u %10u %10u %10u\n", "few_bytes_cnt:", in il3945_ucode_tx_stats_read()
363 " %-30s %10u %10u %10u %10u\n", "cts_timeout:", in il3945_ucode_tx_stats_read()
368 " %-30s %10u %10u %10u %10u\n", "ack_timeout:", in il3945_ucode_tx_stats_read()
373 " %-30s %10u %10u %10u %10u\n", "expected_ack_cnt:", in il3945_ucode_tx_stats_read()
379 " %-30s %10u %10u %10u %10u\n", "actual_ack_cnt:", in il3945_ucode_tx_stats_read()
395 int bufsz = sizeof(struct iwl39_stats_general) * 10 + 300; in il3945_ucode_general_stats_read()
436 " %-30s %10u %10u %10u %10u\n", "burst_check:", in il3945_ucode_general_stats_read()
441 " %-30s %10u %10u %10u %10u\n", "burst_count:", in il3945_ucode_general_stats_read()
446 " %-30s %10u %10u %10u %10u\n", "sleep_time:", in il3945_ucode_general_stats_read()
452 " %-30s %10u %10u %10u %10u\n", "slots_out:", in il3945_ucode_general_stats_read()
457 " %-30s %10u %10u %10u %10u\n", "slots_idle:", in il3945_ucode_general_stats_read()
466 " %-30s %10u %10u %10u %10u\n", "tx_on_a:", in il3945_ucode_general_stats_read()
471 " %-30s %10u %10u %10u %10u\n", "tx_on_b:", in il3945_ucode_general_stats_read()
476 " %-30s %10u %10u %10u %10u\n", "exec_time:", in il3945_ucode_general_stats_read()
481 " %-30s %10u %10u %10u %10u\n", "probe_time:", in il3945_ucode_general_stats_read()