Lines Matching +full:in +full:- +full:band

3  * Copyright (c) 2013 Hauke Mehrtens <hauke@hauke-m.de>
7 * copyright notice and this permission notice appear in all copies.
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
14 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
42 /* watchdog timer, in unit of ms */
44 /* radio monitor timer, in unit of ms */
47 /* beacon interval, in unit of 1024TU */
50 /* n-mode support capability */
82 #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
125 /* synthpu_dly times in us */
133 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
167 #define BRCMS_PLCP_AUTO -1
172 #define BRCMS_PROTECTION_AUTO -1
189 /* values for band specific 40MHz capabilities */
199 /* MSC in use,indicates b0-6 holds an mcs */
211 #define NRATE_LDPC_CODING 0x00400000 /* adv coding in use */
221 /* # of entries in Tx FIFO */
223 /* Max # of entries in Rx FIFO based on 4kb page size */
226 /* Amount of headroom to leave in Tx FIFO */
232 /* max # frames to process in brcms_c_recv() */
234 /* max # tx status to process in wlc_txstatus() */
238 * The following table lists the buffer memory allocated to xmt fifos in HW.
239 * the size is in units of 256bytes(one block), total size is HW dependent
242 * This is documented in twiki under the topic UcodeTxFifo. Please ensure
355 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
357 return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
367 /* currently the best mechanism for determining SIFS is the band in use */
368 static u16 get_sifs(struct brcms_band *band)
370 return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
377 * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
378 * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
387 if (!wlc->hw->clk)
388 return ai_deviceremoved(wlc->hw->sih);
389 macctrl = bcma_read32(wlc->hw->d11core,
400 for (i = 0; i < ARRAY_SIZE(wlc->hw->di); i++)
401 if (wlc->hw->di[i])
402 pending += dma_txpending(wlc->hw->di[i]);
408 return wlc->pub->_nbands > 1 && !wlc->bandlocked;
426 kfree(cfg->current_bss);
435 brcms_c_bsscfg_mfree(wlc->bsscfg);
436 kfree(wlc->pub);
437 kfree(wlc->modulecb);
438 kfree(wlc->default_bss);
439 kfree(wlc->protection);
440 kfree(wlc->stf);
441 kfree(wlc->bandstate[0]);
442 if (wlc->corestate)
443 kfree(wlc->corestate->macstat_snapshot);
444 kfree(wlc->corestate);
445 if (wlc->hw)
446 kfree(wlc->hw->bandstate[0]);
447 kfree(wlc->hw);
448 if (wlc->beacon)
449 dev_kfree_skb_any(wlc->beacon);
450 if (wlc->probe_resp)
451 dev_kfree_skb_any(wlc->probe_resp);
464 cfg->current_bss = kzalloc(sizeof(*cfg->current_bss), GFP_ATOMIC);
465 if (cfg->current_bss == NULL)
487 wlc->pub = kzalloc(sizeof(*wlc->pub), GFP_ATOMIC);
488 if (wlc->pub == NULL) {
492 wlc->pub->wlc = wlc;
496 wlc->hw = kzalloc(sizeof(*wlc->hw), GFP_ATOMIC);
497 if (wlc->hw == NULL) {
501 wlc->hw->wlc = wlc;
503 wlc->hw->bandstate[0] =
505 if (wlc->hw->bandstate[0] == NULL) {
512 wlc->hw->bandstate[i] = (struct brcms_hw_band *)
513 ((unsigned long)wlc->hw->bandstate[0] +
517 wlc->modulecb =
520 if (wlc->modulecb == NULL) {
525 wlc->default_bss = kzalloc(sizeof(*wlc->default_bss), GFP_ATOMIC);
526 if (wlc->default_bss == NULL) {
531 wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
532 if (wlc->bsscfg == NULL) {
537 wlc->protection = kzalloc(sizeof(*wlc->protection), GFP_ATOMIC);
538 if (wlc->protection == NULL) {
543 wlc->stf = kzalloc(sizeof(*wlc->stf), GFP_ATOMIC);
544 if (wlc->stf == NULL) {
549 wlc->bandstate[0] =
550 kcalloc(MAXBANDS, sizeof(*wlc->bandstate[0]), GFP_ATOMIC);
551 if (wlc->bandstate[0] == NULL) {
558 wlc->bandstate[i] = (struct brcms_band *)
559 ((unsigned long)wlc->bandstate[0]
563 wlc->corestate = kzalloc(sizeof(*wlc->corestate), GFP_ATOMIC);
564 if (wlc->corestate == NULL) {
569 wlc->corestate->macstat_snapshot =
570 kzalloc(sizeof(*wlc->corestate->macstat_snapshot), GFP_ATOMIC);
571 if (wlc->corestate->macstat_snapshot == NULL) {
591 struct bcma_device *core = wlc_hw->d11core;
606 * time in usec unit
615 brcms_err(wlc->hw->d11core, "wl%d: WAR: using rate of 1 mbps\n",
616 wlc->pub->unit);
643 if (wlc->band->bandtype == BRCM_BAND_2G)
655 if (wlc->band->bandtype == BRCM_BAND_2G)
659 * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
664 dur = (mac_len + rate - 1) / rate;
676 struct bcma_device *core = wlc_hw->d11core;
682 brcms_dbg_info(wlc_hw->d11core, "wl%d\n", wlc_hw->unit);
711 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
714 brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
716 /* do band-specific ucode IHR, SHM, and SCR inits */
717 if (D11REV_IS(wlc_hw->corerev, 17) || D11REV_IS(wlc_hw->corerev, 23)) {
718 if (BRCMS_ISNPHY(wlc_hw->band))
719 brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
721 brcms_err(wlc_hw->d11core,
722 "%s: wl%d: unsupported phy in corerev %d\n",
723 __func__, wlc_hw->unit,
724 wlc_hw->corerev);
726 if (D11REV_IS(wlc_hw->corerev, 24)) {
727 if (BRCMS_ISLCNPHY(wlc_hw->band))
729 ucode->d11lcn0bsinitvals24);
731 brcms_err(wlc_hw->d11core,
732 "%s: wl%d: unsupported phy in core rev %d\n",
733 __func__, wlc_hw->unit,
734 wlc_hw->corerev);
736 brcms_err(wlc_hw->d11core,
738 __func__, wlc_hw->unit, wlc_hw->corerev);
745 struct bcma_device *core = wlc_hw->d11core;
753 brcms_dbg_info(wlc_hw->d11core, "wl%d: clk %d\n", wlc_hw->unit, clk);
755 wlc_hw->phyclk = clk;
775 /* low-level band switch utility routine */
778 brcms_dbg_mac80211(wlc_hw->d11core, "wl%d: bandunit %d\n", wlc_hw->unit,
781 wlc_hw->band = wlc_hw->bandstate[bandunit];
785 * until we eliminate need for wlc->band refs in low level code
787 wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
790 if (wlc_hw->sbclk && !wlc_hw->noreset) {
800 /* switch to new band but leave it inactive */
803 struct brcms_hardware *wlc_hw = wlc->hw;
807 brcms_dbg_mac80211(wlc_hw->d11core, "wl%d\n", wlc_hw->unit);
808 macctrl = bcma_read32(wlc_hw->d11core,
813 macintmask = brcms_intrsoff(wlc->wl);
816 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
843 trace_brcms_txstatus(&wlc->hw->d11core->dev, txs->framelen,
844 txs->frameid, txs->status, txs->lasttxtime,
845 txs->sequence, txs->phyerr, txs->ackphyrxsh);
852 if (!(txs->status & TX_STATUS_AMPDU)
853 && (txs->status & TX_STATUS_INTERMEDIATE)) {
854 brcms_dbg_tx(wlc->hw->d11core, "INTERMEDIATE but not AMPDU\n");
859 queue = txs->frameid & TXFID_QUEUE_MASK;
861 brcms_err(wlc->hw->d11core, "queue %u >= NFIFO\n", queue);
865 dma = wlc->hw->di[queue];
867 p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
869 brcms_err(wlc->hw->d11core, "dma_getnexttxp returned null!\n");
873 txh = (struct d11txh *) (p->data);
875 if (txs->phyerr)
876 brcms_dbg_tx(wlc->hw->d11core, "phyerr 0x%x, rate 0x%x\n",
877 txs->phyerr, txh->MainRates);
879 if (txs->frameid != le16_to_cpu(txh->TxFrameID)) {
880 brcms_err(wlc->hw->d11core, "frameid != txh->TxFrameID\n");
886 if (tx_info->rate_driver_data[0])
887 scb = &wlc->pri_scb;
889 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
890 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
899 trace_brcms_txdesc(&wlc->hw->d11core->dev, txh, sizeof(*txh));
901 supr_status = txs->status & TX_STATUS_SUPR_MASK;
903 unsigned xfts = le16_to_cpu(txh->XtraFrameTypes);
904 brcms_dbg_tx(wlc->hw->d11core,
907 CHSPEC_CHANNEL(wlc->default_bss->chanspec));
911 (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
913 lastframe = !ieee80211_has_morefrags(h->frame_control);
916 brcms_err(wlc->hw->d11core, "Not last frame!\n");
931 sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
933 lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
936 sfbl = wlc->SFBL;
937 lfbl = wlc->LFBL;
940 txrate = tx_info->status.rates;
954 txrate[1].count = tx_frame_count - fbl;
963 * unused rates to be marked with idx = -1
965 txrate[1].idx = -1;
971 txrate[i].idx = -1;
975 if (txs->status & TX_STATUS_ACK_RCV)
976 tx_info->flags |= IEEE80211_TX_STAT_ACK;
983 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
985 brcms_err(wlc->hw->d11core,
995 trace_brcms_txdesc(&wlc->hw->d11core->dev, txh,
1002 if (dma->txavail > TX_HEADROOM && queue < TX_BCMC_FIFO &&
1003 ieee80211_queue_stopped(wlc->pub->ieee_hw, ac_queue))
1004 ieee80211_wake_queue(wlc->pub->ieee_hw, ac_queue);
1011 /* process tx completion events in BMAC
1025 uint max_tx_num = bound ? TXSBND : -1;
1028 core = wlc_hw->d11core;
1034 brcms_err(core, "wl%d: %s: dead chip\n", wlc_hw->unit,
1044 txs->status = s1 & TXS_STATUS_MASK;
1045 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1046 txs->sequence = s2 & TXS_SEQ_MASK;
1047 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1048 txs->lasttxtime = 0;
1050 *fatal = brcms_c_dotxstatus(wlc_hw->wlc, txs);
1061 if (wlc->bsscfg->type == BRCMS_TYPE_ADHOC)
1066 wlc->qvalid |= MCMD_DIRFRMQVAL;
1073 struct brcms_hardware *wlc_hw = wlc->hw;
1080 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1083 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1102 * ucode host flag 2 needed for pio mode, independent of band and fifo
1105 struct brcms_hardware *wlc_hw = wlc->hw;
1106 uint unit = wlc_hw->unit;
1111 if (wlc_hw->di[0] == NULL) { /* Init FIFOs */
1119 wlc_hw->di[0] = dma_attach(name, wlc,
1123 RXBUFSZ, -1, NRXBUFPOST,
1125 dma_attach_err |= (NULL == wlc_hw->di[0]);
1129 * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1133 wlc_hw->di[1] = dma_attach(name, wlc,
1135 NTXD, 0, 0, -1, 0, 0);
1136 dma_attach_err |= (NULL == wlc_hw->di[1]);
1143 wlc_hw->di[2] = dma_attach(name, wlc,
1145 NTXD, 0, 0, -1, 0, 0);
1146 dma_attach_err |= (NULL == wlc_hw->di[2]);
1152 wlc_hw->di[3] = dma_attach(name, wlc,
1154 0, NTXD, 0, 0, -1,
1156 dma_attach_err |= (NULL == wlc_hw->di[3]);
1160 brcms_err(wlc_hw->d11core,
1168 if (wlc_hw->di[i])
1169 wlc_hw->txavail[i] =
1170 (uint *) dma_getvar(wlc_hw->di[i],
1175 brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1185 if (wlc_hw->di[j]) {
1186 dma_detach(wlc_hw->di[j]);
1187 wlc_hw->di[j] = NULL;
1194 * may get overrides later in this function
1199 struct brcms_c_info *wlc = wlc_hw->wlc;
1202 wlc->defmacintmask = DEF_MACINTMASK;
1205 wlc_hw->shortslot = false;
1207 wlc_hw->SFBL = RETRY_SHORT_FB;
1208 wlc_hw->LFBL = RETRY_LONG_FB;
1211 wlc_hw->SRL = RETRY_SHORT_DEF;
1212 wlc_hw->LRL = RETRY_LONG_DEF;
1213 wlc_hw->chanspec = ch20mhz_chspec(1);
1223 DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1229 if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU) {
1236 if (wlc_hw->clk) {
1238 bcma_set32(wlc_hw->d11core,
1245 ((bcma_read32(wlc_hw->d11core,
1249 WARN_ON(!(bcma_read32(wlc_hw->d11core,
1253 if ((ai_get_pmurev(wlc_hw->sih) == 0) &&
1254 (bcma_read32(wlc_hw->d11core,
1258 ((bcma_read32(wlc_hw->d11core,
1263 bcma_mask32(wlc_hw->d11core,
1268 wlc_hw->forcefastclk = (mode == BCMA_CLKMODE_FAST);
1275 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1277 /* check fast clock is available (if core is not in reset) */
1278 if (wlc_hw->forcefastclk && wlc_hw->clk)
1279 WARN_ON(!(bcma_aread32(wlc_hw->d11core, BCMA_IOST) &
1286 * current forcefastclk state. Only setting bit in wake_override
1288 * behavior. Older code set wlc->forcefastclk but only had the
1292 if (wlc_hw->forcefastclk)
1293 mboolset(wlc_hw->wake_override,
1296 mboolclr(wlc_hw->wake_override,
1302 * it has an optimization for no-change write
1304 * pre-CLK changes should use wlc_write_mhf to get around the optimization
1307 * bands values are: BRCM_BAND_AUTO <--- Current band only
1308 * BRCM_BAND_5G <--- 5G band only
1309 * BRCM_BAND_2G <--- 2G band only
1310 * BRCM_BAND_ALL <--- All bands
1321 struct brcms_hw_band *band;
1327 /* Current band only or all bands,
1328 * then set the band to current band
1332 band = wlc_hw->band;
1335 band = wlc_hw->bandstate[BAND_5G_INDEX];
1338 band = wlc_hw->bandstate[BAND_2G_INDEX];
1341 band = NULL; /* error condition */
1344 if (band) {
1345 save = band->mhfs[idx];
1346 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1349 * changed band is the current band
1351 if (wlc_hw->clk && (band->mhfs[idx] != save)
1352 && (band == wlc_hw->band))
1354 (u16) band->mhfs[idx]);
1358 wlc_hw->bandstate[0]->mhfs[idx] =
1359 (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1360 wlc_hw->bandstate[1]->mhfs[idx] =
1361 (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1371 wlc_hw->maccontrol = 0;
1372 wlc_hw->suspended_fifos = 0;
1373 wlc_hw->wake_override = 0;
1374 wlc_hw->mute_override = 0;
1384 u32 maccontrol = wlc_hw->maccontrol;
1386 /* OR in the wake bit if overridden */
1387 if (wlc_hw->wake_override)
1391 if (wlc_hw->mute_override) {
1396 bcma_write32(wlc_hw->d11core, D11REGOFFS(maccontrol),
1408 maccontrol = wlc_hw->maccontrol;
1416 wlc_hw->maccontrol = new_maccontrol;
1425 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1426 mboolset(wlc_hw->wake_override, override_bit);
1430 mboolset(wlc_hw->wake_override, override_bit);
1439 mboolclr(wlc_hw->wake_override, override_bit);
1441 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1451 * STA 0 1 <--- This will ensure no beacons
1456 wlc_hw->mute_override = 1;
1461 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1470 if (wlc_hw->mute_override == 0)
1473 wlc_hw->mute_override = 0;
1478 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1485 * Write a MAC address to the given match reg offset in the RXE match engine.
1491 struct bcma_device *core = wlc_hw->d11core;
1496 brcms_dbg_rx(core, "wl%d: brcms_b_set_addrmatch\n", wlc_hw->unit);
1514 struct bcma_device *core = wlc_hw->d11core;
1519 brcms_dbg_info(core, "wl%d\n", wlc_hw->unit);
1523 /* if MCTL_BIGEND bit set in mac control register,
1524 * the chip swaps data in fifo, as well as data in
1543 len -= sizeof(u32);
1549 wlc_hw->band->CWmin = newmin;
1551 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
1553 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
1554 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmin);
1559 wlc_hw->band->CWmax = newmax;
1561 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
1563 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
1564 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmax);
1572 fastclk = wlc_hw->forcefastclk;
1576 wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1579 wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1589 struct brcms_c_info *wlc = wlc_hw->wlc;
1592 if (BRCMS_ISLCNPHY(wlc->band))
1594 else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1605 u16 phytxant = wlc_hw->bmac_phytxant;
1628 /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1647 /* Find the SHM pointer to the rate table entry by looking in the
1648 * Direct-map Table
1664 if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1679 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1687 /* band-specific init */
1690 struct brcms_hardware *wlc_hw = wlc->hw;
1692 brcms_dbg_mac80211(wlc_hw->d11core, "wl%d: bandunit %d\n", wlc_hw->unit,
1693 wlc_hw->band->bandunit);
1697 wlc_phy_init(wlc_hw->band->pi, chanspec);
1702 * cwmin is band-specific, update hardware
1703 * with value for current band
1705 brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1706 brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1709 wlc_hw->band->bandtype == BRCM_BAND_5G ?
1710 true : wlc_hw->shortslot);
1713 brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1714 brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1728 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_addr),
1731 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1734 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1737 ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1748 if (!BRCMS_ISNPHY(wlc_hw->band))
1768 struct brcms_phy_pub *pih = wlc_hw->band->pi;
1771 brcms_dbg_info(wlc_hw->d11core, "wl%d: reset phy\n", wlc_hw->unit);
1776 phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1779 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1780 NREV_LE(wlc_hw->band->phyrev, 4)) {
1804 /* switch to and initialize new band */
1807 struct brcms_c_info *wlc = wlc_hw->wlc;
1811 if (!bcma_core_is_enabled(wlc_hw->d11core)) {
1812 bcma_core_enable(wlc_hw->d11core, 0);
1818 if (!wlc_hw->up)
1823 /* band-specific initializations */
1829 * so brcms_c_dpc() will re-enable interrupts when done.
1831 if (wlc->macintstatus)
1832 wlc->macintstatus = MI_DMAINT;
1835 brcms_intrsrestore(wlc->wl, macintmask);
1838 WARN_ON((bcma_read32(wlc_hw->d11core, D11REGOFFS(maccontrol)) &
1846 if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
1847 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
1848 wlc_hw->corerev);
1858 uint boardrev = wlc_hw->boardrev;
1867 if (ai_get_boardvendor(wlc_hw->sih) != PCI_VENDOR_ID_BROADCOM)
1886 struct ssb_sprom *sprom = &wlc_hw->d11core->bus->sprom;
1889 if (!is_zero_ether_addr(sprom->il0mac)) {
1890 memcpy(etheraddr, sprom->il0mac, ETH_ALEN);
1894 if (wlc_hw->_nbands > 1)
1895 memcpy(etheraddr, sprom->et1mac, ETH_ALEN);
1897 memcpy(etheraddr, sprom->il0mac, ETH_ALEN);
1903 brcms_dbg_info(wlc_hw->d11core, "wl%d: want %d\n", wlc_hw->unit, want);
1909 if (!want && wlc_hw->pllreq)
1912 wlc_hw->sbclk = want;
1913 if (!wlc_hw->sbclk) {
1914 wlc_hw->clk = false;
1915 if (wlc_hw->band && wlc_hw->band->pi)
1916 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
1931 xtal = wlc_hw->sbclk;
1936 clk = wlc_hw->clk;
1943 if (D11REV_GE(wlc_hw->corerev, 18))
1953 bcma_core_enable(wlc_hw->d11core, flags);
1957 v = ((bcma_read32(wlc_hw->d11core,
1962 bcma_core_disable(wlc_hw->d11core, 0);
1972 struct dma_pub *di = wlc_hw->di[fifo];
1982 * one testing hack wlc_hw->noreset will bypass the d11/phy reset
1990 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
1992 brcms_dbg_info(wlc_hw->d11core, "wl%d: core reset\n", wlc_hw->unit);
1995 fastclk = wlc_hw->forcefastclk;
2000 if (bcma_core_is_enabled(wlc_hw->d11core)) {
2002 if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
2003 brcms_err(wlc_hw->d11core, "wl%d: %s: "
2005 wlc_hw->unit, __func__, i);
2007 if ((wlc_hw->di[RX_FIFO])
2009 brcms_err(wlc_hw->d11core, "wl%d: %s: dma_rxreset"
2011 wlc_hw->unit, __func__, RX_FIFO);
2014 if (wlc_hw->noreset) {
2015 wlc_hw->wlc->macintstatus = 0; /* skip wl_dpc after down */
2023 * band->pi is invalid. need to enable PHY CLK
2025 if (D11REV_GE(wlc_hw->corerev, 18))
2030 * In chips with PMU, the fastclk request goes through d11 core
2031 * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2038 wlc_hw->clk = false;
2039 bcma_core_enable(wlc_hw->d11core, flags);
2040 wlc_hw->clk = true;
2041 if (wlc_hw->band && wlc_hw->band->pi)
2042 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2046 if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU)
2055 wlc_hw->wlc->macintstatus = 0;
2067 struct bcma_device *core = wlc_hw->d11core;
2079 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2081 (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2083 ((((txfifo_endblk -
2094 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2097 * need to propagate to shm location to be in sync since ucode/hw won't
2101 wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2103 wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2105 ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2108 ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2117 * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2118 * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2119 * For spuron: 123MHz -> 2^26/123 = 545600.5
2120 * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2121 * For spur off: 120MHz -> 2^26/120 = 559240.5
2122 * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2127 struct bcma_device *core = wlc_hw->d11core;
2129 if ((ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM43224) ||
2130 (ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM43225)) {
2141 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2154 memcpy(wlc->pub->cur_etheraddr, addr, sizeof(wlc->pub->cur_etheraddr));
2155 wlc->bsscfg->type = BRCMS_TYPE_STATION;
2163 memcpy(wlc->pub->cur_etheraddr, addr, sizeof(wlc->pub->cur_etheraddr));
2164 memcpy(wlc->bsscfg->BSSID, bssid, sizeof(wlc->bsscfg->BSSID));
2165 wlc->bsscfg->type = BRCMS_TYPE_AP;
2167 brcms_b_mctrl(wlc->hw, MCTL_AP | MCTL_INFRA, MCTL_AP | MCTL_INFRA);
2172 memcpy(wlc->pub->cur_etheraddr, addr, sizeof(wlc->pub->cur_etheraddr));
2173 wlc->bsscfg->type = BRCMS_TYPE_ADHOC;
2175 brcms_b_mctrl(wlc->hw, MCTL_AP | MCTL_INFRA, 0);
2181 struct brcms_hardware *wlc_hw = wlc->hw;
2198 if (wlc_hw->antsel_type == ANTSEL_2x3) {
2206 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2208 } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2214 bcma_set16(wlc_hw->d11core, D11REGOFFS(psm_gpio_oe),
2216 bcma_set16(wlc_hw->d11core, D11REGOFFS(psm_gpio_out),
2234 if (wlc_hw->boardflags & BFL_PACTRL)
2238 bcma_chipco_gpio_control(&wlc_hw->d11core->bus->drv_cc, gm, gc);
2244 struct bcma_device *core = wlc_hw->d11core;
2248 brcms_dbg_info(wlc_hw->d11core, "wl%d\n", wlc_hw->unit);
2262 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2264 if (wlc_hw->ucode_loaded)
2267 if (D11REV_IS(wlc_hw->corerev, 17) || D11REV_IS(wlc_hw->corerev, 23)) {
2268 if (BRCMS_ISNPHY(wlc_hw->band)) {
2269 brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2270 ucode->bcm43xx_16_mimosz);
2271 wlc_hw->ucode_loaded = true;
2273 brcms_err(wlc_hw->d11core,
2274 "%s: wl%d: unsupported phy in corerev %d\n",
2275 __func__, wlc_hw->unit, wlc_hw->corerev);
2276 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2277 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2278 brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2279 ucode->bcm43xx_24_lcnsz);
2280 wlc_hw->ucode_loaded = true;
2282 brcms_err(wlc_hw->d11core,
2283 "%s: wl%d: unsupported phy in corerev %d\n",
2284 __func__, wlc_hw->unit, wlc_hw->corerev);
2292 wlc_hw->bmac_phytxant = phytxant;
2295 if (!wlc_hw->up)
2303 return (u16) wlc_hw->wlc->stf->txant;
2308 wlc_hw->antsel_type = antsel_type;
2311 wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2319 struct bcma_device *core = wlc_hw->d11core;
2321 unit = wlc_hw->unit;
2324 /* read intstatus register and ignore any non-error bits */
2370 brcms_fatal_error(wlc_hw->wlc->wl); /* big hammer */
2381 struct brcms_hardware *wlc_hw = wlc->hw;
2382 wlc->macintmask = wlc->defmacintmask;
2383 bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
2388 struct brcms_hardware *wlc_hw = wlc->hw;
2391 if (!wlc_hw->clk)
2394 macintmask = wlc->macintmask; /* isr can still happen */
2396 bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), 0);
2397 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(macintmask));
2399 wlc->macintmask = 0;
2402 return wlc->macintstatus ? 0 : macintmask;
2407 struct brcms_hardware *wlc_hw = wlc->hw;
2408 if (!wlc_hw->clk)
2411 wlc->macintmask = macintmask;
2412 bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
2424 if ((wlc_hw->suspended_fifos & fifo) == fifo)
2428 if (wlc_hw->suspended_fifos == 0)
2432 wlc_hw->suspended_fifos |= fifo;
2434 if (wlc_hw->di[tx_fifo]) {
2436 * Suspending AMPDU transmissions in the middle can cause
2437 * underflow which may result in mismatch between ucode and
2440 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2441 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2443 dma_txsuspend(wlc_hw->di[tx_fifo]);
2445 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2446 brcms_c_enable_mac(wlc_hw->wlc);
2453 /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2458 if (wlc_hw->di[tx_fifo])
2459 dma_txresume(wlc_hw->di[tx_fifo]);
2462 if (wlc_hw->suspended_fifos == 0)
2465 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2466 if (wlc_hw->suspended_fifos == 0)
2476 u8 *ethaddr = wlc_hw->wlc->pub->cur_etheraddr;
2498 wlc_phy_mute_upd(wlc_hw->band->pi, mute_tx, 0);
2509 brcms_b_mute(wlc->hw, mute_tx);
2516 * -1 if brcms_deviceremoved(wlc) evaluates to true;
2517 * 0 if the interrupt is not for us, or we are in some special cases;
2522 struct brcms_hardware *wlc_hw = wlc->hw;
2523 struct bcma_device *core = wlc_hw->d11core;
2528 mask = in_isr ? wlc->macintmask : wlc->defmacintmask;
2530 trace_brcms_macintstatus(&core->dev, in_isr, macintstatus, mask);
2532 /* detect cardbus removed, in power down(suspend) and in reset */
2534 return -1;
2552 wlc->macintmask = 0;
2557 /* MI_DMAINT is indication of non-zero intstatus */
2560 * only fifo interrupt enabled is I_RI in
2570 /* Update wlc->macintstatus and wlc->intstatus[]. */
2583 /* update interrupt status in software */
2584 wlc->macintstatus |= macintstatus;
2590 * First-level interrupt processing.
2597 struct brcms_hardware *wlc_hw = wlc->hw;
2600 if (!wlc_hw->up || !wlc->macintmask)
2607 brcms_err(wlc_hw->d11core,
2608 "DEVICEREMOVED detected in the ISR code path\n");
2617 wlc->macintstatus = macintstatus;
2625 struct brcms_hardware *wlc_hw = wlc->hw;
2626 struct bcma_device *core = wlc_hw->d11core;
2629 brcms_dbg_mac80211(core, "wl%d: bandunit %d\n", wlc_hw->unit,
2630 wlc_hw->band->bandunit);
2635 wlc_hw->mac_suspend_depth++;
2636 if (wlc_hw->mac_suspend_depth > 1)
2645 brcms_err(core, "wl%d: %s: dead chip\n", wlc_hw->unit,
2647 brcms_down(wlc->wl);
2656 brcms_err(core, "wl%d: %s: dead chip\n", wlc_hw->unit,
2658 brcms_down(wlc->wl);
2671 wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2673 "psm_brc 0x%04x\n", wlc_hw->unit,
2681 brcms_err(core, "wl%d: %s: dead chip\n", wlc_hw->unit,
2683 brcms_down(wlc->wl);
2693 struct brcms_hardware *wlc_hw = wlc->hw;
2694 struct bcma_device *core = wlc_hw->d11core;
2697 brcms_dbg_mac80211(core, "wl%d: bandunit %d\n", wlc_hw->unit,
2698 wlc->band->bandunit);
2703 wlc_hw->mac_suspend_depth--;
2704 if (wlc_hw->mac_suspend_depth > 0)
2729 wlc_hw->hw_stf_ss_opmode = stf_mode;
2731 if (wlc_hw->clk)
2737 struct bcma_device *core = wlc_hw->d11core;
2739 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2757 "expected 0xaa5555aa\n", wlc_hw->unit, val);
2770 "expected 0x55aaaa55\n", wlc_hw->unit, val);
2785 "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
2798 struct bcma_device *core = wlc_hw->d11core;
2801 brcms_dbg_info(core, "wl%d\n", wlc_hw->unit);
2806 if ((ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM4313)) {
2853 brcms_dbg_info(wlc_hw->d11core, "wl%d: disable core\n", wlc_hw->unit);
2855 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
2860 if (wlc_hw->noreset)
2864 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
2867 wlc_phy_anacore(wlc_hw->band->pi, OFF);
2872 wlc_hw->clk = false;
2873 bcma_core_disable(wlc_hw->d11core, 0);
2874 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2879 struct brcms_hardware *wlc_hw = wlc->hw;
2884 if (wlc_hw->di[i]) {
2885 dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
2887 ieee80211_wake_queue(wlc->pub->ieee_hw,
2893 dma_rxreclaim(wlc_hw->di[RX_FIFO]);
2899 struct bcma_device *core = wlc_hw->d11core;
2914 struct bcma_device *core = wlc_hw->d11core;
2997 brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
3003 wlc_hw->SRL = SRL;
3004 wlc_hw->LRL = LRL;
3007 if (wlc_hw->up) {
3008 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
3010 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
3011 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->SRL);
3012 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
3014 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
3015 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->LRL);
3022 if (mboolisset(wlc_hw->pllreq, req_bit))
3025 mboolset(wlc_hw->pllreq, req_bit);
3027 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3028 if (!wlc_hw->sbclk)
3032 if (!mboolisset(wlc_hw->pllreq, req_bit))
3035 mboolclr(wlc_hw->pllreq, req_bit);
3037 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3038 if (wlc_hw->sbclk)
3046 wlc_hw->antsel_avail = antsel_avail;
3050 * conditions under which the PM bit should be set in outgoing frames
3070 if (!wlc->pub->up)
3073 macstats = wlc->core->macstat_snapshot;
3077 rxf0ovfl = macstats->rxf0ovfl;
3081 txfunfl[i] = macstats->txfunfl[i];
3085 brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, macstats,
3090 delta = (u16)(macstats->rxf0ovfl - rxf0ovfl);
3092 brcms_err(wlc->hw->d11core, "wl%d: %u rx fifo 0 overflows!\n",
3093 wlc->pub->unit, delta);
3097 delta = macstats->txfunfl[i] - txfunfl[i];
3099 brcms_err(wlc->hw->d11core,
3101 wlc->pub->unit, delta, i);
3107 if (wlc->hw->di[i])
3108 dma_counterreset(wlc->hw->di[i]);
3115 if (!brcms_deviceremoved(wlc_hw->wlc))
3119 brcms_c_flushqueues(wlc_hw->wlc);
3124 brcms_dbg_info(wlc->hw->d11core, "wl%d\n", wlc->pub->unit);
3130 memset(wlc->core->macstat_snapshot, 0, sizeof(struct macstat));
3132 brcms_b_reset(wlc->hw);
3140 scb->flags = SCB_WMECAP | SCB_HTCAP;
3142 scb->seqnum[i] = 0;
3145 scb->magic = SCB_MAGIC;
3158 struct brcms_hardware *wlc_hw = wlc->hw;
3159 struct bcma_device *core = wlc_hw->d11core;
3165 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3167 brcms_dbg_info(core, "wl%d: core init\n", wlc_hw->unit);
3179 bcma_write32(core, D11REGOFFS(macintstatus), -1);
3183 /* wait for ucode to self-suspend after auto-init */
3187 brcms_err(core, "wl%d: wlc_coreinit: ucode did not self-"
3188 "suspend!\n", wlc_hw->unit);
3194 if (D11REV_IS(wlc_hw->corerev, 17) || D11REV_IS(wlc_hw->corerev, 23)) {
3195 if (BRCMS_ISNPHY(wlc_hw->band))
3196 brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3198 brcms_err(core, "%s: wl%d: unsupported phy in corerev"
3199 " %d\n", __func__, wlc_hw->unit,
3200 wlc_hw->corerev);
3201 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3202 if (BRCMS_ISLCNPHY(wlc_hw->band))
3203 brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3205 brcms_err(core, "%s: wl%d: unsupported phy in corerev"
3206 " %d\n", __func__, wlc_hw->unit,
3207 wlc_hw->corerev);
3210 __func__, wlc_hw->unit, wlc_hw->corerev);
3219 if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3221 err = -1;
3224 if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3226 err = -1;
3231 if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3233 err = -1;
3235 if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3237 err = -1;
3242 if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3244 err = -1;
3246 if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3248 err = -1;
3253 wlc_hw->xmtfifo_sz[i], i);
3258 /* band-specific inits done by wlc_bsinit() */
3287 wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3288 bcma_write16(core, D11REGOFFS(scc_fastpwrup_dly), wlc->fastpwrup_dly);
3291 brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3295 (u16) (wlc_hw->machwcap & 0xffff));
3297 (u16) ((wlc_hw->
3304 bcma_write32(core, D11REGOFFS(objdata), wlc_hw->SRL);
3308 bcma_write32(core, D11REGOFFS(objdata), wlc_hw->LRL);
3311 brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3312 brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3319 if (wlc_hw->di[i])
3320 dma_txinit(wlc_hw->di[i]);
3324 dma_rxinit(wlc_hw->di[RX_FIFO]);
3325 dma_rxfill(wlc_hw->di[RX_FIFO]);
3332 struct brcms_c_info *wlc = wlc_hw->wlc;
3335 fastclk = wlc_hw->forcefastclk;
3340 macintmask = brcms_intrsoff(wlc->wl);
3342 /* set up the specified band and chanspec */
3344 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3346 /* do one-time phy inits and calibration */
3347 wlc_phy_cal_init(wlc_hw->band->pi);
3349 /* core-specific initialization */
3352 /* band-specific inits */
3356 brcms_intrsrestore(wlc->wl, macintmask);
3361 mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3367 wlc_hw->mac_suspend_depth = 1;
3378 wlc->chanspec = chanspec;
3381 brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3383 if (wlc->stf->ss_algosel_auto)
3384 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3387 brcms_c_stf_ss_update(wlc, wlc->band);
3393 brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
3394 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
3395 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
3396 brcms_chspec_bw(wlc->default_bss->chanspec),
3397 wlc->stf->txstreams);
3400 /* derive wlc->band->basic_rate[] table from 'rateset' */
3408 u8 *br = wlc->band->basic_rate;
3411 /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
3414 /* For each basic rate in the rates list, make an entry in the
3417 for (i = 0; i < rateset->count; i++) {
3419 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
3423 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
3426 brcms_err(wlc->hw->d11core, "brcms_c_rate_lookup_init: "
3427 "invalid rate 0x%X in rate set\n",
3428 rateset->rates[i]);
3435 /* The rate lookup table now has non-zero entries for each
3442 * basic_rate = wlc->band->basic_rate[tx_rate]
3446 * to high, filling in holes in the lookup table
3449 for (i = 0; i < wlc->band->hw_rateset.count; i++) {
3450 rate = wlc->band->hw_rateset.rates[i];
3466 * best basic rate less than this rate and fill in
3467 * the hole in the table
3477 * In 11g and 11a, the OFDM mandatory rates
3487 /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
3504 * power-cycled (hibernate). Figure out the right band to park on
3506 if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3507 /* updated in brcms_c_bandlock() */
3508 parkband = wlc->band->bandunit;
3511 /* park on the band of the specified chanspec */
3519 /* make each band operational, software state init */
3520 for (i = 0; i < wlc->pub->_nbands; i++) {
3523 wlc->band = wlc->bandstate[j];
3527 /* fill in hw_rate */
3528 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3530 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3548 wlc->filter_flags = filter_flags;
3562 brcms_b_mctrl(wlc->hw,
3577 if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3578 if (wlc->pub->associated) {
3581 * in ucode inits. I think that the ucode inits set
3583 * beacon. This should not be done in the inits. If
3588 if (BRCMS_PHY_11N_CAP(wlc->band))
3589 brcms_b_write_shm(wlc->hw,
3612 * for a given rate, the LS-nibble of the PLCP SIGNAL field is
3620 /* Find the SHM pointer to the ACK rate entry by looking in the
3621 * Direct-map Table
3623 basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2));
3625 /* Update the SHM BSS-basic-rate-set mapping table with the pointer
3628 brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr);
3636 if (BRCMS_PHY_11N_CAP(wlc->band)) {
3637 if (wlc->band->bandtype == BRCM_BAND_5G)
3641 } else if (wlc->band->gmode)
3659 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
3679 /* band-specific init */
3682 brcms_dbg_info(wlc->hw->d11core, "wl%d: bandunit %d\n",
3683 wlc->pub->unit, wlc->band->bandunit);
3688 /* update some band specific mac configuration */
3692 brcms_c_antsel_init(wlc->asi);
3696 /* formula: IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3706 brcms_err(wlc->hw->d11core,
3708 wlc->pub->unit);
3709 return -EINVAL;
3712 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3715 brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16);
3718 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3720 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3734 brcms_dbg_mac80211(wlc->hw->d11core, "wl%d: hps %d\n", wlc->pub->unit,
3737 v1 = bcma_read32(wlc->hw->d11core, D11REGOFFS(maccontrol));
3742 brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2);
3747 brcms_b_wait_for_wake(wlc->hw);
3756 struct brcms_c_info *wlc = bsscfg->wlc;
3759 brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, wlc->pub->cur_etheraddr);
3764 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3769 /* we need to update BSSID in RXE match registers */
3770 brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3775 u8 len = min_t(u8, sizeof(wlc->bsscfg->SSID), ssid_len);
3776 memset(wlc->bsscfg->SSID, 0, sizeof(wlc->bsscfg->SSID));
3778 memcpy(wlc->bsscfg->SSID, ssid, len);
3779 wlc->bsscfg->SSID_len = len;
3784 wlc_hw->shortslot = shortslot;
3786 if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) {
3787 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3789 brcms_c_enable_mac(wlc_hw->wlc);
3800 if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3801 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3803 if (wlc->shortslot == shortslot)
3806 wlc->shortslot = shortslot;
3808 brcms_b_set_shortslot(wlc->hw, shortslot);
3813 if (wlc->home_chanspec != chanspec) {
3814 wlc->home_chanspec = chanspec;
3816 if (wlc->pub->associated)
3817 wlc->bsscfg->current_bss->chanspec = chanspec;
3827 brcms_dbg_mac80211(wlc_hw->d11core, "wl%d: 0x%x\n", wlc_hw->unit,
3830 wlc_hw->chanspec = chanspec;
3833 if (wlc_hw->_nbands > 1) {
3835 if (wlc_hw->band->bandunit != bandunit) {
3837 * use light band switch if not up yet
3839 if (wlc_hw->up) {
3840 wlc_phy_chanspec_radio_set(wlc_hw->
3841 bandstate[bandunit]->
3850 wlc_phy_initcal_enable(wlc_hw->band->pi, !mute_tx);
3852 if (!wlc_hw->up) {
3853 if (wlc_hw->clk)
3854 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
3856 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3858 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
3859 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
3866 /* switch to and initialize new band */
3870 wlc->band = wlc->bandstate[bandunit];
3872 if (!wlc->pub->up)
3878 /* band-specific initializations */
3885 u16 old_chanspec = wlc->chanspec;
3887 if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
3888 brcms_err(wlc->hw->d11core, "wl%d: %s: Bad channel %d\n",
3889 wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
3894 if (wlc->pub->_nbands > 1) {
3896 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
3897 if (wlc->bandlocked) {
3898 brcms_err(wlc->hw->d11core,
3899 "wl%d: %s: chspec %d band is locked!\n",
3900 wlc->pub->unit, __func__,
3909 * band, or the following brcms_b_set_chanspec() may
3921 brcms_c_antsel_init(wlc->asi);
3926 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
3927 wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
3937 * ratespec CCK ant = wlc->stf->txant
3944 u16 phytxant = wlc->stf->phytxant;
3947 /* for non-siso rates or default setting, use the available chains */
3948 if (BRCMS_PHY_11N_CAP(wlc->band))
3951 phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD);
3953 brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl);
3959 * in periodic function
3967 BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
3971 wlc->protection->_g = (bool) val;
3974 wlc->protection->g_override = (s8) val;
3977 wlc->protection->gmode_user = (u8) val;
3980 wlc->protection->overlap = (s8) val;
3983 wlc->protection->nmode_user = (s8) val;
3986 wlc->protection->n_cfg = (s8) val;
3989 wlc->protection->n_cfg_override = (s8) val;
3992 wlc->protection->nongf = (bool) val;
3995 wlc->protection->nongf_override = (s8) val;
3998 wlc->protection->n_pam_override = (s8) val;
4001 wlc->protection->n_obss = (bool) val;
4012 if (wlc->pub->up) {
4020 wlc->stf->ldpc = val;
4022 if (wlc->pub->up) {
4025 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4038 if (!wlc->clk) {
4039 brcms_err(wlc->hw->d11core, "wl%d: %s : no-clock\n",
4040 wlc->pub->unit, __func__);
4045 /* fill in shm ac params struct */
4046 acp_shm.txop = params->txop;
4048 wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4050 acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4058 brcms_err(wlc->hw->d11core, "wl%d: edcf_setparams: bad "
4059 "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4061 acp_shm.cwmin = params->cw_min;
4062 acp_shm.cwmax = params->cw_max;
4065 bcma_read16(wlc->hw->d11core, D11REGOFFS(tsf_random)) &
4069 acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO +
4075 /* Fill in shm acparam table */
4078 brcms_b_write_shm(wlc->hw,
4109 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4111 /* fill in shm ac params struct */
4112 txq_pars.txop = edcf_acp->TXOP;
4113 txq_pars.aifs = edcf_acp->ACI;
4115 /* CWmin = 2^(ECWmin) - 1 */
4116 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4117 /* CWmax = 2^(ECWmax) - 1 */
4118 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4132 if (wlc->radio_monitor)
4135 wlc->radio_monitor = true;
4136 brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON);
4137 brcms_add_timer(wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, true);
4142 if (!wlc->radio_monitor)
4145 wlc->radio_monitor = false;
4146 brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON);
4147 return brcms_del_timer(wlc->radio_timer);
4153 if (wlc->pub->hw_off)
4156 if (brcms_b_radio_read_hwdisabled(wlc->hw))
4157 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4159 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4167 return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4177 brcms_err(wlc->hw->d11core, "wl%d: %s: dead chip\n",
4178 wlc->pub->unit, __func__);
4179 brcms_down(wlc->wl);
4186 /* common low-level watchdog code */
4189 struct brcms_hardware *wlc_hw = wlc->hw;
4191 if (!wlc_hw->up)
4195 wlc_hw->now++;
4201 dma_rxfill(wlc->hw->di[RX_FIFO]);
4203 wlc_phy_watchdog(wlc_hw->band->pi);
4209 brcms_dbg_info(wlc->hw->d11core, "wl%d\n", wlc->pub->unit);
4211 if (!wlc->pub->up)
4215 brcms_err(wlc->hw->d11core, "wl%d: %s: dead chip\n",
4216 wlc->pub->unit, __func__);
4217 brcms_down(wlc->wl);
4222 wlc->pub->now++;
4226 if (wlc->pub->radio_disabled)
4233 * detect 16-bit counter wrap
4235 if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4238 if (BRCMS_ISNPHY(wlc->band) &&
4239 ((wlc->pub->now - wlc->tempsense_lasttime) >=
4241 wlc->tempsense_lasttime = wlc->pub->now;
4255 wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4257 if (!wlc->wdtimer) {
4258 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for wdtimer "
4263 wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4265 if (!wlc->radio_timer) {
4266 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for radio_timer "
4279 * may get overrides later in this function
4286 wlc->chanspec = ch20mhz_chspec(1);
4289 wlc->shortslot = false;
4290 wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4307 wlc->include_legacy_erp = true;
4309 wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4310 wlc->stf->txant = ANT_TX_DEF;
4312 wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4314 wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4316 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4317 wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4320 wlc->SFBL = RETRY_SHORT_FB;
4321 wlc->LFBL = RETRY_LONG_FB;
4324 wlc->SRL = RETRY_SHORT_DEF;
4325 wlc->LRL = RETRY_LONG_DEF;
4328 wlc->pub->_ampdu = AMPDU_AGG_HOST;
4335 unit = wlc->pub->unit;
4337 wlc->asi = brcms_c_antsel_attach(wlc);
4338 if (wlc->asi == NULL) {
4339 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4345 wlc->ampdu = brcms_c_ampdu_attach(wlc);
4346 if (wlc->ampdu == NULL) {
4347 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4354 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4365 return wlc->pub;
4371 * initialize software state for each core and band
4372 * put the whole chip in reset(driver down state), no clock
4382 struct wiphy *wiphy = wlc->wiphy;
4383 struct pci_dev *pcidev = core->bus->host_pci;
4384 struct ssb_sprom *sprom = &core->bus->sprom;
4386 if (core->bus->hosttype == BCMA_HOSTTYPE_PCI)
4388 pcidev->vendor,
4389 pcidev->device);
4392 core->bus->boardinfo.vendor,
4393 core->bus->boardinfo.type);
4397 wlc_hw = wlc->hw;
4398 wlc_hw->wlc = wlc;
4399 wlc_hw->unit = unit;
4400 wlc_hw->band = wlc_hw->bandstate[0];
4401 wlc_hw->_piomode = piomode;
4410 wlc_hw->sih = ai_attach(core->bus);
4411 if (wlc_hw->sih == NULL) {
4426 if (core->bus->hosttype == BCMA_HOSTTYPE_PCI) {
4427 wlc_hw->vendorid = pcidev->vendor;
4428 wlc_hw->deviceid = pcidev->device;
4430 wlc_hw->vendorid = core->bus->boardinfo.vendor;
4431 wlc_hw->deviceid = core->bus->boardinfo.type;
4434 wlc_hw->d11core = core;
4435 wlc_hw->corerev = core->id.rev;
4444 ai_clkctl_init(wlc_hw->sih);
4448 * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4463 j = sprom->board_rev;
4467 wlc_hw->boardrev = (u16) j;
4471 unit, ai_get_boardtype(wlc_hw->sih),
4472 wlc_hw->boardrev);
4476 wlc_hw->sromrev = sprom->revision;
4477 wlc_hw->boardflags = sprom->boardflags_lo + (sprom->boardflags_hi << 16);
4478 wlc_hw->boardflags2 = sprom->boardflags2_lo + (sprom->boardflags2_hi << 16);
4480 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4484 if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4485 wlc_hw->deviceid == BCM43224_D11N_ID_VEN1 ||
4486 wlc_hw->deviceid == BCM43224_CHIP_ID)
4488 wlc_hw->_nbands = 2;
4490 wlc_hw->_nbands = 1;
4492 if ((ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM43225))
4493 wlc_hw->_nbands = 1;
4498 wlc->vendorid = wlc_hw->vendorid;
4499 wlc->deviceid = wlc_hw->deviceid;
4500 wlc->pub->sih = wlc_hw->sih;
4501 wlc->pub->corerev = wlc_hw->corerev;
4502 wlc->pub->sromrev = wlc_hw->sromrev;
4503 wlc->pub->boardrev = wlc_hw->boardrev;
4504 wlc->pub->boardflags = wlc_hw->boardflags;
4505 wlc->pub->boardflags2 = wlc_hw->boardflags2;
4506 wlc->pub->_nbands = wlc_hw->_nbands;
4508 wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4510 if (wlc_hw->physhim == NULL) {
4517 /* pass all the parameters to wlc_phy_shared_attach in one struct */
4518 sha_params.sih = wlc_hw->sih;
4519 sha_params.physhim = wlc_hw->physhim;
4521 sha_params.corerev = wlc_hw->corerev;
4522 sha_params.vid = wlc_hw->vendorid;
4523 sha_params.did = wlc_hw->deviceid;
4524 sha_params.chip = ai_get_chip_id(wlc_hw->sih);
4525 sha_params.chiprev = ai_get_chiprev(wlc_hw->sih);
4526 sha_params.chippkg = ai_get_chippkg(wlc_hw->sih);
4527 sha_params.sromrev = wlc_hw->sromrev;
4528 sha_params.boardtype = ai_get_boardtype(wlc_hw->sih);
4529 sha_params.boardrev = wlc_hw->boardrev;
4530 sha_params.boardflags = wlc_hw->boardflags;
4531 sha_params.boardflags2 = wlc_hw->boardflags2;
4534 wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4535 if (!wlc_hw->phy_sh) {
4540 /* initialize software state for each core and band */
4541 for (j = 0; j < wlc_hw->_nbands; j++) {
4549 wlc_hw->band->bandunit = j;
4550 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4551 wlc->band->bandunit = j;
4552 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4553 wlc->core->coreidx = core->core_index;
4555 wlc_hw->machwcap = bcma_read32(core, D11REGOFFS(machwcap));
4556 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4559 WARN_ON(wlc_hw->corerev < XMTFIFOTBL_STARTREV ||
4560 (wlc_hw->corerev - XMTFIFOTBL_STARTREV) >
4562 wlc_hw->xmtfifo_sz =
4563 xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4564 WARN_ON(!wlc_hw->xmtfifo_sz[0]);
4566 /* Get a phy for this band */
4567 wlc_hw->band->pi =
4568 wlc_phy_attach(wlc_hw->phy_sh, core,
4569 wlc_hw->band->bandtype,
4570 wlc->wiphy);
4571 if (wlc_hw->band->pi == NULL) {
4578 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4580 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4581 &wlc_hw->band->phyrev,
4582 &wlc_hw->band->radioid,
4583 &wlc_hw->band->radiorev);
4584 wlc_hw->band->abgphy_encore =
4585 wlc_phy_get_encore(wlc_hw->band->pi);
4586 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4587 wlc_hw->band->core_flags =
4588 wlc_phy_get_coreflags(wlc_hw->band->pi);
4591 if (BRCMS_ISNPHY(wlc_hw->band)) {
4592 if (NCONF_HAS(wlc_hw->band->phyrev))
4596 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4597 if (LCNCONF_HAS(wlc_hw->band->phyrev))
4605 wlc_hw->band->phytype, wlc_hw->band->phyrev);
4612 * BMAC_NOTE: wlc->band->pi should not be set below and should
4613 * be done in the high level attach. However we can not make
4615 * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4616 * keeping wlc_hw->band->pi as well for incremental update of
4620 wlc->band->pi = wlc_hw->band->pi;
4621 wlc->band->phytype = wlc_hw->band->phytype;
4622 wlc->band->phyrev = wlc_hw->band->phyrev;
4623 wlc->band->radioid = wlc_hw->band->radioid;
4624 wlc->band->radiorev = wlc_hw->band->radiorev;
4626 wlc->band->phytype, wlc->band->phyrev,
4627 wlc->band->radioid, wlc->band->radiorev);
4629 wlc_hw->band->CWmin = APHY_CWMIN;
4630 wlc_hw->band->CWmax = PHY_CWMAX;
4642 bcma_host_pci_down(wlc_hw->d11core->bus);
4648 * The hardware is in the DOWN state at this point. D11 core
4649 * or cores are in reset with clocks off, and the board PLLs
4652 * Beyond this point, wlc->sbclk == false and chip registers
4658 brcms_c_get_macaddr(wlc_hw, wlc_hw->etheraddr);
4660 if (is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4661 is_zero_ether_addr(wlc_hw->etheraddr)) {
4668 brcms_dbg_info(wlc_hw->d11core, "deviceid 0x%x nbands %d board 0x%x\n",
4669 wlc_hw->deviceid, wlc_hw->_nbands,
4670 ai_get_boardtype(wlc_hw->sih));
4685 struct ssb_sprom *sprom = &wlc->hw->d11core->bus->sprom;
4687 unit = wlc->pub->unit;
4688 bandtype = wlc->band->bandtype;
4692 aa = sprom->ant_available_a;
4694 aa = sprom->ant_available_bg;
4697 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4704 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
4705 wlc->stf->txant = ANT_TX_FORCE_0;
4707 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
4708 wlc->stf->txant = ANT_TX_FORCE_1;
4714 wlc->band->antgain = sprom->antenna_gain.a1;
4716 wlc->band->antgain = sprom->antenna_gain.a0;
4724 struct brcms_band *band;
4725 struct brcms_bss_info *bi = wlc->default_bss;
4729 bi->beacon_period = BEACON_INTERVAL_DEFAULT;
4735 wlc->home_chanspec = bi->chanspec = chanspec;
4737 /* find the band of our default channel */
4738 band = wlc->band;
4739 if (wlc->pub->_nbands > 1 &&
4740 band->bandunit != chspec_bandunit(chanspec))
4741 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
4743 /* init bss rates to the band specific default rate set */
4744 brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
4745 band->bandtype, false, BRCMS_RATE_MASK_FULL,
4746 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
4747 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
4749 if (wlc->pub->_n_enab & SUPPORT_11N)
4750 bi->flags |= BRCMS_BSS_HT;
4756 struct brcms_band *band;
4758 for (i = 0; i < wlc->pub->_nbands; i++) {
4759 band = wlc->bandstate[i];
4760 if (band->bandtype == BRCM_BAND_5G) {
4763 band->mimo_cap_40 = true;
4765 band->mimo_cap_40 = false;
4768 band->mimo_cap_40 = true;
4770 band->mimo_cap_40 = false;
4778 if (wlc->wdtimer) {
4779 brcms_free_timer(wlc->wdtimer);
4780 wlc->wdtimer = NULL;
4782 if (wlc->radio_timer) {
4783 brcms_free_timer(wlc->radio_timer);
4784 wlc->radio_timer = NULL;
4790 if (wlc->asi) {
4791 brcms_c_antsel_detach(wlc->asi);
4792 wlc->asi = NULL;
4795 if (wlc->ampdu) {
4796 brcms_c_ampdu_detach(wlc->ampdu);
4797 wlc->ampdu = NULL;
4809 struct brcms_hw_band *band;
4810 struct brcms_hardware *wlc_hw = wlc->hw;
4814 band = wlc_hw->band;
4815 for (i = 0; i < wlc_hw->_nbands; i++) {
4816 if (band->pi) {
4817 /* Detach this band's phy */
4818 wlc_phy_detach(band->pi);
4819 band->pi = NULL;
4821 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
4825 kfree(wlc_hw->phy_sh);
4827 wlc_phy_shim_detach(wlc_hw->physhim);
4829 if (wlc_hw->sih) {
4830 ai_detach(wlc_hw->sih);
4831 wlc_hw->sih = NULL;
4839 * It can NOT touch hardware registers since the d11core may be in reset and
4859 brcms_c_channel_mgr_detach(wlc->cmi);
4872 /* STA-BSS; short capable */
4873 wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
4879 if (wlc_hw->wlc->pub->hw_up)
4882 brcms_dbg_info(wlc_hw->d11core, "wl%d\n", wlc_hw->unit);
4889 ai_clkctl_init(wlc_hw->sih);
4903 wlc_phy_por_inform(wlc_hw->band->pi);
4905 wlc_hw->ucode_loaded = false;
4906 wlc_hw->wlc->pub->hw_up = true;
4908 if ((wlc_hw->boardflags & BFL_FEM)
4909 && (ai_get_chip_id(wlc_hw->sih) == BCMA_CHIP_ID_BCM4313)) {
4911 (wlc_hw->boardrev >= 0x1250
4912 && (wlc_hw->boardflags & BFL_FEM_BT)))
4913 ai_epa_4313war(wlc_hw->sih);
4919 brcms_dbg_info(wlc_hw->d11core, "wl%d\n", wlc_hw->unit);
4926 ai_clkctl_init(wlc_hw->sih);
4930 * Configure pci/pcmcia here instead of in brcms_c_attach()
4933 bcma_host_pci_irq_ctl(wlc_hw->d11core->bus, wlc_hw->d11core,
4939 * bring the driver up in this case.
4942 /* put SB PCI in down state again */
4943 bcma_host_pci_down(wlc_hw->d11core->bus);
4945 return -ENOMEDIUM;
4948 bcma_host_pci_up(wlc_hw->d11core->bus);
4958 wlc_hw->up = true;
4959 wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
4963 brcms_intrson(wlc_hw->wlc->wl);
4976 if (!wlc->clk)
4980 brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac),
4981 wlc->wme_retries[ac]);
4989 brcms_dbg_info(wlc->hw->d11core, "wl%d\n", wlc->pub->unit);
4992 if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
4993 return -ENOMEDIUM;
4995 if (!wlc->pub->hw_up) {
4996 brcms_b_hw_up(wlc->hw);
4997 wlc->pub->hw_up = true;
5000 if ((wlc->pub->boardflags & BFL_FEM)
5001 && (ai_get_chip_id(wlc->hw->sih) == BCMA_CHIP_ID_BCM4313)) {
5002 if (wlc->pub->boardrev >= 0x1250
5003 && (wlc->pub->boardflags & BFL_FEM_BT))
5004 brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
5007 brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE,
5014 * the driver up in this case. If radio is disabled, abort up, lower
5018 * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5020 if (!wlc->pub->radio_disabled) {
5021 int status = brcms_b_up_prep(wlc->hw);
5022 if (status == -ENOMEDIUM) {
5024 (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5025 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5026 mboolset(wlc->pub->radio_disabled,
5028 if (bsscfg->type == BRCMS_TYPE_STATION ||
5029 bsscfg->type == BRCMS_TYPE_ADHOC)
5030 brcms_err(wlc->hw->d11core,
5031 "wl%d: up: rfdisable -> "
5033 wlc->pub->unit);
5038 if (wlc->pub->radio_disabled) {
5044 wlc->clk = true;
5049 brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5051 brcms_init(wlc->wl);
5052 wlc->pub->up = true;
5054 if (wlc->bandinit_pending) {
5055 ch = wlc->pub->ieee_hw->conf.chandef.chan;
5057 brcms_c_set_chanspec(wlc, ch20mhz_chspec(ch->hw_value));
5058 wlc->bandinit_pending = false;
5062 brcms_b_up_finish(wlc->hw);
5068 brcms_add_timer(wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5069 wlc->WDarmed = true;
5073 /* ensure LDPC config is in sync */
5074 brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5084 if (!wlc_hw->up)
5087 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5091 wlc_hw->wlc->macintmask = 0;
5094 brcms_intrsoff(wlc_hw->wlc->wl);
5100 callbacks += wlc_phy_down(wlc_hw->band->pi);
5110 if (!wlc_hw->up)
5113 wlc_hw->up = false;
5114 wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5116 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5119 wlc_hw->sbclk = false;
5120 wlc_hw->clk = false;
5121 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5124 brcms_c_flushqueues(wlc_hw->wlc);
5128 if (bcma_core_is_enabled(wlc_hw->d11core)) {
5129 if (bcma_read32(wlc_hw->d11core,
5131 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5132 callbacks += brcms_reset(wlc_hw->wlc->wl);
5137 if (!wlc_hw->noreset) {
5138 bcma_host_pci_down(wlc_hw->d11core->bus);
5157 brcms_dbg_info(wlc->hw->d11core, "wl%d\n", wlc->pub->unit);
5159 /* check if we are already in the going down path */
5160 if (wlc->going_down) {
5161 brcms_err(wlc->hw->d11core,
5163 wlc->pub->unit, __func__);
5166 if (!wlc->pub->up)
5169 wlc->going_down = true;
5171 callbacks += brcms_b_bmac_down_prep(wlc->hw);
5177 if (wlc->modulecb[i].down_fn)
5179 wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5183 if (wlc->WDarmed) {
5184 if (!brcms_del_timer(wlc->wdtimer))
5186 wlc->WDarmed = false;
5189 wlc->pub->up = false;
5191 wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5193 callbacks += brcms_b_down_finish(wlc->hw);
5196 wlc->clk = false;
5198 wlc->going_down = false;
5209 /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5212 struct brcms_band *band;
5214 /* if N-support is enabled, allow Gmode set as long as requested
5217 if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
5218 return -ENOTSUPP;
5220 /* verify that we are dealing with 2G band and grab the band pointer */
5221 if (wlc->band->bandtype == BRCM_BAND_2G)
5222 band = wlc->band;
5223 else if ((wlc->pub->_nbands > 1) &&
5224 (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
5225 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5227 return -EINVAL;
5261 brcms_err(wlc->hw->d11core, "wl%d: %s: invalid gmode %d\n",
5262 wlc->pub->unit, __func__, gmode);
5263 return -ENOTSUPP;
5266 band->gmode = gmode;
5268 wlc->shortslot_override = shortslot;
5284 wlc->default_bss->rateset.count = rs.count;
5285 memcpy(wlc->default_bss->rateset.rates, rs.rates,
5286 sizeof(wlc->default_bss->rateset.rates));
5296 if (wlc->stf->txstreams == WL_11N_3x3)
5304 wlc->pub->_n_enab = SUPPORT_HT;
5306 wlc->pub->_n_enab = SUPPORT_11N;
5307 wlc->default_bss->flags |= BRCMS_BSS_HT;
5309 brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
5310 wlc->stf->txstreams);
5311 for (i = 0; i < wlc->pub->_nbands; i++)
5312 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
5313 wlc->default_bss->rateset.mcs, MCSSET_LEN);
5329 return -EINVAL;
5331 /* try the current band */
5332 bandunit = wlc->band->bandunit;
5335 (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
5336 wlc->stf->txstreams))
5339 /* try the other band */
5344 &wlc->
5345 bandstate[bandunit]->
5347 wlc->stf->txstreams))
5351 return -EBADE;
5355 memcpy(&wlc->default_bss->rateset, &new,
5357 memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
5364 wlc_phy_ofdm_rateset_war(wlc->band->pi, false);
5372 return -EINVAL;
5374 if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
5375 return -EINVAL;
5378 if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
5379 if (wlc->band->bandunit != chspec_bandunit(chspec))
5380 wlc->bandinit_pending = true;
5382 wlc->bandinit_pending = false;
5385 wlc->default_bss->chanspec = chspec;
5388 if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
5403 return -EINVAL;
5405 wlc->SRL = srl;
5406 wlc->LRL = lrl;
5408 brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
5411 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
5412 EDCF_SHORT, wlc->SRL);
5413 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
5414 EDCF_LONG, wlc->LRL);
5426 if (wlc->pub->associated)
5427 rs = &wlc->bsscfg->current_bss->rateset;
5429 rs = &wlc->default_bss->rateset;
5432 currs->count = rs->count;
5433 memcpy(&currs->rates, &rs->rates, rs->count);
5441 if (rs->count > BRCMS_NUMRATES)
5442 return -ENOBUFS;
5447 internal_rs.count = rs->count;
5448 memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
5450 /* merge rateset coming in with the current mcsset */
5451 if (wlc->pub->_n_enab & SUPPORT_11N) {
5453 if (wlc->pub->associated)
5454 mcsset_bss = wlc->bsscfg->current_bss;
5456 mcsset_bss = wlc->default_bss;
5457 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
5470 bcma_set32(wlc->hw->d11core, D11REGOFFS(maccontrol), MCTL_TBTTHOLD);
5472 bcma_read32(wlc->hw->d11core, D11REGOFFS(maccontrol));
5477 bcma_mask32(wlc->hw->d11core, D11REGOFFS(maccontrol), ~MCTL_TBTTHOLD);
5479 bcma_read32(wlc->hw->d11core, D11REGOFFS(maccontrol));
5487 return -EINVAL;
5489 wlc->default_bss->beacon_period = period;
5493 bcma_write32(wlc->hw->d11core, D11REGOFFS(tsf_cfprep),
5495 bcma_write32(wlc->hw->d11core, D11REGOFFS(tsf_cfpstart), bcnint_us);
5503 return wlc->band->phytype;
5508 wlc->shortslot_override = sslot_override;
5512 * currently on the 5G band
5514 if (wlc->band->bandtype == BRCM_BAND_5G)
5517 if (wlc->pub->up && wlc->pub->associated) {
5519 } else if (wlc->pub->up) {
5525 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
5526 wlc->shortslot = false;
5528 wlc->shortslot =
5529 (wlc->shortslot_override ==
5541 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5546 if (wlc->modulecb[i].name[0] == '\0') {
5547 strscpy(wlc->modulecb[i].name, name,
5548 sizeof(wlc->modulecb[i].name));
5549 wlc->modulecb[i].hdl = hdl;
5550 wlc->modulecb[i].down_fn = d_fn;
5555 return -ENOSR;
5562 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5566 return -ENODATA;
5569 if (!strcmp(wlc->modulecb[i].name, name) &&
5570 (wlc->modulecb[i].hdl == hdl)) {
5571 memset(&wlc->modulecb[i], 0, sizeof(wlc->modulecb[i]));
5577 return -ENODATA;
5582 struct pci_dev *pcidev = core->bus->host_pci;
5583 u16 vendor = pcidev->vendor;
5584 u16 device = pcidev->device;
5606 struct bcma_chipinfo *chipinfo = &core->bus->chipinfo;
5608 if (chipinfo->id == BCMA_CHIP_ID_BCM4716)
5611 pr_err("unknown chip id %04x\n", chipinfo->id);
5617 switch (core->bus->hosttype) {
5623 pr_err("unknown host type: %i\n", core->bus->hosttype);
5639 /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
5645 /* Find the SHM pointer to the rate table entry by looking in the
5646 * Direct-map Table
5662 frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
5665 (((wlc->
5679 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
5681 * frame in the FES
5703 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
5705 * frame in the FES
5720 * rate MPDU rate in unit of 500kbps
5721 * next_frag_len next MPDU length in bytes
5730 sifs = get_sifs(wlc->band);
5758 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
5760 if (wlc->band->bandtype == BRCM_BAND_2G)
5761 dur -= DOT11_OFDM_SIGNAL_EXTENSION;
5767 ((nsyms * kNdps) -
5770 dur -= APHY_PREAMBLE_TIME;
5771 dur -= APHY_SIGNAL_TIME;
5776 ((nsyms * Ndps) -
5780 dur -= BPHY_PLCP_SHORT_TIME;
5782 dur -= BPHY_PLCP_TIME;
5784 /* divide out factor of 2 in rate (1/2 mbps) */
5791 * Return true if the specified rate is supported by the specified band.
5792 * BRCM_BAND_AUTO indicates the current band.
5794 static bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
5800 if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
5801 hw_rateset = &wlc->band->hw_rateset;
5802 else if (wlc->pub->_nbands > 1)
5803 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
5805 /* other band specified and we are a single band device */
5813 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
5816 for (i = 0; i < hw_rateset->count; i++)
5817 if (hw_rateset->rates[i] == rspec2rate(rspec))
5821 brcms_err(wlc->hw->d11core, "wl%d: valid_rate: rate spec 0x%x "
5822 "not in hw_rateset\n", wlc->pub->unit, rspec);
5831 struct bcma_device *core = wlc->hw->d11core;
5844 if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
5848 wlc->pub->unit, __func__);
5854 if (!CHSPEC_IS40(wlc->home_chanspec) ||
5858 wlc->pub->unit, __func__);
5867 wlc->pub->unit, rate);
5872 * MCS 0-7 may use SISO, CDD, and for
5879 wlc->pub->unit, __func__);
5886 wlc->pub->unit, __func__);
5890 if ((cur_band->bandtype != BRCM_BAND_2G)
5893 wlc->pub->unit, __func__);
5898 wlc->pub->unit, __func__);
5901 /* make sure multiple antennae are available for non-siso rates */
5902 if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
5904 "request\n", wlc->pub->unit, __func__);
5928 && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
5938 * Rate is given in the driver standard multiple of 500 kbps.
5958 if ((length << 4) - (usec * 11) > 0)
5963 if ((length << 3) - (usec * 11) > 0) {
5965 if ((usec * 11) - (length << 3) >= 8)
5971 brcms_err(wlc->hw->d11core,
5990 /* Rate: 802.11 rate code, length: PSDU length in octets */
6004 /* Rate: 802.11 rate code, length: PSDU length in octets */
6013 * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
6026 /* Rate: 802.11 rate code, length: PSDU length in octets */
6051 * DUR for CTS-TO-SELF w/ frame = 2 SIFS + next frame time + 1 ACK
6053 * cts cts-to-self or rts/cts
6054 * rts_rate rts or cts rate in unit of 500kbps
6055 * rate next MPDU rate in unit of 500kbps
6056 * frame_len next MPDU frame length in bytes
6066 sifs = get_sifs(wlc->band);
6075 /* CTS-TO-SELF */
6098 if (BRCMS_ISLCNPHY(wlc->band)) {
6104 brcms_err(wlc->hw->d11core, "phytxctl1_calc: bw %d is "
6113 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
6117 } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
6118 && !BRCMS_ISSSLPNPHY(wlc->band)) {
6120 * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
6130 if (phycfg == -1) {
6131 brcms_err(wlc->hw->d11core, "phytxctl1_calc: wrong "
6189 h = (struct ieee80211_hdr *)(p->data);
6190 qos = ieee80211_is_data_qos(h->frame_control);
6192 /* compute length of frame in bytes for use in PLCP computations */
6193 len = p->len;
6207 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
6208 /* non-AP STA should never use BCMC queue */
6210 brcms_err(wlc->hw->d11core,
6212 wlc->pub->unit, __func__);
6216 if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
6217 scb->seqnum[p->priority]++;
6220 seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
6221 seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
6222 h->seq_ctrl = cpu_to_le16(seq);
6230 /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6231 if (ieee80211_is_beacon(h->frame_control))
6234 txrate[0] = tx_info->control.rates;
6241 if (txrate[1]->idx < 0)
6244 for (k = 0; k < hw->max_rates; k++) {
6245 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
6247 if ((txrate[k]->idx >= 0)
6248 && (txrate[k]->idx <
6249 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
6251 hw->wiphy->bands[tx_info->band]->
6252 bitrates[txrate[k]->idx].hw_value;
6257 rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
6258 NRATE_MCS_INUSE | txrate[k]->idx);
6267 txrate[k]->
6270 txrate[k]->
6282 if (!is_multicast_ether_addr(h->addr1)) {
6284 brcms_c_antsel_antcfg_get(wlc->asi, false,
6290 phyctl1_stf = wlc->stf->ss_opmode;
6292 if (wlc->pub->_n_enab & SUPPORT_11N) {
6293 for (k = 0; k < hw->max_rates; k++) {
6324 if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
6328 wlc->band->pi))
6338 } else if (wlc->mimo_40txbw != AUTO)
6339 mimo_txbw = wlc->mimo_40txbw;
6341 else if (scb->flags & SCB_IS40)
6344 if (wlc->ofdm_40txbw != AUTO)
6345 mimo_txbw = wlc->ofdm_40txbw;
6346 } else if (wlc->cck_40txbw != AUTO) {
6347 mimo_txbw = wlc->cck_40txbw;
6373 if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
6376 if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
6378 brcms_warn(wlc->hw->d11core,
6380 wlc->pub->unit, __func__);
6398 && (tx_info->control.rates[0].
6403 for (k = 0; k < hw->max_rates; k++) {
6409 if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
6417 txrate[0]->count = 0;
6418 txrate[1]->count = 0;
6421 if ((ieee80211_is_data(h->frame_control) ||
6422 ieee80211_is_mgmt(h->frame_control)) &&
6423 (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
6430 memcpy(&txh->FragPLCPFallback,
6431 plcp_fallback, sizeof(txh->FragPLCPFallback));
6433 /* Length field now put in CCK FBR CRC field */
6435 txh->FragPLCPFallback[4] = phylen & 0xff;
6436 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
6439 /* MIMO-RATE: need validation ?? */
6445 if (!ieee80211_is_pspoll(h->frame_control) &&
6446 !is_multicast_ether_addr(h->addr1) && !use_rifs) {
6450 h->duration_id = cpu_to_le16(durid);
6458 h->duration_id = cpu_to_le16(durid);
6462 if (ieee80211_is_pspoll(h->frame_control))
6463 txh->FragDurFallback = h->duration_id;
6464 else if (is_multicast_ether_addr(h->addr1) || use_rifs)
6465 txh->FragDurFallback = 0;
6469 txh->FragDurFallback = cpu_to_le16(durid);
6472 /* (4) MAC-HDR: MacTxControlLow */
6476 if (!is_multicast_ether_addr(h->addr1))
6479 if (wlc->band->bandtype == BRCM_BAND_5G)
6482 if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
6489 txh->MacTxControlLow = cpu_to_le16(mcl);
6502 memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
6503 txh->TxFesTimeNormal = cpu_to_le16(0);
6505 txh->TxFesTimeFallback = cpu_to_le16(0);
6508 memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
6511 txh->TxFrameID = cpu_to_le16(frameid);
6517 txh->TxStatus = cpu_to_le16(status);
6521 * the END of previous structure so that it's compatible in driver.
6523 txh->MaxNMpdus = cpu_to_le16(0);
6524 txh->MaxABytes_MRT = cpu_to_le16(0);
6525 txh->MaxABytes_FBR = cpu_to_le16(0);
6526 txh->MinMBytes = cpu_to_le16(0);
6543 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
6550 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
6557 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
6559 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
6560 txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
6564 rts_plcp = txh->RTSPhyHeader;
6575 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
6576 sizeof(txh->RTSPLCPFallback));
6579 rts = (struct ieee80211_rts *)&txh->rts_frame;
6584 rts->duration = cpu_to_le16(durid);
6590 txh->RTSDurFallback = cpu_to_le16(durid);
6593 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
6596 memcpy(&rts->ra, &h->addr2, ETH_ALEN);
6598 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
6601 memcpy(&rts->ra, &h->addr1, ETH_ALEN);
6602 memcpy(&rts->ta, &h->addr2, ETH_ALEN);
6614 memset(txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
6615 memset(&txh->rts_frame, 0, sizeof(struct ieee80211_rts));
6616 memset(txh->RTSPLCPFallback, 0, sizeof(txh->RTSPLCPFallback));
6617 txh->RTSDurFallback = 0;
6622 if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
6623 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
6624 brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
6632 txh->MacTxControlHigh = cpu_to_le16(mch);
6638 txh->MainRates = cpu_to_le16(mainrates);
6641 xfts = frametype(rspec[1], wlc->mimoft);
6642 xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
6643 xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
6644 xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
6646 txh->XtraFrameTypes = cpu_to_le16(xfts);
6649 phyctl = frametype(rspec[0], wlc->mimoft);
6658 txh->PhyTxControlWord = cpu_to_le16(phyctl);
6661 if (BRCMS_PHY_11N_CAP(wlc->band)) {
6665 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
6667 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
6671 txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
6673 txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
6678 * is going to be set, fill in non-zero MModeLen and/or
6685 txh->MModeLen = cpu_to_le16(mmodelen);
6692 txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
6697 if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
6701 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
6707 /* 1 RTS or CTS-to-self frame */
6715 dur += le16_to_cpu(rts->duration);
6717 le16_to_cpu(txh->RTSDurFallback);
6737 txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
6742 txh->TxFesTimeFallback =
6749 if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
6755 (wlc->edcf_txop[ac] -
6756 (dur - frag_dur)));
6762 wlc->usr_fragthresh)
6764 wlc->usr_fragthresh;
6766 if (wlc->fragthresh[queue] !=
6768 wlc->fragthresh[queue] =
6771 brcms_warn(wlc->hw->d11core,
6773 wlc->pub->unit, fifo_names[queue],
6777 if (dur > wlc->edcf_txop[ac])
6778 brcms_warn(wlc->hw->d11core,
6780 wlc->pub->unit, __func__,
6782 phylen, wlc->fragthresh[queue],
6783 dur, wlc->edcf_txop[ac]);
6793 int fifo, ret = -ENOSPC;
6798 dma = wlc->hw->di[fifo];
6799 txh = (struct d11txh *)(skb->data);
6801 if (dma->txavail == 0) {
6808 * in the tx ring and the tx queue isn't stopped then
6811 brcms_warn(wlc->hw->d11core,
6812 "Received frame for tx with no space in DMA ring\n");
6813 WARN_ON(!ieee80211_queue_stopped(wlc->pub->ieee_hw,
6815 return -ENOSPC;
6822 frameid = le16_to_cpu(txh->TxFrameID);
6824 /* Commit BCMC sequence number in the SHM frame ID location */
6830 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
6848 struct scb *scb = &wlc->pri_scb;
6863 struct dma_pub *dma = wlc->hw->di[fifo];
6869 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
6877 if (dma->txavail <= TX_HEADROOM && fifo < TX_BCMC_FIFO &&
6878 !ieee80211_queue_stopped(wlc->pub->ieee_hw, queue))
6879 ieee80211_stop_queue(wlc->pub->ieee_hw, queue);
6893 else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
6896 * under the target in case 11 Mbps is not Basic.
6909 if (BRCMS_PHY_11N_CAP(wlc->band)) {
6910 /* set rts txbw to correct side band */
6925 rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
6931 /* Update beacon listen interval in shared memory */
6935 if (wlc->bcn_li_dtim == 1)
6936 brcms_b_write_shm(wlc->hw, M_BCN_LI, 0);
6938 brcms_b_write_shm(wlc->hw, M_BCN_LI,
6939 (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
6946 struct bcma_device *core = wlc_hw->d11core;
6954 * recover 64bit TSF value from the 16bit TSF value in the rx header
6955 * given the assumption that the TSF passed in header is within 65ms
6960 * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
6963 * tsf_l is filled in by brcms_b_recv, which is done earlier in the
6973 brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
6976 rx_tsf_0_15 = rxh->RxTSFTime;
6983 rx_tsf_16_31 -= 1;
6985 tsf_h -= 1;
7000 /* fill in TSF and flag its presence */
7001 rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
7002 rx_status->flag |= RX_FLAG_MACTIME_START;
7004 channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
7006 rx_status->band =
7008 rx_status->freq =
7009 ieee80211_channel_to_frequency(channel, rx_status->band);
7011 rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
7015 rx_status->antenna =
7016 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
7018 plcp = p->data;
7022 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
7023 rx_status->encoding = RX_ENC_HT;
7025 rx_status->bw = RATE_INFO_BW_40;
7029 rx_status->rate_idx = 0;
7032 rx_status->rate_idx = 1;
7035 rx_status->rate_idx = 2;
7038 rx_status->rate_idx = 3;
7041 rx_status->rate_idx = 4;
7044 rx_status->rate_idx = 5;
7047 rx_status->rate_idx = 6;
7050 rx_status->rate_idx = 7;
7053 rx_status->rate_idx = 8;
7056 rx_status->rate_idx = 9;
7059 rx_status->rate_idx = 10;
7062 rx_status->rate_idx = 11;
7065 brcms_err(wlc->hw->d11core,
7072 * of brcms_band_5GHz_nphy (in mac80211_if.c).
7074 if (rx_status->band == NL80211_BAND_5GHZ)
7075 rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
7079 if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
7080 rx_status->enc_flags |= RX_ENC_FLAG_SHORTPRE;
7082 rx_status->enc_flags |= RX_ENC_FLAG_SHORTPRE;
7084 brcms_err(wlc->hw->d11core, "%s: Unknown modulation\n",
7090 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
7092 if (rxh->RxStatus1 & RXS_DECERR) {
7093 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
7094 brcms_err(wlc->hw->d11core, "%s: RX_FLAG_FAILED_PLCP_CRC\n",
7097 if (rxh->RxStatus1 & RXS_FCSERR) {
7098 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
7099 brcms_err(wlc->hw->d11core, "%s: RX_FLAG_FAILED_FCS_CRC\n",
7116 len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
7121 if (wlc->hw->suspended_fifos) {
7122 hdr = (struct ieee80211_hdr *)p->data;
7123 if (ieee80211_is_beacon(hdr->frame_control))
7124 brcms_b_mute(wlc->hw, false);
7128 ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
7131 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
7132 * number of bytes goes in the length field
7135 * len = 3(nsyms + nstream + 3) - 3
7167 /* (+3) account for HT-SIG(2) and HT-STF(1) */
7171 * (-3) excluding service bits and tail bits
7173 len = (3 * nsyms) - 3;
7190 sifs = get_sifs(wlc->band);
7195 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
7204 entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate);
7218 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS,
7220 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2,
7222 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur);
7237 struct brcms_hardware *wlc_hw = wlc->hw;
7238 struct ieee80211_hw *ieee_hw = brcms_c_pub(wlc)->ieee_hw;
7243 len = min_t(size_t, beacon->len, BCN_TMPL_LEN);
7244 wlc->bcn_rspec = ieee80211_get_tx_rate(ieee_hw, tx_info)->hw_value;
7246 brcms_c_compute_plcp(wlc, wlc->bcn_rspec,
7247 len + FCS_LEN - D11_PHY_HDR_LEN, beacon->data);
7251 brcms_c_beacon_phytxctl_txant_upd(wlc, wlc->bcn_rspec);
7256 (len + 3) & ~3, beacon->data);
7264 (len + 3) & ~3, beacon->data);
7285 struct brcms_hardware *wlc_hw = wlc->hw;
7286 struct bcma_device *core = wlc_hw->d11core;
7291 /* Check if both templates are in use, if so sched. an interrupt
7298 if (wlc->beacon_template_virgin) {
7299 wlc->beacon_template_virgin = false;
7311 wlc->defmacintmask |= MI_BCNTPL;
7335 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7337 if (wlc->pub->up && (bsscfg->type == BRCMS_TYPE_AP ||
7338 bsscfg->type == BRCMS_TYPE_ADHOC)) {
7340 wlc->defmacintmask &= ~MI_BCNTPL;
7341 if (!wlc->beacon)
7343 brcms_c_update_beacon_hw(wlc, wlc->beacon,
7344 wlc->beacon_tim_offset,
7345 wlc->beacon_dtim_period);
7354 if (wlc->beacon)
7355 dev_kfree_skb_any(wlc->beacon);
7356 wlc->beacon = beacon;
7359 skb_push(wlc->beacon, D11_PHY_HDR_LEN);
7360 wlc->beacon_tim_offset = tim_offset;
7361 wlc->beacon_dtim_period = dtim_period;
7370 if (wlc->probe_resp)
7371 dev_kfree_skb_any(wlc->probe_resp);
7372 wlc->probe_resp = probe_resp;
7375 skb_push(wlc->probe_resp, D11_PHY_HDR_LEN);
7383 * to 1, it can not send it in that time frame.
7385 wlc->prb_resp_timeout = enable ? BRCMS_PRB_RESP_TIMEOUT : 1;
7386 brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
7394 u8 *ssidptr = cfg->SSID;
7400 memcpy(ssidbuf, ssidptr, cfg->SSID_len);
7403 brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len);
7414 len = min_t(size_t, probe_resp->len, BCN_TMPL_LEN);
7420 brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
7421 (len + 3) & ~3, probe_resp->data);
7423 /* write the length of the probe response frame (+PLCP/-FCS) */
7424 brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len);
7436 (u16)len + FCS_LEN - D11_PHY_HDR_LEN);
7444 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7447 if (wlc->pub->up && (bsscfg->type == BRCMS_TYPE_AP ||
7448 bsscfg->type == BRCMS_TYPE_ADHOC)) {
7449 if (!wlc->probe_resp)
7451 brcms_c_bss_update_probe_resp(wlc, bsscfg, wlc->probe_resp,
7460 return -EINVAL;
7462 *blocks = wlc_hw->xmtfifo_sz[fifo];
7471 brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
7473 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
7477 * Flag 'scan in progress' to withhold dynamic phy calibration
7481 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
7486 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
7491 wlc->pub->associated = state;
7496 * AMPDU traffic, packets pending in hardware have to be invalidated so that
7506 dmah = hw->di[i];
7514 return wlc->band->bandunit;
7522 for (i = 0; i < ARRAY_SIZE(wlc->hw->di); i++)
7523 if (wlc->hw->di[i])
7524 dma_kick_tx(wlc->hw->di[i]);
7531 wlc->bcn_li_bcn = interval;
7532 if (wlc->pub->up)
7541 brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
7560 bcma_write32(wlc->hw->d11core, D11REGOFFS(tsf_timerlow), tsf_l);
7561 bcma_write32(wlc->hw->d11core, D11REGOFFS(tsf_timerhigh), tsf_h);
7572 return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
7580 wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
7599 rxh = (struct d11rxhdr *) (p->data);
7604 /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
7605 if (rxh->RxStatus1 & RXS_PBPRES) {
7606 if (p->len < 2) {
7607 brcms_err(wlc->hw->d11core,
7609 wlc->pub->unit, p->len);
7615 h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
7616 len = p->len;
7618 if (rxh->RxStatus1 & RXS_FCSERR) {
7619 if (!(wlc->filter_flags & FIF_FCSFAIL))
7624 if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
7627 /* not supporting A-MSDU */
7628 is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
7652 uint bound_limit = bound ? RXBND : -1;
7663 morepending = dma_rx(wlc_hw->di[fifo], &recv_frames);
7668 dma_rxfill(wlc_hw->di[fifo]);
7676 rxh_le = (struct d11rxhdr_le *)p->data;
7677 rxh = (struct d11rxhdr *)p->data;
7680 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
7681 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
7682 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
7683 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
7684 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
7685 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
7686 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
7687 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
7688 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
7689 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
7690 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
7692 brcms_c_recv(wlc_hw->wlc, p);
7698 /* second-level interrupt processing
7699 * Return true if another dpc needs to be re-scheduled. false otherwise.
7705 struct brcms_hardware *wlc_hw = wlc->hw;
7706 struct bcma_device *core = wlc_hw->d11core;
7709 brcms_err(core, "wl%d: %s: dead chip\n", wlc_hw->unit,
7711 brcms_down(wlc->wl);
7716 macintstatus = wlc->macintstatus;
7717 wlc->macintstatus = 0;
7720 wlc_hw->unit, macintstatus);
7722 WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
7727 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
7728 wlc->macintstatus |= MI_TFS;
7741 bcma_set32(core, D11REGOFFS(maccommand), wlc->qvalid);
7742 wlc->qvalid = 0;
7751 wlc->macintstatus |= MI_DMAINT;
7755 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
7759 "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
7762 __func__, ai_get_chip_id(wlc_hw->sih),
7763 ai_get_chiprev(wlc_hw->sih));
7764 brcms_fatal_error(wlc_hw->wlc->wl);
7773 " RF Disable Input\n", wlc_hw->unit);
7774 brcms_rfkill_set_hw_state(wlc->wl);
7781 /* it isn't done and needs to be resched if macintstatus is non-zero */
7782 return wlc->macintstatus != 0;
7785 brcms_fatal_error(wlc_hw->wlc->wl);
7786 return wlc->macintstatus != 0;
7791 struct bcma_device *core = wlc->hw->d11core;
7792 struct ieee80211_channel *ch = wlc->pub->ieee_hw->conf.chandef.chan;
7795 brcms_dbg_info(core, "wl%d\n", wlc->pub->unit);
7797 chanspec = ch20mhz_chspec(ch->hw_value);
7799 brcms_b_init(wlc->hw, chanspec);
7805 brcms_c_set_mac(wlc->bsscfg);
7806 brcms_c_set_bssid(wlc->bsscfg);
7809 if (wlc->pub->associated && wlc->pub->up) {
7813 bi = wlc->bsscfg->current_bss->beacon_period << 10;
7828 brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
7831 brcms_b_write_shm(wlc->hw, M_MBURST_TXOP,
7832 (wlc->
7836 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
7837 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
7843 brcms_c_ampdu_shm_upd(wlc->ampdu);
7845 /* band-specific inits */
7853 if (wlc->ucode_rev == 0) {
7857 rev = brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR);
7858 patch = brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR);
7859 wlc->ucode_rev = (rev << NBITS(u16)) | patch;
7860 snprintf(wlc->wiphy->fw_version,
7861 sizeof(wlc->wiphy->fw_version), "%u.%u", rev, patch);
7869 brcms_b_mute(wlc->hw, true);
7878 if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
7883 wlc->wme_retries[ac] =
7884 brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac));
7904 wlc->wiphy = wl->wiphy;
7905 pub = wlc->pub;
7911 wlc->band = wlc->bandstate[0];
7912 wlc->core = wlc->corestate;
7913 wlc->wl = wl;
7914 pub->unit = unit;
7915 pub->_piomode = piomode;
7916 wlc->bandinit_pending = false;
7917 wlc->beacon_template_virgin = true;
7927 * inside, no more in rest of the attach)
7935 pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
7938 wlc->tx_duty_cycle_ofdm = 0;
7939 wlc->tx_duty_cycle_cck = 0;
7944 if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
7945 wlc->stf->txant = wlc->stf->hw_txchain - 1;
7948 wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
7949 wlc->stf->hw_rxchain);
7953 wlc->core->txavail[i] = wlc->hw->txavail[i];
7955 memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
7956 memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
7958 for (j = 0; j < wlc->pub->_nbands; j++) {
7959 wlc->band = wlc->bandstate[j];
7967 wlc->band->CWmin = APHY_CWMIN;
7968 wlc->band->CWmax = PHY_CWMAX;
7971 if (wlc->band->bandtype == BRCM_BAND_2G) {
7972 wlc->band->gmode = GMODE_AUTO;
7974 wlc->band->gmode);
7978 if (BRCMS_PHY_11N_CAP(wlc->band)) {
7979 pub->_n_enab = SUPPORT_11N;
7981 ((pub->_n_enab ==
7986 /* init per-band default rateset, depend on band->gmode */
7987 brcms_default_rateset(wlc, &wlc->band->defrateset);
7989 /* fill in hw_rateset */
7990 brcms_c_rateset_filter(&wlc->band->defrateset,
7991 &wlc->band->hw_rateset, false,
7993 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
7998 * wlc->stf->txant/txchain/ant_rx_ovr change
8008 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
8015 wlc->cmi = brcms_c_channel_mgr_attach(wlc);
8016 if (!wlc->cmi) {
8017 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
8023 /* init default when all parameters are ready, i.e. ->rateset */
8030 wlc->bsscfg->wlc = wlc;
8032 wlc->mimoft = FT_HT;
8033 wlc->mimo_40txbw = AUTO;
8034 wlc->ofdm_40txbw = AUTO;
8035 wlc->cck_40txbw = AUTO;
8042 } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
8049 brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
8057 wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",